DETAILED ACTION
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Applicant's response to the Office Non-Final Action filed on 3/28/2026 is acknowledged.
The applicant’s arguments, “the dummy gate has not been formed when the aluminum-containing barrier layer 218 is formed” and “Mohapatra teaches that the aluminum-containing barrier layer 218 is part of the indium-rich replacement channels 216, and Mohapatra is silent regarding the materials of the source/drain regions”, is persuasive such that the current office action becomes non-final.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 13-18, 21, 22, 24-27, and 29-32 are rejected under 35 U.S.C. 103 as being unpatentable over Chun et al. (US 2024/0170552) (hereafter Chun), in view of Kim et al. (US 2023/0317792) (hereafter KIm).
Regarding claim 13, Chun discloses a method, comprising:
forming a stack of first 112 (Fig. 10, paragraph 0057) and second semiconductor layers 122 (Fig. 10, paragraph 0057);
forming a sacrificial gate stack 150 (Fig. 10, paragraph 0061) over a portion of the stack of first 112 (Fig. 10) and second semiconductor layers 122 (Fig. 10);
forming spacers 182 (Fig. 13, paragraph 0066) on sidewalls of the sacrificial gate stack 150 (Fig. 13);
removing (see Fig. 13) exposed portions of the stack of first 112 (Fig. 13) and second semiconductor layers 122 (Fig. 13) to expose a substrate portion 105 (Fig. 13, paragraph 0078); and
depositing a first semiconductor material 210 (Fig. 20, paragraph 0078) over the substrate portion 105 (Fig. 20) and in contact with the first semiconductor layers 116 (Fig. 20; see Fig. 13 and paragraph 0069, wherein 112 becomes 114; and Fig. 20 and paragraph 0073, wherein 114 becomes 116).
Chun does not disclose depositing a first aluminum-containing layer, wherein the first aluminum-containing layer has a first portion disposed on the first semiconductor material and a second portion disposed on the spacers; and
depositing a second semiconductor material on the first portion of the first aluminum-containing layer.
Kim discloses depositing a first aluminum-containing layer (first 152h from the bottom of Fig. 10, paragraph 0078; see paragraph 0079, wherein “the example embodiment of FIGS. 5 and 6 may also be applied to the source/drain region 150a of FIGS. 9 and 10, respectively”; and see 152 in Fig. 5 and paragraph 0038, wherein “aluminum (Al)”), wherein the first aluminum-containing layer (first 152h from the bottom of Fig. 10) has a first portion (lower portion of first 152h from the bottom of Fig. 10) disposed on the first semiconductor material 151h (Fig. 10, paragraph 0078) and a second portion (upper portion of first 152h from the bottom of Fig. 10) disposed on the spacers 161 (Fig. 10, paragraph 0024); and
depositing a second semiconductor material (first 153h from the bottom of Fig. 10, paragraph 0078) on the first portion (lower portion of first 152h from the bottom of Fig. 10) of the first aluminum-containing layer (first 152h from the bottom of Fig. 10).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the invention of Chun to form a layer being a first aluminum-containing layer, as taught by Kim, since impurities (Kim, paragraph 0047) may be prevented from diffusing in a direction of a channel or a substrate as compared with the case in which impurities are heavily doped into the entire source/drain region 150 (Kim, Fig. 4A, paragraph 0047), and damage to a crystal structure may be prevented as compared with the case in which high-current ion implantation is performed before the contact plug 180 (Kim, Fig. 4A, paragraph 0047) is formed.
Regarding claim 14, Chun in view of Kim discloses the method of claim 13, however Chun does not disclose a thickness of the first portion of the first aluminum-containing layer is substantially greater than a thickness of the second portion of the first aluminum-containing layer.
Kim discloses a thickness (longest vertical length of lower portion of first 152h from the bottom of Fig. 10) of the first portion (lower portion of first 152h from the bottom of Fig. 10) of the first aluminum-containing layer (first 152h from the bottom of Fig. 10, paragraph 0078; see paragraph 0079, wherein “the example embodiment of FIGS. 5 and 6 may also be applied to the source/drain region 150a of FIGS. 9 and 10, respectively”; and see 152 in Fig. 5 and paragraph 0038, wherein “aluminum (Al)”) is substantially greater than a thickness (shortest vertical length of upper portion of first 152h from the bottom of Fig. 10) of the second portion (upper portion of first 152h from the bottom of Fig. 10) of the first aluminum-containing layer.
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the invention of Chun to form a thickness of the first portion of the first aluminum-containing layer is substantially greater than a thickness of the second portion of the first aluminum-containing layer, as taught by Kim, since a change in size is generally recognized as being within the level of ordinary skill in the art In re Rose, 105 USPQ 237 (CCPA 1955). In addition, in the case where the claimed ranges “overlap or lie inside ranges disclosed by the prior art” a prima facie case of obviousness exists. In re Wertheim, 541 F.2d 257, 191 USPQ 90 (CCPA 1976). Note that the specification contains no disclosure of either the critical nature of the claimed ranges or any unexpected results arising therefrom. Where patentability is said to be based upon particular chosen dimensions or upon another variable recited in a claim, the applicant must show that the chosen dimensions are critical. In re Woodruff, 919 f.2d 1575, 16 USPQ2d 1934 (Fed. Cir. 1990).
Regarding claim 15, Chun in view of Kim discloses the method of claim 14, however Chun does not disclose the thickness of the first portion of the first aluminum-containing layer ranges from about 0.2 nm to about 1.5 nm.
Kim discloses the thickness (see paragraph 0065, wherein “range of about 1 nm to about 10 nm”) of the first portion of the first aluminum-containing layer (first 152h from the bottom of Fig. 10, paragraph 0078; see paragraph 0079, wherein “the example embodiment of FIGS. 5 and 6 may also be applied to the source/drain region 150a of FIGS. 9 and 10, respectively”; and see 152 in Fig. 5 and paragraph 0038, wherein “aluminum (Al)”) ranges from about 0.2 nm to about 1.5 nm.
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the invention of Chun to form the thickness of the first portion of the first aluminum-containing layer ranges from about 0.2 nm to about 1.5 nm, as taught by Kim, since a change in size is generally recognized as being within the level of ordinary skill in the art In re Rose, 105 USPQ 237 (CCPA 1955). In addition, in the case where the claimed ranges “overlap or lie inside ranges disclosed by the prior art” a prima facie case of obviousness exists. In re Wertheim, 541 F.2d 257, 191 USPQ 90 (CCPA 1976). Note that the specification contains no disclosure of either the critical nature of the claimed ranges or any unexpected results arising therefrom. Where patentability is said to be based upon particular chosen dimensions or upon another variable recited in a claim, the applicant must show that the chosen dimensions are critical. In re Woodruff, 919 f.2d 1575, 16 USPQ2d 1934 (Fed. Cir. 1990).
Regarding claim 16, Chun in view of Kim discloses the method of claim 13, however Chun does not disclose depositing a second aluminum-containing layer, wherein the second aluminum-containing layer has a first portion disposed on the second semiconductor material and a second portion disposed on the second portion of the first aluminum-containing layer.
Kim discloses a second aluminum-containing layer (second 152h from the bottom of Fig. 10, paragraph 0078; see paragraph 0079, wherein “the example embodiment of FIGS. 5 and 6 may also be applied to the source/drain region 150a of FIGS. 9 and 10, respectively”; and see 152 in Fig. 5 and paragraph 0038, wherein “aluminum (Al)”) of the first portion (lower portion of first 152h from the bottom of Fig. 10) of the first aluminum-containing layer (first 152h from the bottom of Fig. 10), wherein the second aluminum-containing layer (second 152h from the bottom of Fig. 10) has a first portion (lower portion of second 152h from the bottom of Fig. 10) disposed on the second semiconductor material (first 153h from the bottom of Fig. 10, paragraph 0078) and a second portion (upper portion of second 152h from the bottom of Fig. 10) disposed on the second portion (upper portion of first 152h from the bottom of Fig. 10) of the first aluminum-containing layer (first 152h from the bottom of Fig. 10).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the invention of Chun to include depositing a second aluminum-containing layer, wherein the second aluminum-containing layer has a first portion disposed on the second semiconductor material and a second portion disposed on the second portion of the first aluminum-containing layer, as taught by Kim, since impurities (Kim, paragraph 0047) may be prevented from diffusing in a direction of a channel or a substrate as compared with the case in which impurities are heavily doped into the entire source/drain region 150 (Kim, Fig. 4A, paragraph 0047), and damage to a crystal structure may be prevented as compared with the case in which high-current ion implantation is performed before the contact plug 180 (Kim, Fig. 4A, paragraph 0047) is formed.
Regarding claim 17, Chun in view of Kim discloses the method of claim 16, however Chun does not disclose depositing a third semiconductor material on the first portion of the second aluminum-containing layer.
Kim discloses depositing a third semiconductor material (second 153h from the bottom of Fig. 10, paragraph 0078) on the first portion (upper portion of second 152h from the bottom of Fig. 10) of the second aluminum-containing layer (second 152h from the bottom of Fig. 10).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the invention of Chun to include depositing a third semiconductor material on the first portion of the second aluminum-containing layer, as taught by Kim, since impurities (Kim, paragraph 0047) may be prevented from diffusing in a direction of a channel or a substrate as compared with the case in which impurities are heavily doped into the entire source/drain region 150 (Kim, Fig. 4A, paragraph 0047), and damage to a crystal structure may be prevented as compared with the case in which high-current ion implantation is performed before the contact plug 180 (Kim, Fig. 4A, paragraph 0047) is formed.
Regarding claim 18, Chun discloses a method, comprising:
forming a stack of first 112 (Fig. 10, paragraph 0057) and second semiconductor layers 122 (Fig. 10, paragraph 0057);
forming a sacrificial gate stack 150 (Fig. 10, paragraph 0061) over a portion of the stack of first 112 (Fig. 10) and second semiconductor layers 122 (Fig. 10);
forming spacers 182 (Fig. 13, paragraph 0066) on sidewalls of the sacrificial gate stack 150 (Fig. 13);
removing (see Fig. 13) exposed portions of the stack of first 112 (Fig. 13) and second semiconductor layers 122 (Fig. 13) to expose a substrate portion 105 (Fig. 13, paragraph 0078); and
depositing a first semiconductor material 210 (Fig. 20, paragraph 0078) over the substrate portion 105 (Fig. 20) and in contact with the first semiconductor layers 116 (Fig. 20; see Fig. 13 and paragraph 0069, wherein 112 becomes 114; and Fig. 20 and paragraph 0073, wherein 114 becomes 116).
Chun does not disclose depositing a first aluminum-containing layer, wherein the first aluminum-containing layer has a first portion disposed on the first semiconductor material and a second portion disposed on the spacers;
depositing a second semiconductor material on the first portion of the first aluminum-containing layer;
depositing a second aluminum-containing layer, wherein the second aluminum-containing layer has a first portion disposed on the second semiconductor material and a second portion disposed on the second portion of the first aluminum-containing layer;
depositing a third semiconductor material on the first portion of the second aluminum-containing layer; and
removing the second portion of the first aluminum-containing layer and the second portion of the second aluminum- containing layer.
Kim discloses depositing a first aluminum-containing layer (third 152 from the top of Fig. 11H, paragraph 0038, wherein “aluminum (Al)”), wherein the first aluminum-containing layer (third 152 from the top of Fig. 11H) has a first portion (lower portion of third 152 from the top of Fig. 11H) disposed on the first semiconductor material 151 (Fig. 11H, paragraph 0031) and a second portion (upper portion of third 152 from the top of Fig. 11H) disposed on (see III-III’ of Fig. 11H) the spacers (161 and 190 in Fig. 11H);
depositing a second semiconductor material (second 153 from the top of Fig. 11H, paragraph 0078) on the first portion (lower portion of third 152 from the top of Fig. 11H) of the first aluminum-containing layer (third 152 from the top of Fig. 11H);.
depositing a second aluminum-containing layer (second 152 from the top of Fig. 11H, paragraph 0038 wherein “aluminum (Al)”), wherein the second aluminum-containing layer (second 153 from the top of Fig. 11H) has a first portion (lower portion of second 152 from the top of Fig. 11H) disposed on the second semiconductor material (second 153 from the top of Fig. 11H) and a second portion (upper portion of second 152 from the top of Fig. 11H) disposed on the second portion (upper portion of third 152 from the top of Fig. 11H) of the first aluminum-containing layer (third 152 from the top of Fig. 11H);
depositing a third semiconductor material (first 152 from the top of Fig. 11H, paragraph 0078) on the first portion (lower portion of second 152 from the top of Fig. 11H) of the second aluminum-containing layer (second 153 from the top of Fig. 11H); and
removing (see Fig. 11J) the second portion (upper portion of third 152 from the top of Fig. 11H) of the first aluminum-containing layer (third 152 from the top of Fig. 11H) and the second portion (upper portion of second 152 from the top of Fig. 11H) of the second aluminum- containing layer (second 152 from the top of Fig. 11H).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the invention of Chun to form depositing a first aluminum-containing layer, wherein the first aluminum-containing layer has a first portion disposed on the first semiconductor material and a second portion disposed on the spacers; depositing a second semiconductor material on the first portion of the first aluminum-containing layer; depositing a second aluminum-containing layer, wherein the second aluminum-containing layer has a first portion disposed on the second semiconductor material and a second portion disposed on the second portion of the first aluminum-containing layer; depositing a third semiconductor material on the first portion of the second aluminum-containing layer; and removing the second portion of the first aluminum-containing layer and the second portion of the second aluminum- containing layer, as taught by Kim, since impurities (Kim, paragraph 0047) may be prevented from diffusing in a direction of a channel or a substrate as compared with the case in which impurities are heavily doped into the entire source/drain region 150 (Kim, Fig. 4A, paragraph 0047), and damage to a crystal structure may be prevented as compared with the case in which high-current ion implantation is performed before the contact plug 180 (Kim, Fig. 4A, paragraph 0047) is formed.
Regarding claim 21, Chun discloses a method, comprising:
forming a fin (112 and 122 in Fig. 11, paragraph 0056);
forming a sacrificial gate stack 150 (Fig. 11, paragraph 0061) over a portion of the fin (112 and 122 in Fig. 11);
removing exposed portions of the fin (112 and 122 in Fig. 11) to form an opening 190 (Fig. 13, paragraph 0068); and
depositing a first semiconductor material 210 (Fig. 20, paragraph 0020) in the opening 190 (Fig. 20).
Chun does not disclose depositing a first aluminum-containing layer on the first semiconductor material in the opening; and
depositing a second semiconductor material on the first aluminum-containing layer in the opening.
Kim discloses depositing a first aluminum-containing layer (first 152h from the bottom of Fig. 10, paragraph 0078; see paragraph 0079, wherein “the example embodiment of FIGS. 5 and 6 may also be applied to the source/drain region 150a of FIGS. 9 and 10, respectively”; and see 152 in Fig. 5 and paragraph 0038, wherein “aluminum (Al)”) on the first semiconductor material 151h (Fig. 10, paragraph 0078) in the opening (region where 150a is formed in Fig. 10; and see RC in Fig. 11D and paragraph 0095); and
depositing a second semiconductor material (first 153h from the bottom of Fig. 10, paragraph 0078) on the first aluminum-containing layer (first 152h from the bottom of Fig. 10) in the opening (region where 150a is formed in Fig. 10; and see RC in Fig. 11D and paragraph 0095).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the invention of Chun to include depositing a first aluminum-containing layer on the first semiconductor material in the opening; and depositing a second semiconductor material on the first aluminum-containing layer in the opening, as taught by Kim, since impurities (Kim, paragraph 0047) may be prevented from diffusing in a direction of a channel or a substrate as compared with the case in which impurities are heavily doped into the entire source/drain region 150 (Kim, Fig. 2A, paragraph 0047), and damage to a crystal structure may be prevented as compared with the case in which high-current ion implantation is performed before the contact plug 180 (Kim, Fig. 2A, paragraph 0047) is formed.
Regarding claim 22, Chun further discloses the method of claim 21, wherein the first semiconductor material 210 (Fig. 20, paragraph 0081, wherein “first epitaxial layer 210 may be grown”) is deposited by epitaxy.
Regarding claim 24, Chun in view of Kim discloses the method of claim 21, however Chun does not disclose depositing a second aluminum-containing layer on the second semiconductor material in the opening.
Kim discloses depositing a second aluminum-containing layer (second 152h from the bottom of Fig. 10, paragraph 0078; see paragraph 0079, wherein “the example embodiment of FIGS. 5 and 6 may also be applied to the source/drain region 150a of FIGS. 9 and 10, respectively”; and see 152 in Fig. 5 and paragraph 0038, wherein “aluminum (Al)”) on the second semiconductor material (first 153h from the bottom of Fig. 10, paragraph 0078) in the opening (region where 150a is formed in Fig. 10; and see RC in Fig. 11D and paragraph 0095).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the invention of Chun to include depositing a second aluminum-containing layer on the second semiconductor material in the opening, as taught by Kim, since impurities (Kim, paragraph 0047) may be prevented from diffusing in a direction of a channel or a substrate as compared with the case in which impurities are heavily doped into the entire source/drain region 150 (Kim, Fig. 4A, paragraph 0047), and damage to a crystal structure may be prevented as compared with the case in which high-current ion implantation is performed before the contact plug 180 (Kim, Fig. 4A, paragraph 0047) is formed.
Regarding claim 25, Chun in view of Kim discloses the method of claim 24, however Chun does not disclose depositing a third semiconductor material on the second aluminum-containing layer in the opening.
Kim discloses depositing a third semiconductor material (second 153h from the bottom of Fig. 10, paragraph 0078) on the second aluminum-containing layer (second 152h from the bottom of Fig. 10, paragraph 0078; see paragraph 0079, wherein “the example embodiment of FIGS. 5 and 6 may also be applied to the source/drain region 150a of FIGS. 9 and 10, respectively”; and see 152 in Fig. 5 and paragraph 0038, wherein “aluminum (Al)”) in the opening (region where 150a is formed in Fig. 10; and see RC in Fig. 11D and paragraph 0095).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the invention of Chun to include depositing a third semiconductor material on the second aluminum-containing layer in the opening, as taught by Kim, since impurities (Kim, paragraph 0047) may be prevented from diffusing in a direction of a channel or a substrate as compared with the case in which impurities are heavily doped into the entire source/drain region 150 (Kim, Fig. 4A, paragraph 0047), and damage to a crystal structure may be prevented as compared with the case in which high-current ion implantation is performed before the contact plug 180 (Kim, Fig. 4A, paragraph 0047) is formed.
Regarding claim 26, Chun in view of Kim discloses the method of claim 25, however Chun does not disclose the third semiconductor material fills the opening.
Kim discloses the third semiconductor material (second 153h from the bottom of Fig. 10, paragraph 0078) fills the opening (region where 150a is formed in Fig. 10; and see RC in Fig. 11D and paragraph 0095).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the invention of Chun to include the third semiconductor material fills the opening, as taught by Kim, since impurities (Kim, paragraph 0047) may be prevented from diffusing in a direction of a channel or a substrate as compared with the case in which impurities are heavily doped into the entire source/drain region 150 (Kim, Fig. 4A, paragraph 0047), and damage to a crystal structure may be prevented as compared with the case in which high-current ion implantation is performed before the contact plug 180 (Kim, Fig. 4A, paragraph 0047) is formed.
Regarding claim 27, Chun discloses a method, comprising:
forming a fin (112 and 122 in Fig. 11, paragraph 0056);
forming a sacrificial gate stack 150 (Fig. 11, paragraph 0061) over a portion of the fin (112 and 122 in Fig. 11);
removing exposed portions of the fin (112 and 122 in Fig. 11) to form an opening 190 (Fig. 13, paragraph 0068); and
depositing a first semiconductor material 210 (Fig. 20, paragraph 0020) in the opening 190 (Fig. 20).
Chun does not disclose depositing a first aluminum-containing layer on the first semiconductor material in the opening;
depositing a second semiconductor material on the first aluminum-containing layer in the opening;
depositing a second aluminum-containing layer on the second semiconductor material in the opening;
depositing a third semiconductor material on the second aluminum-containing layer in the opening;
the third semiconductor material fills the opening; and
removing portions of the first and second aluminum-containing layers after depositing the third semiconductor material.
Kim discloses depositing a first aluminum-containing layer (third 152 from the top of Fig. 11H, paragraph 0038, wherein “aluminum (Al)”) on the first semiconductor material 151 (Fig. 11H, paragraph 0031) in the opening (region where 150 is formed in Fig. 11H; and see RC in Fig. 11D and paragraph 0095);
depositing a second semiconductor material (second 153 from the top of Fig. 11H, paragraph 0078) on the first aluminum-containing layer (third 152 from the top of Fig. 11H) in the opening (region where 150 is formed in Fig. 11H; and see RC in Fig. 11D);
depositing a second aluminum-containing layer (second 152 from the top of Fig. 11H, paragraph 0038 wherein “aluminum (Al)”) on the second semiconductor material (second 153 from the top of Fig. 11H) in the opening (region where 150 is formed in Fig. 11H; and see RC in Fig. 11D);
depositing a third semiconductor material (first 152 from the top of Fig. 11H, paragraph 0078) on the second aluminum-containing layer (second 152 from the top of Fig. 11H) in the opening (region where 150 is formed in Fig. 11H; and see RC in Fig. 11D);
the third semiconductor material (first 152 from the top of Fig. 11H) fills the opening (region where 150 is formed in Fig. 11H; and see RC in Fig. 11D); and
removing (see Fig. 11J) portions of the first (third 152 from the top of Fig. 11H) and second aluminum-containing layers (second 152 from the top of Fig. 11H) after depositing the third semiconductor material (first 152 from the top of Fig. 11H).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the invention of Chun to include depositing a first aluminum-containing layer on the first semiconductor material in the opening; depositing a second semiconductor material on the first aluminum-containing layer in the opening; depositing a second aluminum-containing layer on the second semiconductor material in the opening; depositing a third semiconductor material on the second aluminum-containing layer in the opening; the third semiconductor material fills the opening; and removing portions of the first and second aluminum-containing layers after depositing the third semiconductor material, as taught by Kim, since impurities (Kim, paragraph 0047) may be prevented from diffusing in a direction of a channel or a substrate as compared with the case in which impurities are heavily doped into the entire source/drain region 150 (Kim, Fig. 2A, paragraph 0047), and damage to a crystal structure may be prevented as compared with the case in which high-current ion implantation is performed before the contact plug 180 (Kim, Fig. 2A, paragraph 0047) is formed.
Regarding claim 29, Chun discloses a method, comprising:
forming a fin (112 and 122 in Fig. 11, paragraph 0056);
forming a sacrificial gate stack 150 (Fig. 11, paragraph 0061) over a portion of the fin (112 and 122 in Fig. 11);
forming spacers 182 (Fig. 13, paragraph 0066) on sidewalls of the sacrificial gate stack 150 (Fig. 13);
removing (see Fig. 13) exposed portions of the fin (112 and 122 in Fig. 11) to expose a substrate portion 105 (Fig. 13, paragraph 0078); and
depositing a first semiconductor material 210 (Fig. 20, paragraph 0078) over the substrate portion 105 (Fig. 20) and adjacent the fin (116 and 124 in Fig. 20).
Chun does not disclose depositing a first aluminum-containing layer, wherein the first aluminum-containing layer has a first portion disposed on the first semiconductor material and a second portion disposed on the spacers; and
depositing a second semiconductor material on the first portion of the first aluminum-containing layer.
Kim discloses depositing a first aluminum-containing layer (first 152h from the bottom of Fig. 10, paragraph 0078; see paragraph 0079, wherein “the example embodiment of FIGS. 5 and 6 may also be applied to the source/drain region 150a of FIGS. 9 and 10, respectively”; and see 152 in Fig. 5 and paragraph 0038, wherein “aluminum (Al)”), wherein the first aluminum-containing layer (first 152h from the bottom of Fig. 10) has a first portion (lower portion of first 152h from the bottom of Fig. 10) disposed on the first semiconductor material and a second portion (upper portion of first 152h from the bottom of Fig. 10) disposed on the spacers 161 (Fig. 10, paragraph 0024); and
depositing a second semiconductor material (first 153h from the bottom of Fig. 10, paragraph 0078) on the first portion (lower portion of first 152h from the bottom of Fig. 10) of the first aluminum-containing layer (first 152h from the bottom of Fig. 10).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the invention of Chun to include depositing a first aluminum-containing layer, wherein the first aluminum-containing layer has a first portion disposed on the first semiconductor material and a second portion disposed on the spacers; and depositing a second semiconductor material on the first portion of the first aluminum-containing layer, as taught by Kim, since impurities (Kim, paragraph 0047) may be prevented from diffusing in a direction of a channel or a substrate as compared with the case in which impurities are heavily doped into the entire source/drain region 150 (Kim, Fig. 2A, paragraph 0047), and damage to a crystal structure may be prevented as compared with the case in which high-current ion implantation is performed before the contact plug 180 (Kim, Fig. 2A, paragraph 0047) is formed.
Regarding claim 30, Chun in view of Kim discloses the method of claim 29, however Chun does not disclose depositing a second aluminum-containing layer on the second semiconductor material and depositing a third semiconductor material on the second aluminum-containing layer.
Kim discloses depositing a second aluminum-containing layer (second 152h from the bottom of Fig. 10, paragraph 0078; see paragraph 0079, wherein “the example embodiment of FIGS. 5 and 6 may also be applied to the source/drain region 150a of FIGS. 9 and 10, respectively”; and see 152 in Fig. 5 and paragraph 0038, wherein “aluminum (Al)”) on the second semiconductor material (first 153h from the bottom of Fig. 10, paragraph 0078) and depositing a third semiconductor material (third 152h from the bottom of Fig. 10, paragraph 0078) on the second aluminum-containing layer (second 152h from the bottom of Fig. 10).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the invention of Chun to include depositing a second aluminum-containing layer on the second semiconductor material and depositing a third semiconductor material on the second aluminum-containing layer, as taught by Kim, since impurities (Kim, paragraph 0047) may be prevented from diffusing in a direction of a channel or a substrate as compared with the case in which impurities are heavily doped into the entire source/drain region 150 (Kim, Fig. 4A, paragraph 0047), and damage to a crystal structure may be prevented as compared with the case in which high-current ion implantation is performed before the contact plug 180 (Kim, Fig. 4A, paragraph 0047) is formed.
Regarding claim 31, Chun in view of Kim discloses the method of claim 30, however Chun does not disclose a dopant concentration of the third semiconductor material is different from a dopant concentration of the second semiconductor material.
Kim discloses a dopant concentration of the third semiconductor material (third 152h from the bottom of Fig. 10, paragraph 0078) is different (see paragraph 0042, wherein “An impurity concentration of the doping layers 153 may have a range of about 1×10.sup.19 atoms/cm.sup.3 to about 1×10.sup.22 atoms/cm.sup.3, and may be higher than an impurity concentration of the second epitaxial layers 152”) from a dopant concentration of the second semiconductor material (first 153h from the bottom of Fig. 10, paragraph 0078).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the invention of Chun to include a dopant concentration of the third semiconductor material is different from a dopant concentration of the second semiconductor material, as taught by Kim, since impurities (Kim, paragraph 0047) may be prevented from diffusing in a direction of a channel or a substrate as compared with the case in which impurities are heavily doped into the entire source/drain region 150 (Kim, Fig. 4A, paragraph 0047), and damage to a crystal structure may be prevented as compared with the case in which high-current ion implantation is performed before the contact plug 180 (Kim, Fig. 4A, paragraph 0047) is formed.
Regarding claim 32, Chun discloses a method, comprising:
forming a fin (112 and 122 in Fig. 11, paragraph 0056);
forming a sacrificial gate stack 150 (Fig. 11, paragraph 0061) over a portion of the fin (112 and 122 in Fig. 11);
forming spacers 182 (Fig. 13, paragraph 0066) on sidewalls of the sacrificial gate stack 150 (Fig. 13);
removing (see Fig. 13) exposed portions of the fin (112 and 122 in Fig. 11) to expose a substrate portion 105 (Fig. 13, paragraph 0078);
depositing a first semiconductor material 210 (Fig. 20, paragraph 0078) over the substrate portion 105 (Fig. 20) and adjacent the fin (116 and 124 in Fig. 20).
Chun does not disclose depositing a first aluminum-containing layer, wherein the first aluminum-containing layer has a first portion disposed on the first semiconductor material and a second portion disposed on the spacers;
depositing a second semiconductor material on the first portion of the first aluminum-containing layer;
depositing a second aluminum-containing layer on the second semiconductor material and depositing a third semiconductor material on the second aluminum-containing layer; and
removing the second portion of the first aluminum-containing layer.
Kim discloses depositing a first aluminum-containing layer (third 152 from the top of Fig. 11H, paragraph 0038, wherein “aluminum (Al)”), wherein the first aluminum-containing layer (third 152 from the top of Fig. 11H) has a first portion (lower portion of third 152 from the top of Fig. 11H) disposed on the first semiconductor material 151 (Fig. 11H, paragraph 0031) and a second portion (upper portion of third 152 from the top of Fig. 11H) disposed on (see III-III’ of Fig. 11H) the spacers (161 and 190 in Fig. 11H);
depositing a second semiconductor material (second 153 from the top of Fig. 11H, paragraph 0078) on the first portion (lower portion of third 152 from the top of Fig. 11H) of the first aluminum-containing layer (third 152 from the top of Fig. 11H);
depositing a second aluminum-containing layer (second 152 from the top of Fig. 11H, paragraph 0038 wherein “aluminum (Al)”) on the second semiconductor material (second 153 from the top of Fig. 11H) and depositing a third semiconductor material (first 152 from the top of Fig. 11H, paragraph 0078) on the second aluminum-containing layer (second 152 from the top of Fig. 11H); and
removing (see Fig. 11J) the second portion (upper portion of third 152 from the top of Fig. 11H) of the first aluminum-containing layer (third 152 from the top of Fig. 11H).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the invention of Chun to include depositing a first aluminum-containing layer, wherein the first aluminum-containing layer has a first portion disposed on the first semiconductor material and a second portion disposed on the spacers; depositing a second semiconductor material on the first portion of the first aluminum-containing layer; depositing a second aluminum-containing layer on the second semiconductor material and depositing a third semiconductor material on the second aluminum-containing layer; and removing the second portion of the first aluminum-containing layer, as taught by Kim, since impurities (Kim, paragraph 0047) may be prevented from diffusing in a direction of a channel or a substrate as compared with the case in which impurities are heavily doped into the entire source/drain region 150 (Kim, Fig. 2A, paragraph 0047), and damage to a crystal structure may be prevented as compared with the case in which high-current ion implantation is performed before the contact plug 180 (Kim, Fig. 2A, paragraph 0047) is formed.
Claims 19-20 are rejected under 35 U.S.C. 103 as being unpatentable over Chun in view of Kim as applied to claim 18 above, and further in view of Khaderbad et al. (US 2021/0184018) (hereafter Khaderbad).
Regarding claim 19, Chun in view of Kim discloses the method of claim 18, however Chun and Kim do not disclose the second portion of the first aluminum-containing layer and the second portion of the second aluminum-containing layer are removed by a plasma process.
Khaderbad discloses the second portion (side portion of lower portion of 105 in Fig. 9) of the first aluminum-containing layer (lower portion of 105 in Fig. 9, paragraph 0035, wherein “aluminum gallium arsenide”) and the second portion (side portion of upper portion of 105 in Fig. 9) of the second aluminum-containing layer (lower portion of 105 in Fig. 9, paragraph 0035) are removed (see Fig. 11 and paragraph 0089; and see paragraph 0091, wherein a gas mixture including fluoromethane (CH.sub.3F) gas), Ar gas, and H2 gas; and wherein “each of the first and second etch operations can be performed at a temperature ranging from about 10° C. to about 100° C., under a pressure ranging from about 10 mTorr to about 100 mTorr, and at an RF power ranging from about 500 W to about 800 W”) by a plasma process.
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the invention of Chun in view of Kim to include the second portion of the first aluminum-containing layer and the second portion of the second aluminum-containing layer are removed by a plasma process, as taught by Khaderbad, since S/D contact openings 1162 (Khaderbad, Fig. 11, paragraph 0089) can be formed on epitaxial regions 105 (Khaderbad, Fig. 11, paragraph 0089) through ILD layers 130A-130B (Khaderbad, Fig. 11, paragraph 0089) and ESL 128A (Khaderbad, Fig. 11, paragraph 0089).
Regarding claim 20, Chun in view of Kim and Khaderbad discloses the method of claim 19, however Chun and Kim do not disclose the plasma process utilizes a hydrogen plasma.
Khaderbad discloses the plasma process (see Fig. 11 and paragraph 0089; and see paragraph 0091, wherein a gas mixture including fluoromethane (CH.sub.3F) gas), Ar gas, and H2 gas; and wherein “each of the first and second etch operations can be performed at a temperature ranging from about 10° C. to about 100° C., under a pressure ranging from about 10 mTorr to about 100 mTorr, and at an RF power ranging from about 500 W to about 800 W”) utilizes a hydrogen plasma.
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the invention of Chun in view of Kim to include the plasma process utilizes a hydrogen plasma, as taught by Khaderbad, since S/D contact openings 1162 (Khaderbad, Fig. 11, paragraph 0089) can be formed on epitaxial regions 105 (Khaderbad, Fig. 11, paragraph 0089) through ILD layers 130A-130B (Khaderbad, Fig. 11, paragraph 0089) and ESL 128A (Khaderbad, Fig. 11, paragraph 0089).
Claim 23 is rejected under 35 U.S.C. 103 as being unpatentable over Chun in view of Kim as applied to claim 22 above, and further in view of Bomberger et al. (US 2023/0163212) (hereafter Bomberger).
Regarding claim 23, Chun in view of Kim discloses the method of claim 22, however Chun and Kim do not disclose the first aluminum-containing layer is deposited by CVD or PVD.
Bomberger disclose the first aluminum-containing layer 112B (Fig. 9B, paragraph 0067, wherein “aluminum”) is deposited by CVD or PVD (see paragraph 0038, wherein “CVD”) .
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the invention of Chun in view of Kim to include the first aluminum-containing layer is deposited by CVD or PVD, as taught by Bomberger, since a person of ordinary skill has good reason to pursue the known options within his or her technical grasp, in the instant case choosing DVD from the methods listed in paragraph 0038 of Bomberger (e.g. chemical vapor deposition (CVD), physical vapor deposition (PVD), atomic layer deposition (ALD), and/or molecular beam epitaxy (MBE); if this leads to the anticipated success, in the instant case providing a method of forming an aluminum-containing layer, it is likely the product not of innovation but of ordinary skill. KSR Int'l Co. v. Teleflex Inc., 550 U.S. 398, 415-421, 82 USPQ2d 1385, 1395-97 (2007).
Claim 28 is rejected under 35 U.S.C. 103 as being unpatentable over Chun in view of Kim as applied to claim 26 above, and further in view of Chu-Kung et al. (US 2020/0266296) (hereafter Chu-Kung).
Regarding claim 28, Chun in view of Kim discloses the method of claim 26, however Chun does not disclose the first, second, and third semiconductor materials and the first and second aluminum-containing layers form a source/drain epitaxial feature, and the source/drain epitaxial feature comprises about 0.002 atomic percent to about 0.02 atomic percent of aluminum.
Kim discloses the first 151h (Fig. 10, paragraph 0078), second (first 153h from the bottom of Fig. 10, paragraph 0078), and third semiconductor materials (second 153h from the bottom of Fig. 10, paragraph 0078) and the first (first 152h from the bottom of Fig. 10, paragraph 0078; see paragraph 0079, wherein “the example embodiment of FIGS. 5 and 6 may also be applied to the source/drain region 150a of FIGS. 9 and 10, respectively”; and see 152 in Fig. 5 and paragraph 0038, “aluminum (Al)”) and second aluminum-containing layers (second 152h from the bottom of Fig. 10, paragraph 0078) form a source/drain epitaxial feature.
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the invention of Chun to include the first, second, and third semiconductor materials and the first and second aluminum-containing layers form a source/drain epitaxial feature, as taught by Kim, since impurities (Kim, paragraph 0047) may be prevented from diffusing in a direction of a channel or a substrate as compared with the case in which impurities are heavily doped into the entire source/drain region 150 (Kim, Fig. 4A, paragraph 0047), and damage to a crystal structure may be prevented as compared with the case in which high-current ion implantation is performed before the contact plug 180 (Kim, Fig. 4A, paragraph 0047) is formed.
Chun and Kim do not disclose the source/drain epitaxial feature comprises about 0.002 atomic percent to about 0.02 atomic percent of aluminum.
Chu-Kung discloses the source/drain epitaxial feature (112, 106, and 108 in Fig. 1a, paragraph 0021; see paragraph 0057, wherein “graded sections”; and see paragraph 0041, wherein “range of 0 to 40”) comprises about 0.002 atomic percent to about 0.02 atomic percent of aluminum.
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the invention of Chun to include the source/drain epitaxial feature comprises about 0.002 atomic percent to about 0.02 atomic percent of aluminum, as taught by Chu-Kung, in order to reduce (Chu-Kung, paragraph 0010) band-to-band tunneling between the channel region and the source/drain regions of the transistor or source-to-drain tunneling, without increasing the extrinsic resistance of the device. In addition, in the case where the claimed ranges "overlap or lie inside ranges disclosed by the prior art" a prima facie case of obviousness exists. In re Wertheim, 541 F.2d 257, 191 USPQ 90 (CCPA 1976); In re Woodruff, 919 F.2d 1575, 16 USPQ2d 1934 (Fed. Cir. 1990). Note that the specification contains no disclosure of either the critical nature of the claimed ranges or any unexpected results arising therefrom. Where patentability is said to be based upon particular chosen dimensions or upon another variable recited in a claim, the applicant must show that the chosen dimensions are critical. In re Woodruff, 919 f.2d 1575, 16 USPQ2d 1934 (Fed. Cir. 1990).
Response to Arguments
1. Applicant's arguments filed 3/28/2026 have been fully considered.
2. The applicant argues (REMARKS, fourth paragraph in page 7) that “Mohapatra further teaches that "after the indium-rich replacement channels 216 having the aluminum-containing barrier layer 218 are formed, the process flow may continue in a standard manner ... while other flows may employ a gate-later process or so-called replacement metal gate (RMG) process where a dummy gate structure is initially provided ... followed by polysilicon patterning, source drain processing..." (See paragraph [0039]). Thus, the dummy gate has not been formed when the aluminum-containing barrier layer 218 is formed. Furthermore, Mohapatra teaches that the aluminum-containing barrier layer 218 is part of the indium-rich replacement channels 216, and Mohapatra is silent regarding the materials of the source/drain regions.” The applicant’s arguments, “the dummy gate has not been formed when the aluminum-containing barrier layer 218 is formed” and “Mohapatra teaches that the aluminum-containing barrier layer 218 is part of the indium-rich replacement channels 216, and Mohapatra is silent regarding the materials of the source/drain regions”, is persuasive such that the current office action becomes non-final.
Applicant's arguments with respect to claims 13-32 have been considered but are moot in view of the new ground(s) of rejection.
Conclusion
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/L.B.K/Examiner, Art Unit 2813
/STEVEN B GAUTHIER/Supervisory Patent Examiner, Art Unit 2813
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