Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Arguments
Applicant’s arguments with respect to claim(s) have been considered but are moot because the new ground, with a new interpretation of prior art, of rejection has been presented. Please see below.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1 and 2 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Oh (20230187396)
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Regarding claim 1, Oh teaches a semiconductor structure, comprising:
a plurality of interconnection layers (fig. 6: S1, S2 and S3) disposed along a first direction (see bottom of fig. 6 above which shows “1st direction”);
a memory element (fig. 6: CP) in the plurality of interconnection layers;
a first conductive structure (fig. 6: 1st + 2nd) in the plurality of interconnection layers and electrically connected to the memory element,
wherein the first conductive structure comprises a first conductive line (fig. 6: 1st) and a second conductive line (fig. 6: 2nd) disposed along the first direction; and
a second conductive structure (fig. 6: 3rd + 4th) in the plurality of interconnection layers and electrically connected to the memory element,
wherein the second conductive structure comprises a third conductive line (fig. 6: 3rd) and a fourth conductive line (fig. 6: 4th) disposed along the first direction,
wherein the second conductive line and the memory element are in the same interconnection layer (please see fig. 6 which shows CP and 2nd both in S1), and the third conductive line and the fourth conductive line are above the first conductive line and the second conductive line (please see fig. 6 above which shows this limitation), an upper surface of the second conductive line is higher than an upper surface of the memory element (please see figure above which shows 2nd, element 30 as seen in fig. 3, having an upper surface higher than CP)..
Regarding claim 2, Oh teaches a semiconductor structure according to claim 1, wherein the memory element is a resistive memory element (par. 88).
Allowable Subject Matter
Claim 3 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Claim 4 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Claim 5 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Claim 6 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Claim 7 is objected to based on its dependency on claim 6.
Claim 8 is objected to based on its dependency on claim 7.
Claim 9 is objected to based on its dependency on claim 7.
Claim 10 is objected to based on its dependency on claim 6.
Claim 11 is objected to based on its dependency on claim 10.
Claim 12 is objected to based on its dependency on claim 10.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to CALEB E HENRY whose telephone number is (571)270-5370. The examiner can normally be reached Mon-Fri.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Eva Montalvo can be reached at (571) 270-3829. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/CALEB E HENRY/Primary Examiner, Art Unit 2818
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