DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Arguments
Applicant's arguments filed 1/28/2026 have been fully considered but they are not persuasive.
Furthermore, during the updated search examiner discovered further potential prior art references such as (2011040126 (Gaul et al) (Fig. 4, paragraph 0022), Hobart et al. (20150348866) and Yu (20210407942) which could also read on claims.
Furthermore, examiner is in the opinion that incorporation of limitations from paragraph 0213 of the instant application as published i.e. 20240047192, could potentially put the application in condition for an allowance.
Examiner, kindly requests the applicant to schedule for an interview for further explanation
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1-14 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Xu et al. (20160233141)
Regarding Claim 1, in Figs. 1A-5 and paragraphs 0043, 0076 and 0077, Xu et al. discloses a method to process a diamond composite wafer 2/4/6/16, comprising:(a) forming a plurality of through vias 6 in the diamond composite wafer and a first re-distribution layer 20-1 on a first side of the diamond composite wafer;(b) attaching a temporary carrier to the first re-distribution layer, and forming a second re-distribution layer on a second side of the diamond composite wafer (Figs. 1C and 1D); (c) releasing the temporary carrier to form a circuit containing diamond composite wafer (Figs. 4, 5 6).
Regarding Claim 2, in Xu et al, the diamond composite wafer comprises a semiconductor substrate with a predetermined diameter and a plurality of diamond blocks 4 on the semiconductor substrate.
Regarding Claim 3, in Xu et al, the semiconductor substrate comprises a plurality of semiconductor blocks 10 consolidated into the predetermined diameter.
Regarding Claim 4, forming a plurality of IC circuits in the semiconductor substrate (see paragraph 0077)
Regarding Claim 5, the first re-distribution layer is formed on the semiconductor substrate, and the second re-distribution layer is formed on the plurality of diamond blocks (see paragraphs 0076, 0077, and 0079)
Regarding Claim 6, dicing the circuit containing diamond composite wafer into a plurality of circuit containing composite block, each circuit containing composite block comprising one of the diamond blocks and a semiconductor block diced from the semiconductor substrate (see paragraph 0077(.
Regarding Claim 7, each of the plurality of through vias comprises an electrical via (i.e. metal), an optical via, a thermal via and/or a fluidic via.
Regarding Claim 8, the first re-distribution layer and/or the second re-distribution layer comprises an electrical interconnection or an optical waveguide (see paragraph 0076, 0077 and 0079).
Regarding Claim 9, in Figs. 1A-5, the diamond composite wafer comprises a first semiconductor substrate with a predetermined diameter, a plurality of diamond blocks on the first semiconductor substrate, and a second semiconductor substrate with the predetermined diameter on the first semiconductor substrate.
Regarding Claim 10, in paragraphs 0076, 0077 and 0079, the first re-distribution layer is formed on the first semiconductor substrate, and the second re-distribution layer is formed on the second semiconductor substrate.
Regarding Claim 11, in paragraph 0077, dicing the circuit containing diamond composite wafer into a plurality of circuit containing composite block, each circuit containing composite block comprising one of the diamond blocks, a first semiconductor block diced from the first semiconductor substrate, and a second semiconductor block diced from the second semiconductor substrate.
Regarding Claim 12, in Figs. 1A-5, the diamond composite wafer comprises a plurality of diamond blocks consolidated into a predetermined diameter.
Regarding Claim 13, in paragraph 0076, 0077 and 0079, first re-distribution layer and the second re-distribution layer are formed on different sides of the plurality of diamond blocks consolidated with the predetermined diameter
Regarding Claim 14, in paragraph 0077, dicing the circuit containing diamond composite wafer into a plurality of circuit containing composite block, each circuit containing composite block comprising one of the diamond blocks.
Conclusion
THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to FAZLI ERDEM whose telephone number is (571)272-1914. The examiner can normally be reached M-F, 8am-5pm.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Davienne Monbleau can be reached at 571-272-1945. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/FAZLI ERDEM/Primary Examiner, Art Unit 2812 3/1/2026
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