Prosecution Insights
Last updated: April 19, 2026
Application No. 18/233,264

DISPLAY DEVICE AND METHOD FOR MANUFACTURING THE SAME

Non-Final OA §102
Filed
Aug 11, 2023
Examiner
ULLAH, ELIAS
Art Unit
2893
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Samsung Display Co., Ltd.
OA Round
1 (Non-Final)
84%
Grant Probability
Favorable
1-2
OA Rounds
2y 4m
To Grant
92%
With Interview

Examiner Intelligence

Grants 84% — above average
84%
Career Allow Rate
700 granted / 829 resolved
+16.4% vs TC avg
Moderate +8% lift
Without
With
+8.1%
Interview Lift
resolved cases with interview
Typical timeline
2y 4m
Avg Prosecution
22 currently pending
Career history
851
Total Applications
across all art units

Statute-Specific Performance

§101
0.1%
-39.9% vs TC avg
§103
32.8%
-7.2% vs TC avg
§102
55.7%
+15.7% vs TC avg
§112
7.8%
-32.2% vs TC avg
Black line = Tech Center average estimate • Based on career data from 829 resolved cases

Office Action

§102
DETAILED ACTION Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claims 1-2, 4-5, 7-10, 12 and 20 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Lee et al. (Lee. US 2020/0152694 A1). Regarding claims 1 and 20, Lee shows a display device comprising: a substrate (substrate 100 in FIG. 1F and [0033]); a plurality of pixel electrodes (PX in in FIG. 1B and [0033]) on the substrate (substrate 100); a plurality of light emitting elements (LED chip 300 in FIG. 1F) on the plurality of pixel electrodes (PX), each of the plurality of light emitting elements (LED chip 300) comprising a first semiconductor layer (first semiconductor layer 310), an active layer ( active layer 330), and a second semiconductor layer (second semiconductor layer 320), and a barrier layer ( barrier layer 500/520 [0032-0033]) around the plurality of light emitting elements (LED chips 300) and partitioning the plurality of light emitting elements (LED 300), wherein the barrier layer comprises a semiconductor material ([0037] e.g. GaN) and a dopant comprising iron or carbon ([0037] e.g. SiC). Regarding claim 2, Lee shows a display device comprising, wherein the semiconductor material of the barrier layer (barrier layer 500/520) comprises AIGaInN, GaN, AIGaN, InGaN, AIN or InN ([0037]). Regarding claim 4, Lee shows a display device comprising, wherein the second semiconductor layer ( second semiconductor layer 320 in Fig. 1F) is a common layer continuously on the plurality of light emitting elements ( LED 300). Regarding claim 5, Lee shows a display device comprising, wherein the barrier layer ( barrier layer 500/520) is on a second semiconductor region ( second semiconductor layer 320) not overlapping the first semiconductor layer (first semiconductor layer 310) and the active layer (active layer 310). Regarding claim 7, Lee shows a display device comprising, wherein one surface of the barrier layer (barrier layer 500/510) aligns and coincides with one surface of the first semiconductor layer (first semiconductor layer 310 see FIG. 1E). Regarding claim 8, Lee shows a display device comprising, wherein the barrier layer (barrier layer 500/510) is in contact with a portion of the second semiconductor layer (second semiconductor layer 320), the first semiconductor layer (first semiconductor layer 310), and a side surface of the active layer (active layer 330) of each of the plurality of light emitting elements (LED 300). Regarding claim 9, Lee shows a display device comprising, wherein the plurality of light emitting elements (LED 300) comprises a first light emitting element configured to emit light of a blue wavelength band, a second light emitting element configured to emit light of a green wavelength band, and a third light emitting element configured to emit light of a red wavelength band ([0041]). Regarding claim 10, Lee shows a display device comprising, wherein the active layer (active layer 330) of the first light emitting element (LED 300), the active layer (active layer 330) of the second light emitting element (LED 300), and the active layer of the third light emitting element comprise different amount of indium doped into a semiconductor material ([0041]). Regarding claim 12, Lee shows a method of a display device, the method comprising: forming a third semiconductor layer (semiconductor layer 320) and a second semiconductor layer (semiconductor layer 310) on a target substrate (substrate 100); forming a first insulating member ([0057]) on the second semiconductor layer (semiconductor layer 310) and forming a barrier layer (barrier layer 500) from the second semiconductor layer (semiconductor layer 310); forming a plurality of openings by removing the first insulating layer using a hard mask ( [0073 +]); forming light emitting elements (LED 300) in the plurality of openings; and bonding the light emitting elements to a semiconductor circuit board (module substrate 1000), wherein the barrier layer is grown from the second semiconductor layer (semiconductor layer 310) and is formed by doping iron or carbon as a dopant ([0037] e.g. SiC). Regarding claim 15, Lee shows a method of a display device, wherein the barrier layer (barrier layer 500/510) has a same length as the first insulating layer ( part of 200). Allowable Subject Matter Claims 3, 6, 11, 13-19 objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to ELIAS M ULLAH whose telephone number is (571)272-1415. The examiner can normally be reached M-F at 8AM-5PM EST. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Yara Green can be reached at 571-270-3035. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /ELIAS ULLAH/Primary Examiner, Art Unit 2893
Read full office action

Prosecution Timeline

Aug 11, 2023
Application Filed
Nov 29, 2025
Non-Final Rejection — §102 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
84%
Grant Probability
92%
With Interview (+8.1%)
2y 4m
Median Time to Grant
Low
PTA Risk
Based on 829 resolved cases by this examiner. Grant probability derived from career allow rate.

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