DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
Response to Amendments/Arguments
The amendment made to claim 7, as filed on February 2, 2026, is acknowledged.
The amendment made to claim 7 has overcome the previous rejection to the claim under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as set forth in the Office Action mailed on October 30, 2025.
Applicant's arguments, see Remarks filed on February 2, 2026, with respect to claims 1, 16 and 18 have been fully considered but they are not persuasive.
The Applicant argues that “[t]he Office Action cites to depositing SiBrxOy in paragraphs [0050]-[0051] of Horiguchi in an effort to reject this feature, but contains no citation to anywhere in Horiguchi that discusses etching of a mask material simultaneously with this deposition”. However, the Office Action does point to paragraph 0051, which disclose “as the etching for forming holes in the silicon layer 210 progresses, deposits (e.g., SiBrxOy, x and y being combination ratios) become excessively accumulated on the opening portions of the mask”. The Office Action also points to Figs. 3 and 4, which shows both etching the mask and depositing SiBrxOy take place during the etching process (comparison of Figs. 3 and 4A, paragraph 0049-0051).
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office Action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1-4, 8-15 and 18-20 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Horiguchi et al. (US20040222190).
Regarding claim 1, Horiguchi discloses a semiconductor processing method (abstract) comprising: i) forming plasma effluents of a plurality of precursors comprising an etchant precursor, an oxygen-containing precursor, and a silicon-and-fluorine-containing precursor, wherein the silicon-and-fluorine-containing precursor comprises silicon tetrafluoride (NF3 reads on an etchant precursor, O2 reads on an oxygen-containing precursor, SiF4 reads on a silicon-and-fluorine-containing precursor, steps S3 and S4 in Table 1); ii) contacting a silicon-containing material and a mask material with the plasma effluents in a processing region of a semiconductor processing chamber, wherein a substrate is disposed on a substrate support within the processing region, wherein the silicon-containing material is disposed on the substrate and the mask material is disposed on the silicon-containing material, wherein the mask material has one or more apertures therein that allow the plasma effluents access to the silicon-containing material, wherein the mask material comprises a dielectric material (silicon layer 210 reads on a silicon-containing material, silicon dioxide mask 204 reads on a dielectric material; paragraphs 0035-0036 and 0042; Figs. 1 and 3); iii) etching the silicon-containing material with the plasma effluents to form and/or deepen one or more features in the silicon-containing material (paragraph 0046 and Fig. 4); and iv) simultaneously etching the mask material and depositing a silicon-and-oxygen-containing material on the mask material with the plasma effluents (SiBrxOy reads on a silicon-and-oxygen-containing material, paragraphs 0049-0051; and comparison of Fig. 4A with Fig. 3).
Regarding claim 2, Horiguchi discloses wherein the etchant precursor comprises a fluorine-containing precursor that is not silicon tetrafluoride (NF3, Table 1).
Regarding claim 3, Horiguchi discloses wherein a volumetric ratio of the oxygen-containing precursor relative to the silicon-and-fluorine-containing precursor is less than 50:1 (steps S3 and S4 in Table 1).
Regarding claim 4, Horiguchi discloses wherein a volumetric ratio of the etchant precursor relative to the oxygen-containing precursor is less than 20:1 (steps S3 and S4 in Table 1).
Regarding claim 8, Horiguchi discloses wherein the method selectively removes the silicon-containing material relative to the mask material (the total thickness of the silicon oxide mask material is 700-2200nm, the etched thickness of the mask material is less than the above range, the thickness removed for the silicon-containing material is 7810nm, paragraph 0034 and Fig. 5).
Regarding claim 9, Horiguchi discloses wherein the method removes the silicon-containing material relative to the mask material at a selectivity greater than or about 4 (the total thickness of the silicon oxide mask material is 700-2200nm, the etched thickness of the mask material is less than the above range, the thickness removed for the silicon-containing material is 7810nm, paragraph 0034 and Fig. 5).
Regarding claim 10, Horiguchi discloses wherein one or more apertures are characterized by a critical dimension of less than or about 1000 nm (Fig. 5).
Regarding claim 11, Horiguchi discloses wherein after the etching of the silicon-containing material, the one or more features are characterized by a depth of greater than 100 nm (7.65mm, Fig. 5C).
Regarding claim 12, Horiguchi discloses wherein after the etching of the silicon-containing material, the one or more features are characterized by an aspect ratio of greater than 5:1 (Fig. 5C).
Regarding claim 13, Horiguchi discloses wherein a pressure in the processing region is maintained at 200 mTorr (steps S3 and S4 in Table 1).
Regarding claim 14, Horiguchi discloses wherein a temperature in the processing region is maintained at about 60° C (paragraph 0042).
Regarding claim 15, Horiguchi discloses wherein the plasma effluents are generated at a plasma power of less than 5000 W (Table 1).
Regarding claim 18, Horiguchi discloses a semiconductor processing method (abstract) comprising: i) forming plasma effluents of a plurality of precursors comprising an etchant precursor, an oxygen-containing precursor, and silicon tetrafluoride, wherein a volumetric ratio of the oxygen-containing precursor relative to the silicon tetrafluoride is less than or about 50:1 (NF3 reads on an etchant precursor, O2 reads on an oxygen-containing precursor, SiF4 reads on a silicon-and-fluorine-containing precursor, steps S3 and S4 in Table 1); ii) contacting a silicon-containing material and a mask material with the plasma effluents in a processing region of a semiconductor processing chamber, wherein a substrate is disposed on a substrate support within the processing region, wherein the silicon-containing material is disposed on the substrate and the mask material is disposed on the silicon-containing material, wherein the mask material has one or more apertures therein that allow the plasma effluents access to the silicon-containing material, wherein the mask material comprises a dielectric material (silicon dioxide mask reads on a dielectric material; paragraphs 0035-0036; Figs. 1 and 3); iii) etching the silicon-containing material with the plasma effluents to deepen one or more features in the silicon-containing material, wherein the silicon-containing material defines sidewalls and a bottom of the one or more features along the substrate and each of the one or more apertures defines an opening at a top of each of the one or more features (paragraph 0046 and Fig. 4); and iv) simultaneously etching the mask material and depositing a silicon-and-oxygen-containing material on the mask material with the plasma effluents, wherein the method selectively removes the silicon-containing material relative to the mask material (SiBrxOy reads on a silicon-and-oxygen-containing material, paragraphs 0049-0051; and comparison of Fig. 4A with Fig. 3).
Regarding claim 19, Horiguchi discloses wherein the plasma effluents are first plasma effluents of a first plurality of precursors, and wherein the method further comprises: forming second plasma effluents from a second plurality of precursors that do not include silicon tetrafluoride (the plurality of precursors used in step S2 reads on a second plurality of precursors, Table 1); and etching the silicon-containing material with the second plasma effluents to form and/or deepen the one or more features in the silicon-containing material (paragraph 0046 and Fig. 4).
Regarding claim 20, Horiguchi discloses wherein the method removes the silicon-containing material relative to the mask material at a selectivity greater than or about 4 (the total thickness of the silicon oxide mask material is 700-2200nm, the etched thickness of the mask material is less than the above range, the thickness removed for the silicon-containing material is 7810nm, paragraph 0034 and Fig. 5).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office Action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claims 5-6 are rejected under 35 U.S.C. 103 as being unpatentable over Horiguchi et al. (US20040222190) as applied to claim 1 above, in view of Wang et al. (CN110571150, a machine-translated English version is used).
Regarding claim 5, Horiguchi is silent about wherein a carrier gas is present when forming plasma effluents. However, Horiguchi discloses that the method is a plasma etching process used to fabricate high aspect ratio openings (paragraphs 0009-0010). In addition, Wang teaches that in a plasma etching process used to fabricate high aspect ratio openings, a carrier gas can be added to improve the etching capability and reducing bowing of sidewalls (paragraphs 0002 and 0027). Therefore, it would have been obvious to one of ordinary skill, in the art before the effective filing date of the claimed invention, to add a carrier gas in the method of Horiguchi in order to improve the etching capability and reducing bowing of sidewalls as taught by Wang, with a reasonable expectation of success.
Regarding claim 6, Horiguchi in view of Wang discloses wherein a volumetric ratio of the carrier gas relative to the oxygen-containing precursor is less than 10:1 (carrier gas comprises 4%-21% of the feed gas, Wang, paragraph 0065; O2 comprises 5% of the rest of the feed, Horiguchi, step S3, Table 1).
Claim 7 is rejected under 35 U.S.C. 103 as being obvious over Horiguchi et al. (US20040222190) as applied to claim 1 above.
Regarding claim 7, Horiguchi discloses wherein silicon-containing material comprises a silicon layer (silicon layer 210, paragraph 0034 and Fig. 3). Horiguchi is silent about the specific types of silicon; however, crystalline silicon and amorphous silicon are well-known types of silicon used in semiconductor manufacturing processes.
Claims 16-17 are rejected under 35 U.S.C. 103 as being unpatentable over Horiguchi et al. (US20040222190) in view of Wang et al. (CN110571150, a machine-translated English version is used).
Regarding claim 16, Horiguchi disclosed a semiconductor processing method (abstract) comprising: i) forming plasma effluents of a plurality of precursors, wherein the plurality of precursors comprises an etchant precursor, an oxygen-containing precursor, and a silicon-and-fluorine-containing precursor, wherein the silicon-and-fluorine-containing precursor comprises silicon tetrafluoride, wherein a volumetric ratio of the oxygen-containing precursor relative to the silicon-and-fluorine-containing precursor is less than or about 50:1, wherein a volumetric ratio of the etchant precursor relative to the oxygen-containing precursor is less than or about 20:1 (NF3 reads on an etchant precursor, O2 reads on an oxygen-containing precursor, step S3 in Table 1); ii) contacting a silicon-containing material and a mask material with the plasma effluents in a processing region of a semiconductor processing chamber, wherein a substrate is disposed on a substrate support within the processing region, wherein the silicon-containing material is disposed on the substrate and the mask material is disposed on the silicon-containing material, wherein the mask material has one or more apertures therein that allow the plasma effluents access to the silicon-containing material, wherein the mask material comprises a dielectric material (silicon dioxide mask reads on a dielectric material; paragraphs 0035-0036; Figs. 1 and 3); iii) etching the silicon-containing material with the plasma effluents to form and/or deepen one or more features in the silicon-containing material, wherein the silicon-containing material defines sidewalls and a bottom of the one or more features along the substrate and each of the one or more apertures defines an opening at a top of each of the one or more features (paragraph 0046 and Fig. 4); and iv) simultaneously etching the mask material and depositing a silicon-and-oxygen-containing material on the mask material with the plasma effluents, wherein the method selectively removes the silicon-containing material relative to the mask material (SiBrxOy reads on a silicon-and-oxygen-containing material, paragraphs 0049-0051; and comparison of Fig. 4A with Fig. 3).
Horiguchi is silent about wherein a carrier gas is present when forming plasma effluents and wherein a volumetric ratio of the carrier gas relative to the oxygen-containing precursor is less than 10:1. However, Horiguchi discloses that the method is a plasma etching process used to fabricate high aspect ratio openings (paragraphs 0009-0010). In addition, Wang teaches that in a plasma etching process used to fabricate high aspect ratio openings, a carrier gas can be added to improve the etching capability and reducing bowing of sidewalls (paragraphs 0002 and 0027). Therefore, it would have been obvious to one of ordinary skill, in the art before the effective filing date of the claimed invention, to add a carrier gas in the method of Horiguchi in order to improve the etching capability and reducing bowing of sidewalls as taught by Wang, with a reasonable expectation of success. Horiguchi in view of Wang discloses wherein a volumetric ratio of the carrier gas relative to the oxygen-containing precursor is less than 10:1 (carrier gas comprises %-21% of the feed gas, Wang, paragraph 0065; O2 comprises 5% of the rest of the feed, Horiguchi, step S3, Table 1).
Regarding claim 17, Horiguchi discloses wherein the method removes the silicon-containing material relative to the mask material at a selectivity greater than or about 4 (the total thickness of the silicon oxide mask material is 700-2200nm, the etched thickness of the mask material is less than the above range, the thickness removed for the silicon-containing material is 7810nm, paragraph 0034 and Fig. 5).
Conclusion
THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any extension fee pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to JIONG-PING LU whose telephone number is (571) 270-1135. The examiner can normally be reached on M-F: 9:00am – 5:00pm. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Joshua L Allen, can be reached at telephone number (571)270-3176. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/JIONG-PING LU/
Primary Examiner, Art Unit 1713