DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Arguments
Applicant's arguments filed 5/6/26 have been fully considered.
Applicant has argued Neither Tanaka nor Cui provides a prima facie showing of forming plasma effluents of the fluorine-containing precursor and the hydrogen-containing precursor at a plasma power between about 750 W and about 1,250 W. However, the argument is not persuasive because Tanaka et al. teaches (Paragraphs 37, 47) a plasma power between 750 and 1250 W is used. Although the bias power (LF power) mainly contributes to drawing ions to the substrate, it is also implicit that some of the LF power will contribute to plasma generation (forming plasma effluents). Tanaka et al. does not expressly teach plasma power at 750-1250W and bias greater than 1500W (Claim 8). However, the power range is well known in the art of low temperature plasma etch of silicon-containing material using a fluorine-containing precursor and a hydrogen-containing precursor. For example, Roberts teaches power 200-8000W and bias 2-18kW. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to provide plasma power at 750-1250W and bias greater than 1500W for etching with predictable results. Further applicant has not provided a showing of unexpected results commensurate in scope with the claimed ranges.
Applicant has argued Cui does not cure the deficiency of Tanaka and does not provide a prima facie showing of a semiconductor processing chamber operating pressure being maintained at less than or about 1 Torr. However, the argument is not persuasive because the pressure range is well known in the art of low temperature plasma etch of silicon-containing material using a fluorine-containing precursor and a hydrogen-containing precursor. For example, Roberts et al. (US Patent 10,361,092) teaches a pressure less than 1Torr or less than 500 mTorr. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to provide plasma pressure less than 1 Torr for etching silicon-containing material using a fluorine-containing precursor and a hydrogen-containing precursor with predictable results. Further applicant has not provided a showing of unexpected results commensurate in scope with the claimed range.
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Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1-5, 7, 10 and 11 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by US Publication 2020/0263309 to Tanaka et al.
Regarding Claim 1, Tanaka et al. teaches a semiconductor processing method comprising: providing a fluorine-containing precursor and a hydrogen-containing precursor (Paragraphs 26, 29 and 65) to a processing region (Fig 5) of a semiconductor processing chamber (1), wherein a substrate (W) is housed in the processing region, and wherein a layer of a silicon-containing material (Paragraph 25) is disposed on the substrate; forming plasma effluents (Paragraphs 4, 12, 23, 28-32, 65-70 and 75) of the fluorine-containing precursor and the hydrogen-containing precursor; and contacting the substrate with the plasma effluents of the fluorine-containing precursor and the hydrogen-containing precursor, wherein the contacting etches a feature in the layer of silicon-containing material, and wherein a substrate support pedestal temperature is maintained (Paragraphs 28 and 31-56) at less than or about -20 °C during the semiconductor processing method.
Regarding Claim 1, Tanaka et al. teaches (Paragraphs 37, 47) a plasma power between 750 and 1250 W is used. Although the bias power (LF power) mainly contributes to drawing ions to the substrate, it is also implicit that some of the LF power will contribute to plasma generation (forming plasma effluents).
Regarding Claim 2, Tanaka et al. teaches (Paragraphs 26, 29 and 65) the
fluorine-containing precursor comprises nitrogen trifluoride (NF₃), carbon tetrafluoride (CF4), hexafluorobutadiene (C4F6), or fluoromethane (CH₃F).
Regarding Claim 3, Tanaka et al. teaches (Paragraphs 26, 29 and 65) the
hydrogen-containing precursor comprises diatomic hydrogen (H₂).
Regarding Claim 4, Tanaka et al. teaches (Paragraphs 4, 12, 25, 42) the silicon-
containing material comprises silicon oxide.
Regarding Claim 5, Tanaka et al. teaches (Paragraphs 62, 65) the plasma
effluents of the fluorine-containing precursor and the hydrogen-containing precursor forms a hydrogen fluoride (HF)-containing plasma.
Regarding Claim 7, Tanaka et al. teaches (Paragraphs 30, 41, 56 and 57)
applying a bias power while contacting the substrate with the plasma effluents of the fluorine-containing precursor and the hydrogen-containing precursor.
Regarding Claim 10, Tanaka et al. teaches (Paragraphs 18, 25 and 27) the
feature in the layer of oxygen-containing material is characterized by an aspect ratio of greater than or about 5:1.
Regarding Claim 11, Tanaka et al. teaches (Paragraphs 28, 31 and 61) the
substrate support pedestal temperature is less than or about -60 °C.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 9 and 12 are rejected under 35 U.S.C. 103 as being unpatentable
over US Publication 2020/0263309 to Tanaka et al.
Regarding Claim 9, as applied above to Claim 1, Tanaka et al. teaches
the method of the invention substantially as claimed, but does not expressly teach the feature in the layer of oxygen-containing material is characterized by a critical
dimension of less than or about 30 nm. However, Tanaka et al. teaches (Paragraph 25) high aspect ratio etching for memory devices such as 3D-NAND or DRAM. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to perform etching such that the feature in the layer of oxygen-containing material is characterized by a critical dimension of less than or about 30 nm in order to form a reduced dimension memory device with predictable results.
Regarding Claim 12, Tanaka et al. teaches the method of the invention substantially as claimed, but does not expressly teach the contacting etches the feature in the layer of oxygen-containing material at an etch rate of greater than or about 100 nm/min. However, Tanaka et al. teaches the etching rate may be optimized with control of result effective variables such as temperature (Figure 2). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to an etch rate of greater than or about 100 nm/min with predictable results. Further since the material, etching chemistry and process conditions are the same in Tanaka et al. and the Claimed invention, the same etching rate would reasonably be expected to be achieved or else is the result of essential limitations which have not been claimed.
Claims 8 and 13-21 are rejected under 35 U.S.C. 103 as being unpatentable over US Publication 2020/0263309 to Tanaka et al. in view of US Patent 10,361,092 to Roberts et al.
Regarding Claim 8, Tanaka et al. teaches (Paragraphs 30, 41, 56 and 57) the
bias power is greater than or about 1,500 W. Tanaka et al. does not expressly teach plasma power at 750-1250W and bias greater than 1500W.
However, the power range is well known in the art of low temperature plasma etch of silicon-containing material using a fluorine-containing precursor and a hydrogen-containing precursor. For example, Roberts teaches power 200-8000W and bias 2-18kW (Col. 3, Line 58- Col. 4, Line 18). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to provide plasma power at 750-1250W and bias greater than 1500W for etching with predictable results. Further applicant has not provided a showing of unexpected results commensurate in scope with the claimed ranges.
Regarding Claims 13, 17, and 21 as applied above to Claim 1, Tanaka et al. teaches the method of the invention substantially as claimed, but does not expressly teach plasma pressure less than 1 Torr or less than 500 mTorr. However, the pressure range is well known in the art of low temperature plasma etch of silicon-containing material using a fluorine-containing precursor and a hydrogen-containing precursor. For example, Roberts teaches a pressure less than 1Torr or less than 500 mTorr (Col. 3, Line 58- Col. 4, Line 18). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to provide plasma pressure less than 1 Torr for etching silicon-containing material using a fluorine-containing precursor and a hydrogen-containing precursor with predictable results. Further applicant has not provided a showing of unexpected results commensurate in scope with the claimed range.
Further regarding Claim 13, Tanaka et al. does not expressly teach the feature in the layer of oxygen-containing material is characterized by a critical dimension of less than or about 30 nm. However, Tanaka et al. teaches (Paragraph 25) high aspect ratio etching for memory devices such as 3D-NAND or DRAM. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to perform etching such that the feature in the layer of oxygen-containing material is characterized by a critical dimension of less than or about 30 nm in order to form a reduced dimension memory device with predictable results.
Regarding Claim 14, Tanaka et al. teaches (Paragraphs 62, 65) the plasma
effluents of the fluorine-containing precursor and the hydrogen-containing precursor forms a hydrogen fluoride (HF)-containing plasma.
Regarding Claim 15, Tanaka et al. teaches (Paragraph 25) the layer of the
silicon-and-oxygen-containing, material is a layer in a DRAM structure.
Regarding Claim 16, Tanaka et al. teaches (Paragraphs 28 and 31-56) a
substrate support pedestal temperature is between about -100 °C about -20 °C.
Regarding Claim 18, Tanaka et al. teaches semiconductor processing method
comprising: providing etchant precursors to a processing region (Fig 5) of a
semiconductor processing chamber (1), wherein a substrate (W) is housed in the
processing region, and wherein a layer of a silicon-containing material is disposed on the substrate (Paragraph 25); forming plasma effluents of the etchant precursors (Paragraphs 4, 12, 23, 28-32, 65-70 and 75), wherein the plasma effluents comprise a hydrogen fluoride (HF)-containing plasma (Paragraphs 62, 65); and contacting the substrate with the hydrogen fluoride (HF)-containing plasma, wherein the contacting etches a feature in the layer of silicon-containing material, and wherein a substrate support pedestal temperature is maintained (Paragraphs 28 and 31-56) at less than or about -40 °C during the semiconductor processing method.
Tanaka et al. does not expressly teach plasma pressure less than 1 Torr. However, the range is well known in the art of low temperature plasma etch of silicon-containing material using a fluorine-containing precursor and a hydrogen-containing precursor. For example, Roberts teaches a pressure less than 1Torr . It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to provide plasma pressure less than 1 Torr for etching silicon-containing material using a fluorine-containing precursor and a hydrogen-containing precursor with predictable results. Further applicant has not provided a showing of unexpected results commensurate in scope with the claimed range.
Regarding Claim 19, Tanaka et al. teaches (Paragraphs 26, 29 and 65) the
etchant precursors comprise one or more of nitrogen trifluoride (NF₃), carbon
tetrafluoride (CF4), hexafluorobutadiene (C4F6), and fluoromethane (CH₃F).
Regarding Claim 20, Tanaka et al. teaches (Paragraphs 30, 41, 56 and 57)
applying a bias power while contacting the substrate with the plasma effluents of the etchant precursors, wherein the bias power is greater than or about 1,250 W such as 2000W (Paragraph 41)
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Roberts P Culbert whose telephone number is (571)272-1433. The examiner can normally be reached Monday thru Thursday 7:30 AM-6 PM EST.
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/ROBERTS P CULBERT/Primary Examiner, Art Unit 1716
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