Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 1-12 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claim 1 recites the limitation "the greatest width" in line 8. There is insufficient antecedent basis for this limitation in the claim.
Claim 1 recites the limitation "the smallest width" in line 9. There is insufficient antecedent basis for this limitation in the claim.
Claim 2 recites the limitation "the smallest width" in line 1. There is insufficient antecedent basis for this limitation in the claim.
Claim 3 recites the limitation "the greatest width" in line 1. There is insufficient antecedent basis for this limitation in the claim.
Claim 4 recites the limitation "the greatest width" in line 1. There is insufficient antecedent basis for this limitation in the claim.
Claims 5-12 are rejected based solely upon their dependency.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 1, 4-9, 11 and 12 is/are rejected under 35 U.S.C. 102a1 as being anticipated by Huang et al. (US Pat. Pub. 2020/0035779).
Regarding claim 1, Huang teaches the interconnection structure, comprising:
a first dielectric layer [fig. 1, dielectric layer 120, containing 122, 124, 126, 128, 130, 132, 136, and 140];
a second dielectric layer disposed on the first dielectric layer [fig. 1, 150];
a first conductive layer disposed in the first dielectric layer [fig. 1, 134c]; and
a conductive via electrically connected with the first conductive layer and extending through the first dielectric layer and the second dielectric layer [fig. 1, 160c];
wherein the greatest width of the conductive via is greater than 2.5 times the smallest width of the conductive via [fig. 1, the top of 160c is greater than 2.5 times the width of the bottom most portion of 160c where it is smallest].
Regarding claim 4, Huang discloses the interconnection structure of claim 1, wherein the greatest width of the conductive via is exposed from a third dielectric layer disposed on the second dielectric layer [fig. 1, 160c’s greatest width is exposed from a third dielectric 152 on the second dielectric layer 150].
Regarding claim 5, Huang teaches the interconnection structure of claim 1, wherein the first dielectric layer and the second dielectric layer have different etching rates with respect to an etchant [paragraphs [0026 and 0033], 140 can be PEOX, 150 can be PE-SiN, these materials have different etching rates].
Regarding claim 6, Huang discloses the interconnection structure of claim 1, wherein the first conductive layer is partially covered by the first dielectric layer [fig. 1, 134c is embedded within 120, therefore it is partially covered, alternatively because there is an opening with 160c touching 134c it is only partially covered by 120].
Regarding claim 7, Huang teaches the interconnection structure of claim 1, further comprising:
A second conductive layer disposed in the first dielectric layer and spaced apart from the first conductive layer [fig. 1, 134b].
Regarding claim 8, Huang discloses interconnection structure of claim 7, wherein the first dielectric layer comprises a protruding portion over the second conductive layer protruding into the second dielectric layer [fig. 1, 118 can be considered part of the first dielectric layer, 118 protrudes into 150 as it has an intervening layer between it and 120].
Regarding claim 9, Huang teaches the interconnection structure of claim 1, wherein the conductive via further comprises a third lateral surface connected between the first and second lateral surfaces of the conductive via, and wherein the first lateral surface, the second lateral surface, and the third lateral surface have different slopes [160c has three slopes, all at different angles, two of the slopes are within 150].
Regarding claim 11, Huang discloses the interconnection structure of claim 1, wherein the conductive via comprises a barrier layer directly contacting the first dielectric layer and the second dielectric layer [fig. 1, 164].
Regarding claim 12, Huang teaches the interconnection structure of claim 1, wherein the conductive via comprises lateral surfaces of more than two different slopes [fig. 1, 160c has three slopes, all at different angles].
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 2, 3, and 10 is/are rejected under 35 U.S.C. 103 as being unpatentable over Huang as applied to claims 1,4-9, 11 and 12 above, and further in view of the following arguments.
Regarding claim 2, Huang fails to teach the smallest width of the conductive via is about 50nm, they do however teach the thickness of a plurality of layers, including etch stop layer 138 being 25nm, and fig 1 shows the width of the bottom of 160c as a similar dimension as the thickness of 138.
One of ordinary skill in the art would have been led to the recited dimensions through routine experimentation and optimization to achieve desired interconnect performance. Applicant has not disclosed that the dimensions are for a particular unobvious purpose, produce an unexpected result, or are otherwise critical, and it appears prima facie that the process would possess utility using another dimension. Indeed, it has been held that mere dimensional limitations are prima facie obvious absent a disclosure that the limitations are for a particular unobvious purpose, produce an unexpected result, or are otherwise critical. See, for example, In re Rose, 220 F.2d 459, 105 USPQ 237 (CCPA 1955); In re Rinehart, 531 F.2d 1048, 189 USPQ 143 (CCPA 1976); Gardner v. TEC Systems, Inc., 725 F.2d 1338, 220 USPQ 777 (Fed. Cir. 1984), cert. denied, 469 U.S. 830, 225 USPQ 232 (1984); In re Dailey, 357 F.2d 669, 149 USPQ 47 (CCPA 1966). See also MPEP 2144.04(IV)(B).
Regarding claim 3, Huang fails to teach the width of the top surface of the conducive via is between 120nm and 125nm. However, one of ordinary skill in the art would have been led to the recited dimensions through routine experimentation and optimization to achieve wide enough surface for contacting device reliably. Applicant has not disclosed that the dimensions are for a particular unobvious purpose, produce an unexpected result, or are otherwise critical, and it appears prima facie that the process would possess utility using another dimension. Indeed, it has been held that mere dimensional limitations are prima facie obvious absent a disclosure that the limitations are for a particular unobvious purpose, produce an unexpected result, or are otherwise critical. See, for example, In re Rose, 220 F.2d 459, 105 USPQ 237 (CCPA 1955); In re Rinehart, 531 F.2d 1048, 189 USPQ 143 (CCPA 1976); Gardner v. TEC Systems, Inc., 725 F.2d 1338, 220 USPQ 777 (Fed. Cir. 1984), cert. denied, 469 U.S. 830, 225 USPQ 232 (1984); In re Dailey, 357 F.2d 669, 149 USPQ 47 (CCPA 1966). See also MPEP 2144.04(IV)(B).
Regarding claim 10, Huang fails to specifically teach the electrical resistance of the conductive via is between 65 ohms and 70 ohms. However, one of ordinary skill in the art would have been led to the recited resistance range through routine experimentation and optimization to achieve a desired interconnect performance. Generally, differences in concentration or resistivity will not support the patentability of subject matter encompassed by the prior art unless there is evidence indicating such concentration or temperature is critical. "[W]here the general conditions of a claim are disclosed in the prior art, it is not inventive to discover the optimum or workable ranges by routine experimentation." In re Aller, 220 F.2d 454, 456, 105 USPQ 233, 235 (CCPA 1955).
Conclusion
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/JOHN M PARKER/Examiner, Art Unit 2899