Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Election/Restrictions
Applicant’s election without traverse of Species IV in the reply filed on 1/29/2026 is acknowledged. The limitation “third wire” in claims 14-15 is stated in Species II Fig. 2A and the limitation “sixth wire” of claim 5 is not shown in elected embodiment and as such, these claims withdrawn from examination.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
1. Claim(s) 1-4,7-13,16 are rejected under 35 U.S.C. 103 as being unpatentable over US 20230038892 A1 (Chen) in view of US 20210375783 A1 (Chiu).
Regarding claim 1, Chen shows (Fig. 3) a package structure (300, para 47), comprising:
PNG
media_image1.png
438
770
media_image1.png
Greyscale
a wiring structure (324, redistribution layer, para 48) having a top surface;
a first electronic device (104, para 21) disposed over the top surface of the wiring structure, having a bottom surface facing the top surface of the wiring structure, and including a plurality of first wires (338 below 104, interconnects, para 49); and
a reinforcement structure (332, epoxy molding interposer frame for rigidity of package, para 48) disposed over the top surface of the wiring structure.
Chen does not specifically show the reinforcement structure including a plurality of second wires directly contacting the plurality of first wires to reduce a variation of an elevation of the bottom surface of the first electronic device with respect to the top surface of the wiring structure.
Chiu shows (Fig. 5) the reinforcement structure (5) including a plurality of second wires (520 below 104) directly contacting the plurality of first wires (522).
It would have been obvious to one of ordinary skill in the art, at or before the effective filing date of the invention was made, to add the invention of Chiu, with second wires, to the invention of Chen.
The motivation to do so is that the combination produces the predictable result of having connectivity through the reinforcement structure.
The examiner notes that a recitation of the intended use of the claimed invention must result in a structural difference between the claimed invention and the prior art in order to patentably distinguish the claimed invention from the prior art. If the prior art is capable of performing the intended use, then it meets the claim. See, e.g., In re Pearson, 181 USPQ 641(CCPA); In re Otto, 136 USPQ 458,459 (CCPA 1963). The recitation of “to reduce a variation of an elevation of the bottom surface of the first electronic device with respect to the top surface of the wiring structure” does not distinguish the present invention over the prior art Chiu, which teaches the structure as claimed.
Regarding claim 2, Chen as previously modified with Chiu shows further comprising a second electronic device (Chen, 102, para 21) disposed over the top surface of the wiring structure (Chen, 324), wherein the second electronic device and the first electronic device are disposed side by side, the second electronic device has a bottom surface facing the top surface of the wiring structure and includes a plurality of third wires (338 below 102), and the reinforcement structure further includes a plurality of fourth wires (Chiu, 520 below 102) directly contacting the plurality of third wires.
The examiner notes that a recitation of the intended use of the claimed invention must result in a structural difference between the claimed invention and the prior art in order to patentably distinguish the claimed invention from the prior art. If the prior art is capable of performing the intended use, then it meets the claim. See, e.g., In re Pearson, 181 USPQ 641(CCPA); In re Otto, 136 USPQ 458,459 (CCPA 1963). The recitation of “to reduce a variation of an elevation of the bottom surface of the second electronic device with respect to the top surface of the wiring structure” does not distinguish the present invention over the prior art Chiu, which teaches the structure as claimed.
Regarding claim 3, Chen as previously modified with Chiu shows the reinforcement structure, first electronic device and the second electronic device.
Chen as previously modified with Chiu does not show wherein the reinforcement structure further includes a bridge interconnector configured to bridge communication between the first electronic device and the second electronic device.
Chiu (Fig. 5) shows wherein the reinforcement structure (as applicable to Fig. 3 embodiment as well, para 69) further includes a bridge interconnector (330, para 69) configured to bridge communication between the first electronic device (102 left) and the second electronic device (102 right).
It would have been obvious to one of ordinary skill in the art, at or before the effective filing date of the invention was made, to add the invention of Chen Fig. 5 embodiment, with bridge interconnector, to the invention of Chen as previously modified with Chiu.
The motivation to do so is that the combination produces the predictable result of neighboring dies to be interconnected.
Regarding claim 4, Chen as previously modified with Chiu shows wherein a group of the plurality of second wires (Chiu, 520) is spaced apart from the plurality of first wires (Chiu, 522).
Regarding claim 7, Chen as previously modified with Chiu shows wherein the first electronic device (104 left, Chen) has a lower surface facing the top surface of the wiring structure (324, Chen) and including a first area (area near the right contact of 104 left) and a second area (area near the left contact of 104 left), the first area is closer to the plurality of first wires than the second area is (Chen replaced with wires of Chiu), and a gap between the first area and the top surface of the wiring structure is less than a gap between the second area and the top surface of the wiring structure (Chen, since 334 is beyond the thickness of 326).
Regarding claim 8, Chen shows (Fig. 5) further comprising a re-flowable material (350, solder, which is usually a re-flowable material, para 60) electrically connected to the first electronic device (104) and the wiring structure (324).
Regarding claim 9, Chen shows (Fig. 5) a package structure (500, para 69), comprising:
PNG
media_image2.png
448
832
media_image2.png
Greyscale
a bridge interposer (bridge die 330 in 108);
a first electronic device (102 left) disposed over the bridge interposer (left 330); and
a second electronic device (102 right) disposed over the bridge interposer, and is communicated with the first electronic device through the bridge interposer;
wherein the bridge interposer includes a first pad (343 below left 102, para 70), a second pad (343 below right 102, para 70).
Chen does not show a plurality of first wires disposed on the first pad and a plurality of second wires disposed on the second pad, the first pad is electrically connected to the first electronic device through the plurality of first wires, and the second pad is electrically connected to the second electronic device through the plurality of second wires.
Chiu shows (Fig. 3c) a plurality of wires (321, 322) disposed on the pad (302, para 55).
Chen in combination with Chiu teaches a plurality of first wires (Chiu 321,322) disposed on the first pad (343 below left 102 of Chen replaced with 302 of Chiu) and a plurality of second wires (Chiu 321,322) disposed on the second pad (343 below right 102 of Chen replaced with 302 of Chiu), the first pad is electrically connected to the first electronic device through the plurality of first wires, and the second pad is electrically connected to the second electronic device through the plurality of second wires.
It would have been obvious to one of ordinary skill in the art, at or before the effective filing date of the invention was made, to add the invention of Chiu, with first and second wires, to the invention of Chen.
The motivation to do so is that the combination produces the predictable result of having reinforcement along with wires.
Regarding claim 10, Chen in combination with Chiu shows an underfill (216, para 71) encapsulating the plurality of first wires and the plurality of second wires.
Regarding claim 11, Chen in combination with Chiu shows wherein the underfill (216) contacts a portion of a lateral surface of one of the plurality of first wires.
Regarding claim 12, Chen in combination with Chiu shows wherein the underfill (216) is spaced apart from a gap between the plurality of first wires.
Regarding claim 13, Chen in combination with Chiu shows wherein a portion of the first electronic device (102 left) is vertically non-overlapping with the bridge interposer (330), and a portion of the second electronic device (102 right) is vertically non-overlapping with the bridge interposer.
Regarding claim 16, Chen in combination with Chiu shows further comprising a wiring structure (234, interposer which is a type of wiring structure, para 39) disposed under the bridge interposer, and the first electronic device (102 left) is electrically connected to the wiring structure through a solder material (231).
2. Claim 6 is rejected under 35 U.S.C. 103 as being unpatentable over Chen in view of Chiu as evidenced by US 20250006619 A1 (Lee).
Regarding claim 6, Chen in combination with Chiu shows wherein the reinforcement structure includes a first contact and a second contact, the first electronic device includes a first contact and a second contact, wherein the second wires are disposed on the first contact and the second contact of the reinforcement structure, the first wires are disposed on the first contact and the second contact of the first electronic device.
Chen in combination with Chiu does not specifically show wherein an imaginary line passing through the centers of the first contact and the second contact of the reinforcement structure is non-parallel with an imaginary line passing through the centers of the first contact and the second contact of the first electronic device from a top view.
Lee teaches (Fig. 8-9) stacked chip (200) on package substrate (100, para 77) can be mis-aligned due to warpage of chips (para 77).
Chen in combination with Chiu and Lee teaches wherein an imaginary line passing through the centers of the first contact and the second contact of the reinforcement structure is non-parallel with an imaginary line passing through the centers of the first contact and the second contact of the first electronic device from a top view.
3. Claim(s) 17-20 is/are rejected under 35 U.S.C. 103 as being unpatentable over US 20220199562 A1 (Waidhas) in view of Chiu.
Regarding claim 17, Waidhas shows (Fig. 2E) a package structure (220, para 36), comprising:
PNG
media_image3.png
506
802
media_image3.png
Greyscale
a wiring structure (234, interposer which is a type of wiring structure, para 39);
a first electronic device (225.sub.A, para 35) disposed over the wiring structure, and including a first contact (129+128, below 225.sub.A, para 30), a second contact (123, below 225.sub.A, para 32), a bump (231 below 225.sub.A, para 35) disposed on the second contact; and
a solder material (bump made of solder) electrically connected to the bump.
Waidhas does not show a plurality of wires disposed on the first contact.
Chiu shows (Fig. 5) a plurality of wires (522, para 63) disposed on the first contact (24, para 60).
It would have been obvious to one of ordinary skill in the art, at or before the effective filing date of the invention was made, to add the invention of Chiu, with plurality of wires, to the invention of Waidhas.
The motivation to do so is that the combination produces the predictable result of having packaging layer supporting the structure with the wires.
Regarding claim 18, Waidhas as modified previously with Chiu shows further comprising a second electronic device (225.sub.B, para 35) disposed over the wiring structure (234), wherein the first electronic device is electrically connected to the second electronic device through the plurality of wires (modified first contact of Waidhas with Chiu connecting the two devices through bridge die 227, para 35), and the first electronic device is electrically connected to the wiring structure through the solder material (as shown above).
Regarding claim 19, Waidhas as modified previously with Chiu shows wherein the plurality of wires (modified first contact of Waidhas with Chiu near 227) is closer to the second electronic device (225.sub.B, para 35) than the bump (231 below 225.sub.A, para 35) is.
Regarding claim 20, Waidhas as modified previously with Chiu shows wherein a length of the bump is greater than a length of one of the plurality of wires (since the plurality of wires connect to the top of 227 which is at a higher level than the top of 234).
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to WASIUL HAIDER whose telephone number is (571)272-1554. The examiner can normally be reached M-F 9 a.m. - 6 p.m..
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, William Partridge can be reached at (571) 270-1402. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/WASIUL HAIDER/Primary Examiner, Art Unit 2812