DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Election/Restrictions
Applicant’s election without traverse of claims 1-18 in the reply filed on 11/20/2025 is acknowledged.
Claims 19-27 are withdrawn from further consideration pursuant to 37 CFR 1.142(b) as being drawn to a nonelected method claims there being no allowable generic or linking claim. Election was made without traverse in the reply filed on 11/20/2025.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1-18 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Choi (20190172898).
Regarding Claim 1, in Fig. 7 and paragraphs 0002, 0052, 0056, 0057, 0063, 0067 and 0070, Choi disclose a display device comprising: a substrate 110a having a display area SPA and a contact area CNA located in the display area; a power line 116c/117c/120b disposed in the display area on the substrate, overlapping the contact area, and including a first conductive layer 116c and a second conductive layer 117c disposed on the first conductive layer; a passivation layer 118/119 disposed on the substrate and the power line and having a protrusion (for example the area of 118/119 near dotted circle in the right side of the figure) protruding in a first direction (in y or in x direction, again near the dotted circle on the right side of the figure) with respect to an edge of an upper surface of the first conductive layer 116b/117c in the contact area CNA; and a common electrode 123 disposed on the substrate and the passivation layer and electrically connected to the power line 116c/117c/120b in the contact area CNA.
Regarding Claim 2, the passivation layer 118/119 exposes a side surface of the first conductive layer 116c/117c, the side surface extending from the edge of the is upper surface of the first conductive layer.
Regarding Claim 3, an undercut shape is defined in the contact area CAN by the side surface of the first conductive layer 116c/117c and the protrusion.
Regarding Claim 4, a capping electrode 122 which is disconnected by the protrusion and contacts the side surface of the first conductive layer 116c/117c (albeit indirectly contacts) in the contact area CNA
Regarding Claim 5, the common electrode 123 is electrically connected to the power line 116c/117c/120b through the capping electrode (since capping electrode 122 is between power line 116c/117c/120b and common electrode 123 at various portions.
Regarding Claim 6, the capping electrode 122 covers the side surface of the first conductive layer 116c/117c.
Regarding Claim 7, a transistor TFT in the display area on the substrate; and a pixel electrode 120/120a/120b on the transistor and electrically connected to the transistor, and wherein the capping electrode 122 and the pixel electrode 120/12a/120b are disposed on a same layer.
Regarding Claim 8, the common electrode 123 contacts the side surface of the first conductive layer 116c/117c (albeit indirectly)
Regarding Claim 9, in the contact area CNA, the passivation layer 118/119 covers a side surface of the second conductive layer 117a extending from an edge of an upper surface of the second conductive layer.
Regarding Claim 10, in the contact area CNA, the edge of the upper surface of the second conductive layer 117c protrudes in the first direction beyond the edge of the upper surface of the first conductive layer (see area near the dotted circle in the right side of the figure).
Regarding Claim 11, in the contact area CNA, the edge of the upper surface of the second conductive layer 117c is recessed from the edge of the upper surface of the first conductive layer in a second direction opposite to the first direction.
Regarding Claim 12, a via insulation layer 121 on the passivation layer 118/119 and exposing at least a portion of the protrusion; and a thin film inorganic layer 122 between the passivation layer 118/119and the via insulation layer 121.
Regarding Claim 13, the via insulation layer 121 covers an entire of the passivation layer except for at least a portion of the protrusion (in the contact area CNA).
Regarding Claim 14, a thickness of the thin film inorganic layer i122 s smaller than a thickness of the passivation layer 118/119.
Regarding Claim 15, the first conductive layer 116c/117c includes at least one conductor out of copper (Cu) and aluminum (Al), and the second conductive layer includes at least one of a transparent conductive oxide, titanium (Ti), and molybdenum (Mo) (see paragraph 0080)
Regarding Claim 16, the passivation layer 118/119 includes an inorganic insulating material (see paragraph 0081).
Regarding Claim 17, an emission layer 121 which is disconnected by the protrusion in the contact area CNA.
Regarding Claim 18, in Fig. 4 and paragraph 0046 and 0047, a pad electrode PAD disposed in a pad area located at one side of the display area on the substrate and disposed on a same layer as the power line, and wherein the passivation layer exposes at least a portion of an upper surface of the pad electrode.
Examiner is including Jang et al. (20220102471) as a pertinent prior art that is not relied upon but that discloses shaped passivation layer (see Fig. 4) that is used to suppress voltage drop.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to FAZLI ERDEM whose telephone number is (571)272-1914. The examiner can normally be reached M-F, 8am-5pm.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Davienne Monbleau can be reached at 571-272-1945. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/FAZLI ERDEM/
Primary Examiner, Art Unit 2812
12/2/2025