DETAILED ACTION
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claim(s) 2, 6, 7 is/are rejected under 35 U.S.C. 102(a)(1)/(a)(2) as being anticipated by LEE et al. (2020/0194721).
With regard to claim 2, LEE et al. disclose a display device (for example, see figs. 1 – 3) comprising:
a substrate (101) in which a transmission area, a display area surrounding at least a portion of the transmission area (an area HA, fig. 2 functioning as the transmission area), a non-display area (an area BA, fig. 2 functioning as a non-display area) between the transmission area (HA, fig. 2) and the display area (an area EA, fig. 2 functioning as the display area), and a peripheral area (NA, fig. 1) outside the display area (the display EA area forming in the area AA as shown in fig. 1) are defined;
a plurality of pixels (SP, fig. 1) arranged on the display area (the display EA area forming in the area AA as shown in fig. 1) in pixel rows and pixel columns (as shown in fig. 1);
a plurality of gate lines (scanning lines SL, fig. 3 functioning as gate lines) respectively extending along the pixel rows (the rows, as shown in fig. 1, having rows of the scanning lines SL as shown in fig. 3); and
a first gate connection line (referred to as “SL3” by examiner’s annotation shown in fig. 3 below) on the non-display area (BA),
wherein each of mth and (m+1)th gate lines (for example, first and second gate lines SL functioning as mth and (m+1)th gate lines) of the plurality of gate lines (SL) includes a first
portion (referred to as “SL1” by examiner’s annotation shown in fig. 3 below; wherein only left portions SL1 of the gate line SL functions as first portion) and a second portion (referred to as “SL2” by examiner’s annotation shown in fig. 3 below; wherein only right portions SL2 of the gate line SL functions as a second portion) which are physically apart from each other by the transmission area (HA),
the first portion (SL1) and the second portion (SL2) of each of the mth and (m+1)th gate lines (SL) are electrically connected to each other through the first gate connection line (referred to as “SL3” by examiner’s annotation shown in fig. 3 below), and m is a natural number.
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With regard to claim 6, LEE et al. disclose a second gate connection line (referred to as “SL4” by examiner’s annotation shown in fig. 3 below) on the non-display area (BA), wherein each of nth and (n+1)th gate lines (for example, third and fourth gate lines SL) of the plurality of gate lines (SL) includes a first portion (referred to as “SL11” by examiner’s annotation shown in fig. 3 below) and a second portion (referred to as “SL22” by examiner’s annotation shown in fig. 3 below) which are physically apart from each other by the transmission area (HA), and the first portion (SL11) and the second portion (SL22) of each of the nth and (n+1)th gate lines are
electrically connected to each other through a second gate connection line (SL4), and
n is a natural number greater than m+1.
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With regard to claim 7, LEE et al. disclose a through hole (120) is defined through the
substrate (110) to correspond to the transmission area (HA).
Allowable Subject Matter
3. Claims 3 -5 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Claims 3 -5 are allowable over the prior art of record, because none of these references disclose or can be combined to yield the claimed invention such as each of n-th and (n+1)-th gate lines of the plurality of gate lines includes a first portion and a second portion which are physically apart from each other by the transmission area, the first portions of the m-th, (m+1)-th, n-th, and (n+1)-th gate lines are connected to each other in the peripheral area as recited in claim 3.
Claims 8 - 20 are allowable over the prior art of record, because none of these references disclose or can be combined to yield the claimed invention such as a k-th gate driving circuit among the plurality of gate driving circuits simultaneously drives m-th and (m+1)-th initialization gate lines among the plurality of initialization gate lines with a same gate initialization signal, the m-th initialization gate line is disposed in an m-th pixel row and the (m+1)-th initialization gate line is disposed in an (m+1)-th pixel row as recited in claim 8.
Claim 21 is allowable over the prior art of record, because none of these references disclose or can be combined to yield the claimed invention such as a k-th gate driving circuit among the plurality of gate driving circuits simultaneously drives n-th and (n+1)-th compensation gate lines among the plurality of compensation gate lines with a same gate compensation signal, the n-th compensation gate line is disposed in an n-th pixel row and the (n+1)-th compensation gate line is disposed in an (n+1)-th pixel row as recited in claim 21.
Response to Arguments
Applicant’s arguments filed 05/04/26 have been fully considered but they are not persuasive.
It is argued, at page of the remarks, that “Lee does not disclose, teach or suggest "wherein each of m-th and (m+1)-th gate lines of the plurality of gate lines includes a first portion and a second portion which are physically apart from each other by the transmission area, the first
portion and the second portion of the m-th gate line and the first portion and the second
portion of the (m+1)-th gate line are all electrically connected to each other through the first gate connection line”. However, fig. 2 of Lee et al. does show each of mth and (m+1)th gate lines (for example, first and second gate lines SL functioning as mth and (m+1)th gate lines) of the plurality of gate lines (SL) includes a first portion (referred to as “SL1” by examiner’s annotation shown in fig. 3 below; wherein only left portions SL1 of the gate line SL functions as first portion) and a second portion (referred to as “SL2” by examiner’s annotation shown in fig. 3 below; wherein only right portions SL2 of the gate line SL functions as a second portion) which are physically apart from each other by the transmission area (HA), the first portion (SL1) and the second portion (SL2) of each of the mth and (m+1)th gate lines (SL) are electrically connected to each other through the first gate connection line (referred to as “SL3” by examiner’s annotation shown in fig. 3 below). Since claim 2 does not recite each of m-th and (m+1)-th gate lines of the plurality of gate lines
includes a first portion and a second portion which are physically apart from each other
by the transmission area; the first portion and the second portion of each of the m-th gate line and the first portion and the second portion of the (m+1)-th gate lines-line are all electrically
connected to each other through the first gate connection line wherein the first and second portions are formed are formed a different material from the first gate connection line, applicant’s claim 2 does not distinguish over Lee et al. reference.
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Conclusion
7. THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any extension fee pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the date of this final action.
8. Any inquiry concerning this communication or earlier communications from the examiner should be directed to TAN N TRAN whose telephone number is (571) 272 - 1923. The examiner can normally be reached on 8:30-5:00PM.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Davienne Monbleau can be reached on (571) 272-1945. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/TAN N TRAN/
Primary Examiner, Art Unit 2812
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