DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Arguments
The new limitation has been disclosed by the cited prior art as detailed below.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(d):
(d) REFERENCE IN DEPENDENT FORMS.—Subject to subsection (e), a claim in dependent form shall contain a reference to a claim previously set forth and then specify a further limitation of the subject matter claimed. A claim in dependent form shall be construed to incorporate by reference all the limitations of the claim to which it refers.
The following is a quotation of pre-AIA 35 U.S.C. 112, fourth paragraph:
Subject to the following paragraph [i.e., the fifth paragraph of pre-AIA 35 U.S.C. 112], a claim in dependent form shall contain a reference to a claim previously set forth and then specify a further limitation of the subject matter claimed. A claim in dependent form shall be construed to incorporate by reference all the limitations of the claim to which it refers.
Claim 57 rejected under 35 U.S.C. 112(d) or pre-AIA 35 U.S.C. 112, 4th paragraph, as being of improper dependent form for failing to further limit the subject matter of the claim upon which it depends, or for failing to include all the limitations of the claim upon which it depends. Claim 57 states the component carrier according to claim 56, further comprising a structured poorly adhesive structure on the at least one sidewall apart from the structured metallic electroless plating structure. This is part of a step of making the device which is not germane to the patentability of the device claim and thus, is not given patentable weight. Therefore claim 57 does not further limit claim 56 from which it depends.
Applicant may cancel the claim(s), amend the claim(s) to place the claim(s) in proper dependent form, rewrite the claim(s) in independent form, or present a sufficient showing that the dependent claim(s) complies with the statutory requirements.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claims 1-2, 9-10, 15, 48-49 are rejected under 35 U.S.C. 102(a)(2) as being unpatentable over Lang (US 20200235453 A1)
Regarding Claim 1 – Lang teaches A component carrier (Fig 5; 100; Lang [0047] states “a multilayer substrate 100”), comprising: a stack comprising at least one electrically conductive layer structure (Figs 1D, 2D, 5; Lang [0021] states “a second layer arrangement 20 comprising a metallization 22”; Lang [0027] states “a third layer arrangement 40 having a metallization 42”; and Lang [0048] states “Vias 114 and signal layers 116 can be provided in the multilayer substrate 100”) and at least one electrically insulating layer structure (Fig 1C; 10; Lang [0020] states “The layer arrangement 10… layers composed of a ceramic or dielectric material”); and a recess at least partially formed in the stack configured as a waveguide (Figs 1C, 1D, 2B, 5; Lang [0020] states “a cutout 12 is produced in a surface of a first layer arrangement 10”; Lang [0026] states “the cutout 36 completely penetrates through the first layer arrangement 10”; Lang [0021] states “the metallization 22… together with the metallization 14 on the surfaces of the cutout 12 forms the waveguide” and Lang [0041] states “the waveguide is not filled with a solid material, but… air”); wherein a plurality of edges delimiting the recess are formed by electrically conductive material of the at least one electrically conductive layer structure and/or of an electrically conductive coating in the recess (Figs 1C, 1D, 2D; Lang [0021] states “a metallization 14… on surfaces of the cutout… cover all surfaces of the cutout” and “the metallization 22… together with the metallization 14… forms the waveguide”; Lang [0029] states “the metallizations define walls of the waveguide”); wherein the waveguide comprises a structured feeding line on a bottom wall (see annotated Fig 5 below).
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Regarding Claim 2 – Lang teaches the component carrier according to claim 1, comprising at least one of the following features: wherein vertical edges delimiting the recess are formed by electrically conductive material of the at least one electrically conductive layer structure and/or of the electrically conductive coating (Fig 1F; Lang [0024] states “The metallizations 32 and 34 constitute an extension of the waveguide… in a vertical direction” and “The waveguide… comprises vertical sections formed by the metallizations 32 and 34”); wherein edges delimiting the recess are formed by electrically conductive material of the at least one electrically conductive layer structure and/or of the electrically conductive coating (Figs 1C, 1D, 2D; Lang [0021, 0029] quoted above); wherein at least two sidewalls of the recess are completely covered with electrically conductive material of the at least one electrically conductive layer structure and/or of the electrically conductive coating (Fig 1C; Lang [0021] states “a metallization 14… on surfaces of the cutout… cover all surfaces of the cutout”); wherein at least one of a top wall, [[a]] the bottom wall, and at least one sidewall of the recess is or are partially or completely covered with electrically conductive material of the at least one electrically conductive layer structure and/or of the electrically conductive coating (Figs 1D, 2D; Lang [0021] states “the metallization 22… together with the metallization 14… forms the waveguide” and Lang [0027] states “The metallizations 22 and 42 together with the metallization 14… form the waveguide”); wherein the recess is completely surrounded by electrically conductive material of the at least one electrically conductive layer structure and/or of the electrically conductive coating with the only exception of at least one opening for feeding a signal (Figs 1E, 1F; Lang [0022] states “the metallization 22 is removed at predetermined lateral regions 24 and 26… openings 28, 30”); wherein at least one edge, at an upper side and/or at a lower side of the recess, comprises a metal-metal oxide-metal succession.
Regarding Claim 9 – Lang teaches the component carrier according to claim 1, wherein a width of the recess varies along a length of the recess by not more than 75 μm (Figs 1C-1F, 2C-2F; Lang [0021, 0029] quoted above; further Lang [0041-0042] states “Table 1 shows… waveguides having a rectangular cross section… The dimensions A and B represent the inner side lengths of the rectangular waveguide” A rectangular waveguide formed from a recess with straight, vertical sidewalls will inherently have a constant width along its length i.e. 0 μm which is not more than 75 μm)
Regarding Claim 10 – Lang teaches the component carrier according to claim 1, comprising at least one of the following features: wherein the width of the recess varies along the length of the recess by not more than 20 μm (Lang [0021, 0029, 0041-0042] teach a rectangular waveguide with continuous metallized walls with a constant inner width along its lateral course i.e. 0 μm variation); wherein the width of the recess is smaller than the length of the recess (Figs 1A, 1B, 1F; Lang [0020] states “In plan view, the cutout 12 corresponds to a lateral course of the waveguide… The first lateral section can be a first lateral end of the waveguide and the second lateral section can be a second lateral end of the waveguide” and Lang [0041-0042] quoted above; From these disclosures it is inherent that the cross-sectional width (A or B) is smaller than the length of the lateral course between two ends).
Regarding Claim 15 – Lang teaches the component carrier according to claim 1, comprising at least one of the following features: wherein at least one of the at least one electrically conductive layer structure defines a bottom of the recess (Fig 2D; Lang [0027] states “a third layer arrangement 40 having a metallization 42… The metallizations 22 and 42 together with the metallization 14… form the waveguide”); wherein the at least one electrically conductive layer structure defining the bottom of the recess is a patterned layer, patterned in [[the]] a region of the bottom of the recess; wherein an uppermost layer of the at least one electrically conductive layer structure is a patterned layer (Figs 1E, 1F; Lang [0022] quoted above indicating that 22 is selectively removed); a frequency filter structure in the recess and/or at material of the stack delimiting the recess, wherein the frequency filter structure is formed by a plurality of webs of at least one of the at least one electrically insulating layer structure over at least part of [[the]] a sidewall, and by an electrically conductive structure formed on and/or between the plurality of webs; wherein a horizontal surface of at least one of the at least one electrically conductive layer structure has a roughness Rz of not more than 1 m; an antenna structure in the recess and/or at material of the stack delimiting the recess, wherein the antenna structure is a free-standing structure in the recess, is circumferentially spaced with respect to surrounding material of the stack by a gap[[,]] and comprises part of at least one of the at least one electrically conductive layer structure.
Regarding Claim 48 – Lang teaches the component carrier according to claim 1, further comprising: [[an]] wherein the electrically conductive coating on at least part of sidewalls of the stack which laterally delimit the recess (Figs 1C, 1D, 2D; Lang [0021] quoted above, see also Lang [0027, 0030]); wherein the electrically conductive coating is curved outwardly on an upper end of the sidewalls (Lang [0044] states “cutout can have a U-shape in a vertical section… The milled-out U-shape is then metallized and an upper layer… is applied”).
Regarding Claim 49 – Lang teaches the component carrier according to claim 48, comprising at least one of the following features: wherein a beak-shaped extension of the recess is formed between the electrically conductive coating and one of the at least one electrically conductive layer structure at the upper end of the sidewalls; wherein the recess is delimited at a lower end of the sidewalls by a tilted metallic section formed in an interface region between the electrically conductive coating and one of the at least one electrically conductive layer structure; wherein the electrically conductive coating tapers downwardly in a central part of the sidewalls; wherein, over a horizontal range between two opposing intersections between the electrically conductive coating and one of the at least one electrically conductive layer structure at the bottom of the recess, a height of the recess varies by not more than 20% (Lang [0021, 0041-0042] quoted above; From these disclosures, it is inherent that a rectangular waveguide formed by planar layer arrangements has a constant inner height (dimension B) along its lateral course i.e. 0% variation which is not more than 20%); wherein a locally thickened metallic region is formed as an intersection between the electrically conductive coating and one of the at least one electrically conductive layer structure at the bottom of the recess; wherein the electrically conductive coating is substantially S-shaped at at least one of the sidewalls.
Claim 56 is rejected under 35 U.S.C. 102(a)(2) as being unpatentable over Ferro (US 5381596 A)
Regarding Claim 56 – Ferro teaches a component carrier (Fig 2), comprising: a stack comprising at least one electrically conductive layer structure and at least one electrically insulating layer structure (Fig 2; Ferro (col 3 lines 6-7) states “dielectric Layers 12 sandwiched between electrically conductive layers 14”); a recess being at least partially formed in the stack (Fig 2; Ferro (col 3 lines 7-8) states “A cavity 16 for the waveguide 18 may be evacuated from the dielectric layer 12”); and a structured metallic electroless plating structure formed at least partially on at least one sidewall of the stack (Fig 2; Ferro (col 2 lines 13-20) states “the walls of the cavity 16 are electroless copper plated… Thereafter… electroplated… to form walls 20 that are uniformly smooth”), wherein the recess is configured as a waveguide (Fig 4); wherein the waveguide comprises a structured feeding line on a bottom wall (Fig 4; 14).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 12-13, 30-31 are rejected under 35 U.S.C. 103 as being unpatentable over Lang (US 20200235453 A1) in view of Ferro (US 5381596 A)
Regarding Claim 12 – Lang teaches the component carrier according to claim 1, but fails to disclose wherein the stack has a sidewall, delimiting the recess, which has a roughness Rz of not more than 75 μm.
Ferro teaches the stack has a sidewall, delimiting the recess, which has a roughness Rz of not more than 75 μm (Fig 2; Ferro (col 2 lines 13-20) quoted above).
It would have been obvious for a person with ordinary skill in the art before the effective filing date of the claimed invention to have provided the component carrier of Lang with the stack has a sidewall, delimiting the recess, which has a roughness Rz of not more than 75 μm to achieve smoother conductive sidewalls in the same type of plated cavity. A “uniformly smooth” plated copper wall necessarily has a surface roughness no greater than the recited upper bound (75 μm).
Regarding Claim 13 – Lang in view of Ferro teaches the component carrier according to claim [[2]] 12, comprising at least one of the following features: wherein the sidewall extends continuously in a vertical direction (Fig 1F; Lang [0024] quoted above); wherein the sidewall has at least one step.
Regarding Claim 30 – Lang teaches the component carrier according to claim 1, further comprising: a wiring structure forming part of the at least one electrically conductive layer structure and being arranged on top of the recess (Fig 5; Lang [0048] states “provided on the top side of the multilayer substrate 100”; Lang [0049] states “Coupling elements in the form of patch antennas 150, 152… couple RF signals into the waveguide 102” and “The line structure 154, 155 can comprise… a microstrip line”; Figs 1E, 1F; Lang [0022] quoted above; Lang [0024] quoted above). However, Lang fails to disclose a ridge surrounding the recess, wherein the wiring structure is electrically coupled with the waveguide via the ridge.
Ferro teaches a ridge surrounding the recess, wherein the wiring structure is electrically coupled with the waveguide via the ridge (Fig 5; Ferro (col 4 lines 11-18) states “a ridge 24 may extend all or part of the way through the waveguide 18… The cable 22 may be attached to or placed near the ridge 24 to communicate the signal thereto or therefrom” and “The ridge will extend the useable frequency range of the waveguide”).
It would have been obvious for a person with ordinary skill in the art before the effective filing date of the claimed invention to have provided the component carrier of Lang with a ridge surrounding the recess, wherein the wiring structure is electrically coupled with the waveguide via the ridge to get the benefit of improved coupling efficiency (Ferro (col 4 lines 11-18) quoted above).
Regarding Claim 31 – Lang in view of Ferro teaches the component carrier according to claim 30, comprising at least one of the following features: an electrically conductive lining on at least part of the ridge and electrically coupling the waveguide with the wiring structure (Fig 2; Ferro (col 3 lines 14-20) states “the walls of the cavity 16 are electroless copper plated… [then] electroplated with an electrically conductive material to form walls 20”; Fig 5 shows ridge 24 in the waveguide); wherein the electrically conductive lining circumferentially surrounds the ridge; wherein the ridge is a ring with a through hole aligned with the recess; wherein the ridge comprises an electrically insulating material; wherein the wiring structure is located on top of the ridge; wherein the wiring structure is [[the]] an uppermost layer of the at least one electrically conductive layer structure (Fig 5; Lang [0048] quoted above); an at least partially dielectric layer having a respective through hole accommodating the ridge and having substantially the same height as the ridge plus electrically conductive material on the ridge; wherein the wiring structure comprises a feedline structure for coupling a signal between the wiring structure and the waveguide (Fig 5; Lang [0049] quoted above).
Claims 41-42 are rejected under 35 U.S.C. 103 as being unpatentable over Lang (US 20200235453 A1) in view of Weis et al. (US 20220254554 A1) and Ferro (US 5381596 A)
Regarding Claim 41 – Lang teaches the component carrier according to claim 1, but fails to disclose wherein at least one of the at least one electrically insulating layer structure is made of a poorly adhesive structure; a metallic electroless plating structure formed on a surface of the stack apart from the poorly adhesive structure; and wherein the poorly adhesive structure covers a bottom and/or at least one sidewall of the recess, and wherein the metallic electroless plating structure is formed on at least part of [[a]] the sidewall of the stack delimiting the recess.
Weis teaches at least one of the at least one electrically insulating layer structure is made of a poorly adhesive structure (Fig 6; Weis [0099] states “a poorly adhesive structure 162 may be embedded in the stack 140… may be made of a material (such as polytetrafluoroethylene (PTFE)”); and wherein the poorly adhesive structure covers a bottom and/or at least one sidewall of the recess (Fig 7; Weis [0101] states “The piece 168… is delimited at a bottom side by the poorly adhesive structure 162”).
It would have been obvious for a person with ordinary skill in the art before the effective filing date of the claimed invention to have provided the component carrier of Lang with at least one of the at least one electrically insulating layer structure is made of a poorly adhesive structure; and wherein the poorly adhesive structure covers a bottom and/or at least one sidewall of the recess as taught by Weis to get the benefit of forming the cavity via by embedding a poorly adhesive structure and removing the delimited piece (Weis [0099-0102]).
Ferro teaches a metallic electroless plating structure formed on a surface of the stack apart from the poorly adhesive structure (Fig 2; Ferro (col 2 lines 13-20) quoted above); and wherein the metallic electroless plating structure is formed on at least part of [[a]] the sidewall of the stack delimiting the recess (Fig 2; Ferro (col 2 lines 13-20) quoted above).
It would have been obvious for a person with ordinary skill in the art before the effective filing date of the claimed invention to have provided the component carrier of Lang with a metallic electroless plating structure formed on a surface of the stack apart from the poorly adhesive structure; and wherein the metallic electroless plating structure is formed on at least part of a sidewall of the stack delimiting the recess as taught by Ferro to get the benefit of uniformly smooth plated waveguide walls by first electrolessly plating the cavity walls and then electroplating to thickness (Ferro (col 2 lines 13-20)).
Regarding Claim 42 – Lang in view of Weis and Ferro teaches the component carrier according to claim 41, comprising at least one of the following features: wherein the poorly adhesive structure is made of a hydrophobic material (Fig 6; Weis [0099] quoted above; polytetrafluoroethylene (PTFE) is hydrophobic); wherein at least one of the at least one electrically conductive layer structure comprises a patterned metal layer at the bottom of the recess under the poorly adhesive structure.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to ADITYA SHARMA whose telephone number is (571)270-7246. The examiner can normally be reached Monday - Friday 8:30 - 5:30.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Timothy Thompson can be reached at (571) 272-2342. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/ADITYA SHARMA/Examiner, Art Unit 2847
/TIMOTHY J THOMPSON/Supervisory Patent Examiner, Art Unit 2847