Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Election/Restrictions
Applicant’s election without traverse of Group I, claims 1-5 in the reply filed on 02/10/2026 is acknowledged.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 1-5 is/are rejected under 35 U.S.C. 103 as being unpatentable over Or-Back (Pub. No.: US 2026/0075821).
Re claim 1, Or-Back, Figs. 3A-3P teaches a high-density three-dimensional memory device with interconnection of low resistance, comprising an underlying circuit part, and a base structure disposed on the underlying circuit part, wherein the base structure comprises first conductive medium layers and insulating medium layers which are alternately stacked on each other from bottom to top;
the base structure has dendritic interdigitated structure, wherein the dendritic interdigitated structure is composed of two dendritic structures (324/326, Fig. 3E, ¶ [0175]), and a curved division trench is formed between the two dendritic structures;
each dendritic structure comprises at least one trunk (384/374/375, Fig. 3P/3O), and branches connected to and perpendicular to the trunk, and at least three branches (385/386) are disposed on at least one side of both sides of the trunk; wherein a width of the trunk (374/375, note that it is obvious that there two is wider than the branches 376) is greater than a width of the branch (376);
a preset number of memory holes (memory cells, Fig. 3F) are formed in the curved division trench, an upper opening of each memory hole is located on a plane where the top face of the base structure is located, a lower opening of each memory hole (the circles intersected between bit line and word lines, Figs. 3H-3I) is located on a plane where the bottom face of the base structure is located, the memory holes are independent of one another, and the adjacent memory holes are isolated from each other by an insulating material;
a vertical electrode (Memory Cell Gates) perpendicular to the bottom face of the base structure is disposed in the memory hole, and a storage medium required for a preset memory device is provided between the vertical electrode and an inner wall of the memory hole.
In re claim 1, Drawings and pictures can anticipate claims if they clearly show the structure which is claimed. In re Mraz, 455 F.2d 1069, 173 USPQ 25 (CCPA 1972). However, the picture must show all the claimed structural features and how they are put together. Jockmus v. Leviton, 28 F.2d 812 (2d Cir. 1928). The origin of the drawing is immaterial. For instance, drawings in a design patent can anticipate or make obvious the claimed invention as can drawings in utility patents. When the reference is a utility patent, it does not matter that the feature shown is unintended or unexplained in the specification. The drawings must be evaluated for what they reasonably disclose and suggest to one of ordinary skill in the art. In re Aslanian, 590 F.2d 911, 200 USPQ 500 (CCPA 1979). See MPEP § 2121.04 for more information on prior art drawings as “enabled disclosures.”
Re claim 2, Or-Back, Figs. 3A-3P teaches the high-density three-dimensional memory device with interconnection of low resistance according to claim 1, wherein at least two memory holes (the circles intersected between bit line and word lines, Figs. 3H-3I) are formed in each middle division region, and the middle division region is a part, parallel to the pointing of the branch, of the curved division trench.
Re claim 3, Or-Back, Fig. 4A teaches the high-density three three-dimensional memory device with interconnection of low resistance according to claim 1, wherein the first conductive medium (402/406), the storage medium (Charge storage layer) and the electrode (Gate) are made of materials required to constitute a semiconductor memory.
Re claim 4, Or-Back, Fig. 4A teaches the high-density three-dimensional memory device with interconnection of low resistance according to claim 1, wherein the first conductive medium is made of a semiconductor material (402/406, [0188]).
Re claim 5, Or-Back, in different embodiment, Fig. 69D teaches the high-density three-dimensional memory device with interconnection of low resistance according to claim 1, wherein the preset memory is a PN junction type semiconductor memory (6946/6956, [0472]), a Schottky diode memory or a medium memory; the medium memory is a resistance change memory (6902), a magnetic phase change memory, a phase change memory, or a ferroelectric memory.
Response to Arguments
Applicant' s arguments filed 07/22/2026 have been fully considered but they are not persuasive.
In response to Applicant’s argument:
“Or-Back fails to teach or suggest a high-density three-dimensional memory device with interconnection of low resistance, wherein: the base structure has dendritic interdigitated structure, wherein the dendritic interdigitated structure is composed of two dendritic structures, and a curved division trench is formed between the two dendritic structures; wherein each dendritic structure comprises at least one trunk and branches connected to and perpendicular to the trunk, and at least three branches are disposed on at least one side of both sides of the trunk; wherein a width of the trunk is greater than a width of the branch.
As set forth in the BACKGROUND of the present disclosure, in achieving high-density storage in a three-dimensional memory, the resistivity of the horizontal interconnection lines is relatively high, especially when the length of a horizontal wire is usually hundreds of, thousands of microns, or orders of magnitude greater, so that the interconnection line formed by the low- resistance semiconductor has a great influence on reading and writing of the memory. Thus, the technical problem to be solved by the present disclosure relates to how to reduce the series resistance of horizontal wires.
To solve the above technical problem, independent claim 1, as amended herein, provides a three-dimensional multi-layer memory with the characteristics of low resistance: the base structure has dendritic interdigitated structure, wherein the dendritic interdigitated structure is composed of two dendritic structures, and a curved division trench is formed between the two dendritic structures; each dendritic structure comprises at least one trunk and branches connected to and perpendicular to the trunk, and at least three branches are disposed on at least one side of both sides of the trunk; wherein a width of the trunk is greater than a width of the branch.
As set forth in paragraph [0180] of Or-Back, "FIG. 3J illustrates optional silicidation of the bit lines 327 to reduce their resistance," i.e., to reduce the resistance of the bit lines, Or-Back proposes the silicidation of the bit lines.”, pages 1-3.
The Examiner respectfully submits that
Drawings and pictures can anticipate claims if they clearly show the structure which is claimed. In re Mraz, 455 F.2d 1069, 173 USPQ 25 (CCPA 1972). However, the picture must show all the claimed structural features and how they are put together. Jockmus v. Leviton, 28 F.2d 812 (2d Cir. 1928). The origin of the drawing is immaterial. For instance, drawings in a design patent can anticipate or make obvious the claimed invention as can drawings in utility patents. When the reference is a utility patent, it does not matter that the feature shown is unintended or unexplained in the specification. The drawings must be evaluated for what they reasonably disclose and suggest to one of ordinary skill in the art. In re Aslanian, 590 F.2d 911, 200 USPQ 500 (CCPA 1979). See MPEP § 2121.04 for more information on prior art drawings as “enabled disclosures.”
Therefore, Or-Back, Figs. 3A-3P teaches each dendritic structure comprises at least one trunk (384/374/375, Fig. 3P/3O), and branches connected to and perpendicular to the trunk, and at least three branches (385/386) are disposed on at least one side of both sides of the trunk; wherein a width of the trunk (374/375, note that it is obvious that there two is wider than the branches 376) is greater than a width of the branch (376);
For the above reasons, it is believed that the rejections should be sustained.
Conclusion
Applicant' s amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to TONY TRAN whose telephone number is (571)270-1749. The examiner can normally be reached Monday-Friday, 8AM-5PM, EST.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Britt Hanley can be reached at 571-270-3042. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/TONY TRAN/Primary Examiner, Art Unit 2893
Prosecution Insights