Prosecution Insights
Last updated: April 19, 2026
Application No. 18/258,846

FILM ADHESIVE AND METHOD FOR MAKING SAME; DICING/DIE BONDING INTEGRATED FILM AND METHOD FOR MAKING SAME; AND SEMICONDUCTOR DEVICE AND METHOD FOR MAKING SAME

Non-Final OA §103
Filed
Jun 22, 2023
Examiner
TURNER, BRIAN
Art Unit
2818
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Resonac Corporation
OA Round
1 (Non-Final)
83%
Grant Probability
Favorable
1-2
OA Rounds
2y 3m
To Grant
88%
With Interview

Examiner Intelligence

Grants 83% — above average
83%
Career Allow Rate
614 granted / 741 resolved
+14.9% vs TC avg
Minimal +5% lift
Without
With
+4.6%
Interview Lift
resolved cases with interview
Typical timeline
2y 3m
Avg Prosecution
61 currently pending
Career history
802
Total Applications
across all art units

Statute-Specific Performance

§101
1.4%
-38.6% vs TC avg
§103
59.5%
+19.5% vs TC avg
§102
22.6%
-17.4% vs TC avg
§112
13.5%
-26.5% vs TC avg
Black line = Tech Center average estimate • Based on career data from 741 resolved cases

Office Action

§103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Election/Restrictions Claims 1 and 10-13 are withdrawn from further consideration pursuant to 37 CFR 1.142(b) as being drawn to a nonelected invention, there being no allowable generic or linking claim. Election was made without traverse in the reply filed on 11/4/2025. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows: 1. Determining the scope and contents of the prior art. 2. Ascertaining the differences between the prior art and the claims at issue. 3. Resolving the level of ordinary skill in the pertinent art. 4. Considering objective evidence present in the application indicating obviousness or nonobviousness. Claims 2 and 5-9 are rejected under 35 U.S.C. 103 as being unpatentable over Sugo et al. (PG Pub. No. US 2014/0231983 A1). Regarding claim 2, Sugo teaches a method for manufacturing a film-shaped adhesive (¶ 0002), the method comprising: mixing a raw material varnish (¶ 0060) comprising silver particles (¶ 0128 & table 2: at least examples 6-1 to 6-3 include solutions with silver particles) under temperature conditions of 50°C or higher (¶ 0128: compounds mixed at 90° C) and preparing an adhesive varnish comprising the silver particles and a thermosetting resin component (¶¶ 0043-0044 & table 2: solution prepared with silver particles and thermosetting resin); and forming the film-shaped adhesive by using the adhesive varnish (¶¶ 0128-0129: film-shaped adhesive formed with varnish composition). Sugo does not explicitly teach the varnish further comprises organic solvent. However, Sugo teaches additional embodiments which include mixing a raw material varnish, metal particles, and organic solvent (¶¶ 0064, 0126 & table 1: at least examples 3-1 to 3-3 include solutions with silver particles and organic solvent). It would have been obvious to one of ordinary skill in the art at the time the invention was filed to configure the method of Sugo to include organic solvent, as a means to provide solution properties such as dissolving, kneading, and uniform dispersion (¶ 0064). Regarding claim 5, Sugo teaches the method for manufacturing a film-shaped adhesive according to claim 2, wherein a content of the silver particles is 50% to 95% by mass based on a total solid content of the adhesive varnish (table 2: 60%). Regarding claim 6, Sugo teaches the method for manufacturing a film-shaped adhesive according to claim 2, wherein the adhesive varnish further contains an elastomer (¶ 0036: thermoplastic resin). Regarding claim 7, Sugo teaches the method for manufacturing a film-shaped adhesive according to claim 2, wherein the thermosetting resin component includes an epoxy resin and a phenol resin (table 2: curable resin, curing agent). Regarding claim 8, Sugo teaches a method for manufacturing a dicing-die bonding integrated film (¶ 0125), the method comprising: preparing the film-shaped adhesive obtainable by the method according to claim 2 (¶¶ 0127-0128), and a dicing tape (¶ 0071: 11) comprising a base material layer (¶ 0071: 1) and a pressure-sensitive adhesive layer (¶ 0071: 2) provided on the base material layer (fig. 1: 2 provides on 1); and sticking together the film-shaped adhesive (¶ 0071: 3) and the pressure-sensitive adhesive layer of the dicing tape to form a dicing-die bonding integrated film (fig. 1: 3 disposed on 11) including the base material layer, the pressure-sensitive adhesive layer, and a bonding adhesive layer formed from the film-shaped adhesive, in this order (fig. 1: 1, 2, and 3 arranged in order). Regarding claim 9, Sugo teaches a method for manufacturing a semiconductor device, the method comprising: sticking a semiconductor wafer (¶ 0102: 4) to the bonding adhesive layer of the dicing-die bonding integrated film obtainable by the method according to claim 8 (fig. 1: 4 disposed on integrated film 3/11); producing a plurality of singulated adhesive piece-attached semiconductor chips by dicing the semiconductor wafer with the bonding adhesive layer stuck thereto (¶ 0104, fig. 3: wafer 4 is cut into a prescribed size and individualized, and a semiconductor chip 5 is produced with 3 adhered to bottom); adhering the adhesive piece-attached semiconductor chips on a support member (¶ 0107: adherend 6), with the adhesive piece interposed therebetween (fig. 3: 5 adhered to 6 with 3 interposed); and thermally curing the adhesive piece in the adhesive piece-attached semiconductor chip adhered to the support member (¶ 0109: heat treatment applied to 3). Claims 3-4 are rejected under 35 U.S.C. 103 as being unpatentable over Sugo as applied to claim 2 above, and further in view of Matsuno et al. (PG Pub. No. US 2019/0375005 A1). Regarding claim 3, Sugo teaches the method for manufacturing a film-shaped adhesive according to claim 2, comprising silver particles (¶ 0124, table 2). Sugo is silent to wherein the silver particles are silver particles manufactured by a reduction method. Matsuno teaches a solution containing silver particles, the silver particles manufactured by a reduction method (¶¶ 0114, 0117). It would have been obvious to one of ordinary skill in the art at the time the invention was filed to manufacture the silver particles of Sugo by a reduction method, as a means to provide uniform size of silver particles (Matsuno, ¶ 0123). Regarding claim 4, Sugo teaches the method for manufacturing a film-shaped adhesive according to claim 2, comprising silver particles (¶ 0124, table 2). Sugo is silent to wherein the silver particles are silver particles that are surface-treated by using a surface treatment agent. Matsuno teaches a solution containing silver particles, the silver particles are surface-treated by using a surface treatment agent (¶¶ 0114, 0117). It would have been obvious to one of ordinary skill in the art at the time the invention was filed to treat the silver particles of Sugo with a surface treatment agent, as a means to provide uniform size of silver particles (Matsuno, ¶ 0123). Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Yamada et al. (Patent No. JP 2018-125291 A) teaches a varnish including organic solvent and silver particles). Any inquiry concerning this communication or earlier communications from the examiner should be directed to BRIAN TURNER whose telephone number is (571)270-5411. The examiner can normally be reached M-F 8am-5pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Eva Montalvo can be reached at 571-270-3829. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /BRIAN TURNER/Examiner, Art Unit 2818
Read full office action

Prosecution Timeline

Jun 22, 2023
Application Filed
Jan 30, 2026
Non-Final Rejection — §103 (current)

Precedent Cases

Applications granted by this same examiner with similar technology

Patent 12604732
Power Electronics Carrier
2y 5m to grant Granted Apr 14, 2026
Patent 12604561
MIXED COLOR LIGHT EMITTING DEVICE
2y 5m to grant Granted Apr 14, 2026
Patent 12598791
STORAGE DEVICE, METHOD FOR MANUFACTURING THE SAME, AND ELECTRONIC APPARATUS INCLUDING STORAGE DEVICE
2y 5m to grant Granted Apr 07, 2026
Patent 12588457
Die Bonding Apparatus and Manufacturing Method for Semiconductor Device
2y 5m to grant Granted Mar 24, 2026
Patent 12581682
SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME
2y 5m to grant Granted Mar 17, 2026
Study what changed to get past this examiner. Based on 5 most recent grants.

AI Strategy Recommendation

Get an AI-powered prosecution strategy using examiner precedents, rejection analysis, and claim mapping.
Powered by AI — typically takes 5-10 seconds

Prosecution Projections

1-2
Expected OA Rounds
83%
Grant Probability
88%
With Interview (+4.6%)
2y 3m
Median Time to Grant
Low
PTA Risk
Based on 741 resolved cases by this examiner. Grant probability derived from career allow rate.

Sign in with your work email

Enter your email to receive a magic link. No password needed.

Personal email addresses (Gmail, Yahoo, etc.) are not accepted.

Free tier: 3 strategy analyses per month