Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Restriction
Applicant’s election without traverse of Species I, Claims 3, 4, 19, & 20 in the reply filed on 4-23-2026 is acknowledged. Further, Claims 2, 10, 11, 16, 17, 24, 29, 52, & 53 were recognized as generic to the invention by the examiner. Thus, the claims being prosecuted will be 1-4, 10, 11, 16-20, 24, 29, 52, & 53.
Claim Interpretation
The following is a quotation of 35 U.S.C. 112(f):
(f) Element in Claim for a Combination. – An element in a claim for a combination may be expressed as a means or step for performing a specified function without the recital of structure, material, or acts in support thereof, and such claim shall be construed to cover the corresponding structure, material, or acts described in the specification and equivalents thereof.
The following is a quotation of pre-AIA 35 U.S.C. 112, sixth paragraph:
An element in a claim for a combination may be expressed as a means or step for performing a specified function without the recital of structure, material, or acts in support thereof, and such claim shall be construed to cover the corresponding structure, material, or acts described in the specification and equivalents thereof.
The claims in this application are given their broadest reasonable interpretation using the plain meaning of the claim language in light of the specification as it would be understood by one of ordinary skill in the art. The broadest reasonable interpretation of a claim element (also commonly referred to as a claim limitation) is limited by the description in the specification when 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is invoked.
As explained in MPEP § 2181, subsection I, claim limitations that meet the following three-prong test will be interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph:
(A) the claim limitation uses the term “means” or “step” or a term used as a substitute for “means” that is a generic placeholder (also called a nonce term or a non-structural term having no specific structural meaning) for performing the claimed function;
(B) the term “means” or “step” or the generic placeholder is modified by functional language, typically, but not always linked by the transition word “for” (e.g., “means for”) or another linking word or phrase, such as “configured to” or “so that”; and
(C) the term “means” or “step” or the generic placeholder is not modified by sufficient structure, material, or acts for performing the claimed function.
Use of the word “means” (or “step”) in a claim with functional language creates a rebuttable presumption that the claim limitation is to be treated in accordance with 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph. The presumption that the claim limitation is interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is rebutted when the claim limitation recites sufficient structure, material, or acts to entirely perform the recited function.
Absence of the word “means” (or “step”) in a claim creates a rebuttable presumption that the claim limitation is not to be treated in accordance with 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph. The presumption that the claim limitation is not interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is rebutted when the claim limitation recites function without reciting sufficient structure, material or acts to entirely perform the recited function.
Claim limitations in this application that use the word “means” (or “step”) are being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, except as otherwise indicated in an Office action. Conversely, claim limitations in this application that do not use the word “means” (or “step”) are not being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, except as otherwise indicated in an Office action.
This application includes one or more claim limitations that do not use the word “means,” but are nonetheless being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, because the claim limitation(s) uses a generic placeholder that is coupled with functional language without reciting sufficient structure to perform the recited function and the generic placeholder is not preceded by a structural modifier. Such claim limitation(s) is/are: a light projection system, a light receiving system, a data processing unit in claims 18-20, 24, 29, & 53.
Because this/these claim limitation(s) is/are being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, it/they is/are being interpreted to cover the corresponding structure described in the specification as performing the claimed function, and equivalents thereof.
If applicant does not intend to have this/these limitation(s) interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, applicant may: (1) amend the claim limitation(s) to avoid it/them being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph (e.g., by reciting sufficient structure to perform the claimed function); or (2) present a sufficient showing that the claim limitation(s) recite(s) sufficient structure to perform the claimed function so as to avoid it/them being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 1, 3, 4, 10, 11, 16-20, 24, & 29, is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Silva, deceased et al (US PAT 4,933,567) (Silva).
Regarding Claim 1, Silva discloses a method for evaluating a subsurface damaged layer of a semiconductor substrate, the method comprising:
a measurement step of causing laser (Fig. 3, 32) light having penetration characteristics to be incident from a surface of a semiconductor substrate (10) having a subsurface damaged layer under the surface and measuring an intensity of scattered light scattered under the surface (Fig. 1, Columns 4 & 5, lines 67-68 & 1-29); and
an evaluation step of evaluating the subsurface damaged layer on the basis of the intensity of the scattered light obtained in the measurement step (Column 8, lines 4-11 & Column 7, lines 3-25).
Regarding Claim 18, Silva discloses an evaluation system (Fig. 3) comprising:
a stage (37 & 39) capable of holding a semiconductor substrate that is a measurement target;
a light projection system (32) capable of irradiating the semiconductor substrate with laser light having penetration characteristics (Fig. 1, Columns 4 & 5, lines 67-68 & 1-29);
a light receiving system (34) capable of receiving scattered light that is scattered under a surface of the semiconductor substrate; and
a data processing unit configured to evaluate a subsurface damaged layer under the surface of the semiconductor substrate on the basis of an intensity of the scattered light (Column 8, lines 4-11 & Column 7, lines 3-25).
Regarding Claims 3 & 19, Silva discloses the aforementioned. Further, Silva discloses wherein the subsurface damaged layer includes strain (Column 2, lines 7). This definition of the defects are strain induced defects thus the damaged layer being investigated includes Strain; and
the evaluation step includes calculating an amount of the strain on the basis of the intensity of the scattered light (Column 8, lines 4-11). The maps created based on the maximum intensity scatter is a calculation of the amount of strain since it details where all the defects are and their Orientation.
Regarding Claims 4 & 20, Silva discloses the aforementioned. Further, Silva discloses wherein the measurement step includes acquiring the intensity of the scattered light having a predetermined depth in association with position information in planar directions of the semiconductor substrate (Columns 7 & 8, lines 58-68 & 1-11), and
the evaluation step includes calculating the amount of strain in association with the position information (Column 8, lines 4-11). The maps created based on the maximum intensity scatter is a calculation of the amount of strain since it details where all the defects are and their Orientation.
Regarding Claim 10, Silva discloses the aforementioned. Further, Silva discloses wherein the semiconductor substrate has a planarized surface (Column 4, lines 56-59, Fig. 1A).
Regarding Claims 11 & 24, Silva discloses the aforementioned. Further, Silva discloses wherein the laser light is incident to the semiconductor substrate at an incident angle θ of 40°< 0 < 80° with respect to a normal line of the surface of the semiconductor substrate (Column 5, lines 58-63).
Regarding Claim 16, Silva discloses the aforementioned. Further, Silva discloses wherein the measurement step includes a scanning step of scanning the semiconductor substrate with the laser light while rotating the semiconductor substrate (Columns 7 & 8, lines 60-68 & 1-5).
Regarding Claim 17, Silva discloses the aforementioned. Further, Silva discloses wherein the measurement step is a step of measuring the scattered light (18, fig. 1A) including elastic scattering. The subsurface scatter (18) shown and disclosed is an elastic scatter.
Regarding Claim 29, Silva discloses the aforementioned. Further, regarding the limitation, “wherein the semiconductor substrate is a silicon carbide substrate,” this limitation is met by the disclosed invention of Silva.
Language in an apparatus or product claim directed to the function, operation, intent-of-use, and materials upon which the components of the structure work that does not structurally limit the components or patentably differentiate the claimed apparatus or product from an otherwise identical prior art structure will not support patentability. See, e.g., In re Rishoi, 197 F.2d 342, 344-45 (CCPA 1952); In re Otto, 312 F.2d 937, 939-40 (CCPA 1963); In re Ludtke, 441 F.2d 660, 663-64 (CCPA 1971); In re Yanush, 477 F.2d 958, 959 (CCPA 1973).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claim(s) 2 is/are rejected under 35 U.S.C. 103 as being unpatentable over Silva.
Regarding Claim 2, Silva discloses the aforementioned. Further, Silva discloses the substrate may be silicon (Column 1, lines 1-32) but fails to explicitly disclose wherein the semiconductor substrate is a silicon carbide substrate;
However, the examiner takes official notice this would be obvious to one of ordinary skill in the art;
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to modify Silva with wherein the semiconductor substrate is a silicon carbide substrate because as disclosed the method would be used with such materials and it would be common sense to use the device to investigate defects in all kinds of silicon materials.
Claim(s) 52 & 53 is/are rejected under 35 U.S.C. 103 as being unpatentable over Silva in view of Janik et al (US PAT 7,274,440) (Janik).
Regarding Claims 52 & 53, Silva discloses the aforementioned but fails to explicitly disclose a specifying step of specifying a layer including a predetermined amount of strain as a result of the evaluation; and a removal step of removing the specified layer;
However, Janik discloses a specifying step of specifying a layer including a predetermined amount of strain as a result of the evaluation; and a removal step of removing the specified layer (Column 1, lines 29-40);
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to modify Silva with a specifying step of specifying a layer including a predetermined amount of strain as a result of the evaluation; and a removal step of removing the specified layer because this would allow for the reduction of waste in the manufacturing process by repairing the damaged wafers rather than throwing them away.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to JONATHON COOK whose telephone number is (571)270-1323. The examiner can normally be reached 11am-7pm.
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/JONATHON COOK/Examiner, Art Unit 2877 July 8, 2026
/Kara E. Geisel/Supervisory Patent Examiner, Art Unit 2877
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