DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Continued Examination Under 37 CFR 1.114
A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on March 05, 2026 has been entered.
Status of the Claims
Amendment filed March 05, 2026 is acknowledged. Claims 4 and 9-10 have been cancelled. Claims 1, 3 and 5-7 have been amended. Claims 1, 3 and 5-8 are pending.
Action on merits of claims 1, 3 and 5-8 follows.
Specification
The newly submitted title is not descriptive. The following title is suggested:
MANUFACTURING METHOD OF A MOSFET DEVICE INCLUDING IMPLANTING ALUMINUM IONS TO FORM A DEEP P-WELL REGION UNDER A BORON IONS BASE REGION AND A SOURCE IONS USING A SAME IMPLANTATION MASK
Claim Rejections - 35 USC § 103
The text of those sections of Title 35, U.S. Code not included in this action can be found in a prior Office action.
Claim 1, 3 and 5-8 are rejected under 35 U.S.C. 103 as being unpatentable over MIWA et al. (US. Pub. No. 2022/0336219) in view of HERMAN (US. Patent No. 6,346,726).
With respect to claim 1, MIWA teaches a manufacturing method of a metal oxide semiconductor field effect transistor (MOSFET) device, substantially as claimed including:
providing a substrate (10), forming a patterned mask layer (90c) for defining a well region on a front of the substrate and using the patterned mask layer (90c) as a mask, and implanting first well ions of a first conductive type into a surface layer on the front of the substrate (10) to form a first implantation region (31), wherein the first well ions comprise P-type ions;
using a patterned mask layer (90a) as the mask, implanting second well ions of the first conductive type into the substrate below the first implantation region (31) to form a second implantation region (30), wherein the second well ions comprise aluminum ions, and an implantation energy thereof is higher than an implantation energy of the first well ions, such that a junction depth of the second implantation region (30) is greater than a junction depth of the first implantation region (31);
using the patterned mask layer (90a) as the mask, implanting source ions of a second conductive type into a surface layer of the first implantation region (31) to form a source region (40);
removing the patterned mask layer, and annealing the substrate by a high-temperature annealing process to activate the first well ions in the first implantation region (31) so that the first implantation region (31) is longitudinally connected to the second implantation region (30) and horizontally extends to a required width to provide a required channel width subsequently, so as to form a required well region, wherein the high-temperature annealing process is performed at a temperature ranging from 1500°C to 1900°C; and
forming a gate oxide layer (50) and a gate (60) which are stacked in sequence on the front of the substrate, and using a region where the first implantation region (31) is in contact with the gate oxide layer (50) as a channel of the MOSFET device,
wherein in the process of activate the first well ions in the first implantation region (31), a diffusion coefficient of the source ions in the source region (40) is less than a diffusion coefficient of the first well ions in the first implantation region (30), the channel of the MOSFET device is formed by diffusion of the first implantation region (30),
wherein the ion implantation for the first implantation region (30), the second implantation region (36), and the source region (33) is performed using a same mask layer (90). (See Figs. 3-7).
Thus, MIWA is shown to teach all the features of the claim with the exception of explicitly disclosing the first well ions comprise boron ions or boron fluoride ions; and a diffusion coefficient of the second well ions is less than a diffusion coefficient of the first well ions.
However, HERMAN teaches a manufacturing method of a metal oxide semiconductor field effect transistor (MOSFET) device including:
providing a substrate (52), forming a patterned mask layer (61) for defining a well region on a front of the substrate and using the patterned mask layer (61) as a mask, and implanting first well ions of a first conductive type into a surface layer on the front of the substrate to form a first implantation region (80), wherein the first well ions comprise boron ions or boron fluoride ions;
using the patterned mask layer (61) as the mask, implanting second well ions of the first conductive type into the substrate below the first implantation region (80) to form a second implantation region (85), wherein the second well ions comprises the first type ions, and an implantation energy thereof (150 keV) is higher than an implantation energy (80 keV) of the first well ions, such that a junction depth of the second implantation region (85) is greater than a junction depth of the first implantation region (80);
using the patterned mask layer (61) as the mask, implanting source ions of a second conductive type into a surface layer of the first implantation region (80) to form a source region (81);
annealing the substrate by a high-temperature annealing process to activate the first well ions in the first implantation region (80) so that the first implantation region (80) is longitudinally connected to the second implantation region (85) and horizontally extends to a required width to provide a required channel width subsequently, so as to form a required well region, wherein the annealing process is performed at a high temperature; and
wherein in the process of activate the first well ions in the first implantation region (80), a diffusion of the source ions in the source region (81) is less than a diffusion coefficient of the first well ions in the first implantation region (80), the channel of the MOSFET device is formed by diffusion of the first implantation region (80),
wherein the ion implantation for the first implantation region (80), the second implantation region (85), and the source region (81) is performed using a same mask layer (61). (See Figs. 6-7).
Therefore, it would have been obvious to one having ordinary skill in the art at the time of invention was made to form the first implantation region of MIWA utilizing the first well ions comprising boron ions as taught by HERMAN so that upon the thermal activation the channel is formed.
Regarding the diffusion coefficients, in view of HERMAN, the first well ions comprises boron, thus, the limitation: the diffusion coefficient of the second well ions (aluminum) in the second implantation region of MIWA, and a diffusion coefficient of the source ions in the source region is less than a diffusion coefficient of the first well ions (boron), in view of HERMAN, in the first implantation region, is met.
Moreover, it has been held to be within the general skill of a worker in the art to select a known material, boron ions of aluminum ions, on the basis of it suitability for the intended use as a matter of obvious design choice. In re Leshin, 125 USPQ 416., 125 USPQ 416.
With respect to claim 3, after forming the source region (40) and before activating the first well ions in the first implantation region (31), the manufacturing method of MIWA further comprises: implanting bulk ions of the first conductive type in a portion of the source region (40) to form a bulk region (32), and enabling the bulk region (32) to penetrate into a portion of the first implantation region (31) to short-circuit the source region (40) and the first implantation region (31). (FIG. 6).
With respect to claim 5, in view of HERMAN, implantation process parameters of the first well ions (boron) are as follows: an implantation energy is 80 keV, hence within the claimed range of 50-300 keV, and an implantation dose is 5E13 /cm2, hence within the claimed range of lEl1/cm2 - 6E14/cm2.
With respect to claim 6, an annealing time for the high-temperature annealing process of MIWA is 30 second to 1 hour, hence overlaps the claimed range of 2-200 min.
It is well settled that "[W]here the general conditions of a claim are disclosed in the prior art, it is not inventive to discover the optimum or workable ranges by routine experimentation." In re Aller, 220 F.2d 454, 456, 105 USPQ 233, 235 (CCPA 1955) (Claimed process which was performed at a temperature between 40 ºC and 80 ºC and an acid concentration between 25% and 70% was held to be prima facie obvious over a reference process which differed from the claims only in that the reference process was performed at a temperature of 100 ºC and an acid concentration of 10%.); see also Peterson, 315 F.3d at 1330, 65 USPQ2d at 1382 ("The normal desire of scientists or artisans to improve upon what is already generally known provides the motivation to determine where in a disclosed set of percentage ranges is the optimum combination of percentages.").
With respect to claim 7, the substrate of MIWA comprises a silicon carbide layer of the second conductive type, and both the first implantation region (31) and the second implantation region (30) are formed in the SiC layer.
With respect to claim 8, the manufacturing method of MIWA further comprises:
forming an interlayer dielectric layer (51) on the front of the substrate, the interlayer dielectric layer (51) burying the gate (60) inside and exposing a portion of the source region (40); and forming a source metal layer (80) on the interlayer dielectric layer (51), the source metal layer (80) being electrically connected to the source region (40).
Response to Arguments
Applicant’s arguments with respect to amended claims have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument.
Conclusion
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/ANH D MAI/Primary Examiner, Art Unit 2893