Prosecution Insights
Last updated: April 19, 2026
Application No. 18/271,898

METHOD FOR FORMING SILICON-CONTAINING FILM AND FILM FORMING APPARATUS

Final Rejection §103
Filed
Jul 12, 2023
Examiner
STEVENSON, ANDRE C
Art Unit
2899
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Tokyo Electron Limited
OA Round
2 (Final)
90%
Grant Probability
Favorable
3-4
OA Rounds
2y 5m
To Grant
96%
With Interview

Examiner Intelligence

Grants 90% — above average
90%
Career Allow Rate
764 granted / 852 resolved
+21.7% vs TC avg
Moderate +7% lift
Without
With
+6.8%
Interview Lift
resolved cases with interview
Typical timeline
2y 5m
Avg Prosecution
43 currently pending
Career history
895
Total Applications
across all art units

Statute-Specific Performance

§101
0.3%
-39.7% vs TC avg
§103
57.8%
+17.8% vs TC avg
§102
26.8%
-13.2% vs TC avg
§112
8.7%
-31.3% vs TC avg
Black line = Tech Center average estimate • Based on career data from 852 resolved cases

Office Action

§103
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Specification The specification has not been checked to the extent necessary to determine the presence of all possible minor errors. Applicant’s cooperation is requested in correcting any errors of which applicant may become aware in the specification. Response to Arguments Applicant’s arguments with respect to claim(s) 1-20 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. The factual inquiries set forth in Graham v. John Deere Co., 383 U.S. 1, 148 USPQ 459 (1966), that are applied for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows: 1. Determining the scope and contents of the prior art. 2. Ascertaining the differences between the prior art and the claims at issue. 3. Resolving the level of ordinary skill in the pertinent art. 4. Considering objective evidence present in the application indicating obviousness or nonobviousness. Claim #1-4, 18-20 are rejected under 35 U.S.C. 103 as being unpatentable over Narwankar (U.S. Pat. No, 6,136,685), hereinafter referred to as "Narwankar" and in view of KHANDELWAL et al., (U.S. Pub. No. 2019/0040279), hereinafter referred to as "Khandelwal". Narwankar shows, with respect to claim #1, a method for forming a silicon-containing film (column #3, line 45-59) in a recess (fig. #7a, item 701) (column #13, line 18-31) formed on a surface of a substrate (Below; fig. #Ex1, item Sb1), the method comprising:(a) forming a flowable film (SiF4) (column #13, line 64-67; column #14, line 1-7) in the recess (fig. #7a, item 701) by exposing the substrate (column #13, line 18-31), which is adjusted to a first temperature (column #1, line 19-34; column #3, line 60-67), to plasma generated from a processing gas including a halogen-containing silane (column #2, line 55-62) and a halogen-free silane (column #3, line 49-59); and (b) curing the flowable film by thermally processing the substrate at a second temperature higher than the first temperature (column #16, line 21-28). [AltContent: textbox (Substrate; Sb1)][AltContent: arrow][AltContent: textbox (Ex1)] PNG media_image1.png 393 800 media_image1.png Greyscale Narwankar substantially shows the claimed invention as shown in the rejection of claim #1 above. Narwankar fails to show, with respect to claim #1, a method comprising an oligomer in a liquid state and curing the oligomer to form a silicon containing film in a solid state. Khandelwal teaches, with respect to claim #1, a method comprising an oligomer in a liquid state and curing the oligomer to form a silicon containing film in a solid state (paragraph 1011-1037). It would have been obvious to one having ordinary skill in the art at the time the invention was made, with respect to claim #1, to modified the invention of Narwankar as modified by the invention of Khandelwal, which teaches, a method comprising an oligomer in a liquid state and curing the oligomer to form a silicon containing film in a solid state, to incorporate a structural condition to provide increasingly fine-tuned molecular precursors which are required to meet the requirements of volatility (for vapor deposition processes), lower process temperatures, reactivity with various oxidants and low film contamination, in addition to high deposition rates, conformality and consistency of films produced, as taught by Khandelwal. Narwankar shows, with respect to claim #2, a method wherein the step (a) and the step (b) are continuously performed under a vacuum atmosphere (column #13, line 51-63). Narwankar shows, with respect to claim #3, a method wherein the halogen-containing silane is one or a plurality of gases represented by SinHxZ2n+2-x (where Z is F, Cl, Br or I, n is a natural number of 1 or more, and x is 1 to 2n+2-1) (column #3, line 45-59). Narwankar shows, with respect to claim #4, a method wherein the halogen- containing silane is at least one selected from a group consisting of SiHxZ4.x (where Z is F, Cl, Br or I, and x is 1, 2 or 3) and Si2HxZ6-x (where Z is F, Cl, Br or I, and x is 1, 2, 3, 4 or 5) (column #3, line 45-59). Narwankar shows, with respect to claim #18, a method wherein the halogen-containing silane is one or a plurality of gases represented by SinHxZ2n+2-x (where Z is F, Cl, Br or I, n is a natural number of 1 or more, and x is 1 to 2n+2-1) (column #3, line 45-59; column #14, line 8-30). Narwankar shows, with respect to claim #19, a method wherein the halogen-containing silane is at least one selected from a group consisting of SiHxZ4-x (where Z is F, Cl, Br or I, and x is 1, 2 or 3) and Si2HxZ6-x (where Z is F, Cl, Br or I, and x is 1, 2, 3, 4 or 5) (column #3, line 45-59; column #14, line 8-30). Narwankar shows, with respect to claim #20, a film forming apparatus that forms a silicon-containing film (column #3, line 45-59) in a recess (fig. #7a, item 701) (column #13, line 18-31) formed on a surface of a substrate, the film forming apparatus comprising: a film former configured to form a flowable film (SiF4) (column #13, line 64-67; column #14, line 1-7; column #3, line 45-59) in the recess (fig. #7a, item 701). Narwankar substantially shows the claimed invention as shown in the rejection of claim #20 above. Narwankar fails to show, with respect to claim #20, a film forming apparatus comprising, an oligomer in a liquid state and a thermal processor configured to cure the oligomer the flowable film by thermally processing the substrate at a second temperature higher than the first temperature; and a controller configured to perform a process including: by the film former, forming the oligomer in the recess by exposing the substrate, which is adjusted to a first temperature, to plasma generated from a processing gas including a halogen-containing silane and a halogen-free silane: and by the thermal processor, curing the oligomer to form the silicon-containing film in a solid state by thermally processing the substrate at a second temperature higher than the first temperature. Khandelwal teaches, with respect to claim #20, a film forming apparatus comprising, an oligomer in a liquid state and a thermal processor configured to cure the oligomer (paragraph 0006, 1136, 1141) the flowable film by thermally processing the substrate at a second temperature higher than the first temperature (paragraph 1161-1164); and a controller configured to perform a process including (paragraph 1163): by the film former, forming the oligomer in the recess by exposing the substrate, which is adjusted to a first temperature (paragraph 1161-1164), to plasma generated from a processing gas including a halogen-containing silane and a halogen-free silane (paragraph 0003, 0006): and by the thermal processor, curing the oligomer to form the silicon-containing film in a solid state by thermally processing the substrate at a second temperature higher than the first temperature (paragraph 1011-1037). It would have been obvious to one having ordinary skill in the art at the time the invention was made, with respect to claim #20, to modified the invention of Narwankar as modified by the invention of Khandelwal, which teaches, a film forming apparatus comprising, an oligomer in a liquid state and a thermal processor configured to cure the oligomer the flowable film by thermally processing the substrate at a second temperature higher than the first temperature; and a controller configured to perform a process including: by the film former, forming the oligomer in the recess by exposing the substrate, which is adjusted to a first temperature, to plasma generated from a processing gas including a halogen-containing silane and a halogen-free silane: and by the thermal processor, curing the oligomer to form the silicon-containing film in a solid state by thermally processing the substrate at a second temperature higher than the first temperature, to incorporate a structural condition to provide increasingly fine-tuned molecular precursors which are required to meet the requirements of volatility (for vapor deposition processes), lower process temperatures, reactivity with various oxidants and low film contamination, in addition to high deposition rates, conformality and consistency of films produced, as taught by Khandelwal. // Claim #5-9 are rejected under 35 U.S.C. 103 as being unpatentable over Narwankar (U.S. Pat. No, 6,136,685), hereinafter referred to as "Narwankar" as shown in the rejection of claim #1 above and in view of Tsai et al., (U.S. Pub. No. 2020/0105589), hereinafter referred to as "Tsai". Narwankar substantially shows the claimed invention as shown in the rejection of claim #1 above. Narwankar fails to show, with respect to claim #5, a method wherein the halogen- containing silane is dichlorosilane (DCS). Tsai teaches, with respect to claim #5, a method wherein the halogen- containing silane is dichlorosilane (DCS) (paragraph 0020-0021). It would have been obvious to one having ordinary skill in the art at the time the invention was made, with respect to claim #5, to modified the invention of Narwankar as modified by the invention of Tsai, which teaches, a method wherein the halogen-containing silane is dichlorosilane (DCS), to incorporate a structural condition that would provide a higher silicon crystal growth rate and decomposition at lower temperatures, as taught by Tsai. Narwankar fails to show, with respect to claim #6, a method wherein the processing gas includes a halogen-free silane. Tsai teaches, with respect to claim #6, a method wherein the processing gas includes a halogen-free silane (paragraph 0020-0021). It would have been obvious to one having ordinary skill in the art at the time the invention was made, with respect to claim #6, to modified the invention of Narwankar as modified by the invention of Tsai, which teaches, a method wherein the processing gas includes a halogen-free silane, to incorporate a structural condition that would provide a higher silicon crystal growth rate and decomposition at lower temperatures, as taught by Tsai. Narwankar fails to show, with respect to claim #7, a method wherein the halogen-free silane is one or a plurality of gases represented by SixH2+2x (where x is a natural number of 1 or more). Tsai teaches, with respect to claim #7, a method wherein the halogen-free silane is one or a plurality of gases represented by SixH2+2x (where x is a natural number of 1 or more) (paragraph 0020-0021). It would have been obvious to one having ordinary skill in the art at the time the invention was made, with respect to claim #7, to modified the invention of Narwankar as modified by the invention of Tsai, which teaches, a method wherein the halogen-free silane is one or a plurality of gases represented by SixH2+2x (where x is a natural number of 1 or more), to incorporate a structural condition that would provide a higher silicon crystal growth rate and decomposition at lower temperatures, as taught by Tsai. Narwankar fails to show, with respect to claim #8, a method wherein the halogen-free silane is monosilane (SiH4). Tsai teaches, with respect to claim #8, a method wherein the halogen-free silane is monosilane (SiH4) (paragraph 0020-0021). It would have been obvious to one having ordinary skill in the art at the time the invention was made, with respect to claim #8, to modified the invention of Narwankar as modified by the invention of Tsai, which teaches, a method wherein the halogen-free silane is monosilane (SiH4), to incorporate a structural condition that would provide a higher silicon crystal growth rate and decomposition at lower temperatures, as taught by Tsai. Narwankar shows, with respect to claim #9, a method wherein the processing gas includes at least one of H2, He, N2 or Ar (column #11, line 55-64). // Claim #10, 11 are rejected under 35 U.S.C. 103 as being unpatentable over Narwankar (U.S. Pat. No, 6,136,685), hereinafter referred to as "Narwankar" as modified by Tsai et al., (U.S. Pub. No. 2020/0105589), hereinafter referred to as "Tsai" as shown in the rejection of claim #9 above, and in further view of Yang et al., (U.S. Pub. No. 2008/0160210), hereinafter referred to as "Yang". Narwankar as modified by Tsai, substantially shows the claimed invention as shown in the rejection of claim #9 above. Narwankar as modified by Tsai fail to show, with respect to claim #10, a method wherein the first temperature is 80 degrees C or lower, and wherein the second temperature is 150 degrees C or higher and 750 degrees C or lower. Yang teaches, with respect to claim #10, a method wherein the first temperature is 80 degrees C or lower (paragraph 0012, 0042), and wherein the second temperature is 150 degrees C or higher and 750 degrees C or lower (paragraph 0074). It would have been obvious to one having ordinary skill in the art at the time the invention was made, with respect to claim #10, to modified the invention of Narwankar as modified by Tsai, with the modification of the invention of Yang, which teaches, a method wherein the first temperature is 80 degrees C or lower, and wherein the second temperature is 150 degrees C or higher and 750 degrees C or lower, to incorporate a structural condition wherein volatile products are removed from surface areas, as taught by Yang. Narwankar as modified by Tsai and Yang, substantially shows the claimed invention as shown in the rejection of claim #10 above. Narwankar as modified by Tsai, fail to show, with respect to claim #11, a method wherein in the step (b), the substrate is exposed to plasma generated from H2. Yang teaches, with respect to claim #11, a method wherein in the step (b), the substrate is exposed to plasma generated from H2 (paragraph 0020). It would have been obvious to one having ordinary skill in the art at the time the invention was made, with respect to claim #11, to modified the invention of Narwankar as modified by Yang, with the modification of the invention of Tsai, which teaches, a method wherein in the step (b), the substrate is exposed to plasma generated from H2, to incorporate a structural condition with enhanced oxidation characteristics, as taught by Yang. /// Claim #12, 13 are rejected under 35 U.S.C. 103 as being unpatentable over Narwankar (U.S. Pat. No, 6,136,685), hereinafter referred to as "Narwankar" as modified by Tsai et al., (U.S. Pub. No. 2020/0105589), hereinafter referred to as "Tsai" and Yang et al., (U.S. Pub. No. 2008/0160210), hereinafter referred to as "Yang", as shown in the rejection of claim #11 above, and in further view of CITLA et al., (U.S. Pub. No. 2022/0351969), hereinafter referred to as "Citla". Narwankar as modified by Tsai and Yang, substantially shows the claimed invention as shown in the rejection of claim #11 above. Narwankar as modified by Tsai and Yang, fail to show, with respect to claim #12, a method wherein in the step (b), the plasma is generated by RF power having a frequency band of 100 MHz or more and 1 GHz or less. Citla teaches, with respect to claim #12, a method wherein in the step (b), the plasma is generated by RF power having a frequency band of 100 MHz or more and 1 GHz or less (paragraph 0040). It would have been obvious to one having ordinary skill in the art at the time the invention was made, with respect to claim #12, to modified the invention of Narwankar as modified by Tsai and Yang, with the modification of the invention of Citla, which teaches, a method wherein in the step (b), the plasma is generated by RF power having a frequency band of 100 MHz or more and 1 GHz or less, to incorporate a structural condition wherein volatile products are removed from surface areas, as taught by Citla. Narwankar as modified by Tsai, Yang and Citla, substantially shows the claimed invention as shown in the rejection of claim #12 above. Narwankar as modified by Yang and Citla, fail to show, with respect to claim #13, a method wherein in the step (b), the substrate is irradiated with ultraviolet rays. Tsai teaches, with respect to claim #13, a method wherein in the step (b), the substrate is irradiated with ultraviolet rays (paragraph 0024). It would have been obvious to one having ordinary skill in the art at the time the invention was made, with respect to claim #13, to modified the invention of Narwankar as modified by Yang and Citla, with the modification of the invention of Tsai, which teaches, a method wherein in the step (b), the substrate is irradiated with ultraviolet rays, to incorporate a method that would provide rapid curing times, higher production speeds, and increased energy efficiency compared to traditional methods, as taught by Tsai. /// Claim #14-17 are rejected under 35 U.S.C. 103 as being unpatentable over Narwankar (U.S. Pat. No, 6,136,685), hereinafter referred to as "Narwankar" as modified by Tsai et al., (U.S. Pub. No. 2020/0105589), hereinafter referred to as "Tsai", Yang et al., (U.S. Pub. No. 2008/0160210), hereinafter referred to as "Yang" and CITLA et al., (U.S. Pub. No. 2022/0351969), hereinafter referred to as "Citla", as shown in the rejection of claim #13 above, and in further view of Goto et al., (U.S. Pub. No. 2004/0209005), hereinafter referred to as "Goto". Narwankar as modified by Tsai, Yang and Citla, substantially shows the claimed invention as shown in the rejection of claim #13 above. Narwankar as modified by Tsai, Yang and Citla, fail to show, with respect to claim #14, a method wherein the processing gas includes a metal-containing gas. Goto teaches, with respect to claim #14, a method a method wherein the processing gas includes a metal-containing gas (paragraph 0027, 0143). It would have been obvious to one having ordinary skill in the art at the time the invention was made, with respect to claim #14, to modified the invention of Narwankar as modified by Tsai ,Yang and Citla, with the modification of the invention of Tsai, which teaches, a method wherein the processing gas includes a metal-containing gas, to incorporate a device wherein it is possible to form an insulating film, which has a high dielectric constant and is low in oxygen deficiency, easily, and at a low cost, as taught by Goto. Narwankar as modified by Tsai, Yang and Citla, fail to show, with respect to claim #15, a method wherein the metal-containing gas is trimethylaluminum (TMA). Goto teaches, with respect to claim #15, a method a method wherein the metal-containing gas is trimethylaluminum (TMA) (paragraph 0128-0129, 0173). It would have been obvious to one having ordinary skill in the art at the time the invention was made, with respect to claim #15, to modified the invention of Narwankar as modified by Tsai ,Yang and Citla, with the modification of the invention of Tsai, which teaches, a method wherein the metal-containing gas is trimethylaluminum (TMA), to incorporate a device wherein it is possible to form an insulating film, which has a high dielectric constant and is low in oxygen deficiency, easily, and at a low cost, as taught by Goto. Narwankar shows, with respect to claim #16, a method wherein the step (b) is performed within 60 seconds after the step (a) (column #16, line 21-28). The Examiner notes that Narwankar does not explicitly state a time duration between processes. However, the Examiner notes that Narwankar shows (column #16, line 21-28) that the heating process is within the cycle of the deposition and that other variations of the steps can be implemented at the discretion of those persons of skill in the art. Furthermore, Narwankar shows no movement of the target, that might account for time between process, but demonstrated that the cycles are performed in same environment. For these reasons, the Examiner takes the position the time period shown in the above claim is taught by Narwankar. Narwankar shows, with respect to claim #17, a method comprising repeating the step (a) and the step (b) (column #16, line 21-28, column #11, line 16-25). EXAMINATION NOTE The rejections above rely on the references for all the teachings expressed in the text of the references and/or one of ordinary skill in the art would have reasonably understood or implied from the texts of the references. To emphasize certain aspects of the prior art, only specific portions of the texts have been pointed out. Each reference as a whole should be reviewed in responding to the rejection, since other sections of the same reference and/or various combinations of the cited references may be relied on in future rejections in view of amendments. Conclusion Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to Andre’ Stevenson whose telephone number is (571) 272 1683 (Email Address, Andre.Stevenson@USPTO.GOV). The examiner can normally be reached on Monday through Friday from 7:30 am to 4:30 pm. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Zandra Smith can be reached on 571-272 2429. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of an application may be obtained from the Patent Application Information Retrieval (PAIR) system. Status information for published applications may be obtained from either Private PAIR or Public PAIR. Status information for unpublished applications is available through Private PAIR only. For more information about the PAIR system, see http://pair-direct.uspto.gov. Should you have questions on access to the Private PAIR system, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative or access to the automated information system, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /Andre’ Stevenson Sr./ Art Unit 2899 03/08/2026 /ZANDRA V SMITH/ Supervisory Patent Examiner, Art Unit 2899
Read full office action

Prosecution Timeline

Jul 12, 2023
Application Filed
Oct 26, 2025
Non-Final Rejection — §103
Jan 29, 2026
Response Filed
Mar 08, 2026
Final Rejection — §103 (current)

Precedent Cases

Applications granted by this same examiner with similar technology

Patent 12604687
LARGE-AREA/WAFER-SCALE CMOS-COMPATIBLE 2D-MATERIAL INTERCALATION DOPING TOOLS, PROCESSES, AND METHODS, INCLUDING INTERCALATION DOPING OF SYNTHESIZED AND PATTERNED GRAPHENE
2y 5m to grant Granted Apr 14, 2026
Patent 12588267
SEMICONDUCTOR DEVICE AND METHOD OF FORMING THE SAME
2y 5m to grant Granted Mar 24, 2026
Patent 12568807
INTERCONNECT STRUCTURE FOR SEMICONDUCTOR DEVICE AND RELATED METHODS
2y 5m to grant Granted Mar 03, 2026
Patent 12568670
SELF-ALIGNED CONTACT STRUCTURES
2y 5m to grant Granted Mar 03, 2026
Patent 12563828
FIN HEIGHT AND STI DEPTH FOR PERFORMANCE IMPROVEMENT IN SEMICONDUCTOR DEVICES HAVING HIGH-MOBILITY P-CHANNEL TRANSISTORS
2y 5m to grant Granted Feb 24, 2026
Study what changed to get past this examiner. Based on 5 most recent grants.

AI Strategy Recommendation

Get an AI-powered prosecution strategy using examiner precedents, rejection analysis, and claim mapping.
Powered by AI — typically takes 5-10 seconds

Prosecution Projections

3-4
Expected OA Rounds
90%
Grant Probability
96%
With Interview (+6.8%)
2y 5m
Median Time to Grant
Moderate
PTA Risk
Based on 852 resolved cases by this examiner. Grant probability derived from career allow rate.

Sign in with your work email

Enter your email to receive a magic link. No password needed.

Personal email addresses (Gmail, Yahoo, etc.) are not accepted.

Free tier: 3 strategy analyses per month