DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Election/Restrictions
Applicant’s election without traverse of Species I, FIGS. 4-5 (Claims 1-15) in the reply filed on 10/27/2025 is acknowledged.
Claims 16-18 are withdrawn from further consideration pursuant to 37 CFR 1.142(b) as being drawn to a nonelected species, there being no allowable generic or linking claim. Election was made without traverse in the reply filed on 10/27/2025.
Priority
Receipt is acknowledged of certified copies of papers required by 37 CFR 1.55.
Information Disclosure Statement
The information disclosure statement (IDS) was submitted on 4/5/2023. The submission is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claim 2 is rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. Particularly, lines 4-5 of Claim 2 include the limitation “the second switch element is electrically connected to an other of the positive electrode”, when it is not distinct what “other” of “the positive electrode” is referring to, since a singular “a positive electrode” was included in line 2 of Claim 2. Therefore, for the purposes of examination, “the second switch element is electrically connected to an other of the positive electrode” will just be interpreted as “the second switch element is electrically connected to the positive electrode”.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1-4 and 12-15 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Kimura et al (US 2017/0301614 A1, hereafter Kimura).
Re Claim 1, Kimura discloses a semiconductor module (FIG. 14, with reference to FIGS. 15, 18) comprising:
a first semiconductor component (FIG. 14, right half portion; [0149]) and a second semiconductor component (FIG. 14, left half portion; [0149]) disposed in a cooler (20; [0192]), wherein:
the first semiconductor component (FIG. 14, right half portion) includes a first semiconductor chip (FIG. 14, right side 15, hereafter just right side 15; [0157]) on which a first switch element (“right side MOSFET” 15; [0157]) is arranged ([0157]), and a first heat sink (FIG. 14, right side 16, 17, hereafter just right side 16, 17; [0071]) on which the first semiconductor chip (right side 15) is arranged ([0157]-[0158]);
the second semiconductor component (FIG. 14, left half portion) includes a second semiconductor chip (FIG. 14, left side 14, hereafter just left side 14; [0150]) on which a second switch element (“left side IGBT” 14; [0150]) is arranged ([0150]), and a second heat sink (FIG. 14, left side 16, 17, hereafter just left side 16, 17; [0071]) on which the second semiconductor chip (left side 14) is arranged ([0150]-[0151]);
the first semiconductor chip (right side 15) is smaller in size than the second semiconductor chip (left side 14; [0149]);
a first heat conduction surface (right side 15, top/bottom surface; [0157]-[0158]) that contributes to heat conduction between the first semiconductor chip (right side 15) and the first heat sink (left side 16, 17; [0157]-[0158]) is smaller in an area than a second heat conduction surface (left side 14, top/bottom surface; [0150]-[0151]) that contributes to heat conduction between the second semiconductor chip (left side 14) and the second heat sink (left side 16, 17; [0150]-[0151]); and
a first region of the cooler (20, right half, corresponding to right half of FIG. 18) where the first semiconductor component (FIG. 14, right half portion) is disposed has higher cooling performance than a second region of the cooler (20, left half, corresponding to left half of FIG. 18) where the second semiconductor component (FIG. 14, left half portion) is disposed ([0194], by virtue of the flow first passing through the right half of FIG. 18/the first region).
Re Claim 2, Kimura discloses the module according to Claim 1, while further disclosing wherein:
the first switch element (“right side MOSFET” 15) is electrically connected to one of a positive electrode (Lp electrode, hereafter just Lp; [0141]) and a negative electrode (Ln electrode, hereafter just Ln; [0141]) of a power supply (B; [0141]); and
the second switch element (“left side IGBT” 14) is electrically connected to the positive electrode (Lp) and the negative electrode (Ln; [0141]).
Re Claim 3, Kimura discloses the module according to Claim 2, while further disclosing wherein the first switch element (“right side MOSFET” 15) and the second switch element (“left side IGBT” 14) are electrically connected in series between the positive electrode (Lp) and the negative electrode (Ln; FIG. 15; [0146]).
Re Claim 4, Kimura discloses the module according to Claim 2, while further disclosing wherein the first semiconductor component (FIG. 14, right half portion) and the second semiconductor component (FIG. 14, left half portion) commonly have a coating resin (11b; [0149]) for covering and protecting the first semiconductor chip (right side 15) and the second semiconductor chip (left side 14), respectively ([0149]).
Re Claim 12, Kimura discloses the module according to Claim 1, while further disclosing wherein:
the cooler (20) includes a supply port (21; [0057]) to which a refrigerant is supplied ([0057]), a discharge port (22; [0057]) to which the refrigerant is discharged ([0057]), and a flow path (F; [0192]) connecting the supply port (21) and the discharge port (22; [0192]); and
the first region (20, right half, corresponding to right half of FIG. 18) is positioned closer to the supply port (21) than the second region (20, left half, corresponding to left half of FIG. 18) in the flow path (F; [0192]).
Re Claim 13, Kimura discloses the module according to Claim 12, while further disclosing wherein each of the first heat conduction surface (right side 15, top/bottom surface) and the second heat conduction surface (left side 14, top/bottom surface) is divided into a plurality of portions (top/bottom surfaces; [0150]-[0151], [0157]-[0158]).
Re Claim 14, Kimura discloses the module according to Claim 13, while further disclosing wherein:
the cooler (20) includes a supply pipe (21) having the supply port (21; [0057]), a discharge pipe (22) having the discharge port (22; [0057]), and a plurality of relay pipes (23; [0057]) connecting the supply pipe (21) and the discharge pipe (22; [0057]); and
the plurality of relay pipes (23) include each of the first region (20, right half, corresponding to right half of FIG. 18) and the second region (20, left half, corresponding to left half of FIG. 18; [0057]).
Re Claim 15, Kimura discloses the module according to Claim 14, while further disclosing wherein:
the plurality of relay pipes (23) are spaced apart in a separation direction away from the supply port (21; [0057]); and
each of the first semiconductor component (FIG. 14, right half portion) and the second semiconductor component (FIG. 14, left half portion) is disposed in a gap between two of the relay pipes (23) arranged side by side in the separation direction; [0057].
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claim 8 is rejected under 35 U.S.C. 103 as being unpatentable over Kimura, as applied to Claim 1, in view of Liu et al (US 2019/0355634 A1, hereafter Liu).
Re Claim 8, Kimura discloses the module according to Claim 1, while further teaching a material for forming the first switch element (“right side MOSFET” 15) is SiC or GaN ([0066], SiC).
Kimura does not explicitly disclose wherein a material for forming the second switch element (“left side IGBT” 14) is SiC or GaN.
However, Liu teaches a semiconductor module (FIG. 1; [0016]) wherein a material for forming the second switch element (“semiconductor switch”, specifically SiC IGBT) is SiC or GaN ([0016], SiC).
Thus, it would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to modify the module as discussed for Claim 1 with the limitations taught by Davison to have the IGBT switch be formed in part with SiC to utilize a wide bandgap material for high voltage compatibility as taught by Liu ([0005], [0016]).
Claims 9-10 are rejected under 35 U.S.C. 103 as being unpatentable over Kimura, as applied to Claim 1, in view of Davison (US 2019/0356227 A1).
Re Claim 9, Kimura discloses the module according to Claim 1, but does not explicitly disclose wherein an amount of heat generated in the first switch element (right side 15) due to energization is equal to or less than an amount of heat generated in the second switch element (left side 14) due to energization.
However, Davison teaches a semiconductor module (FIG. 3; [0061]) wherein an amount of heat generated in the first switch element (MOSFET) due to energization is equal to or less than an amount of heat generated in the second switch element (IGBT) due to energization ([0061], specifically in low current conditions).
Thus, it would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to modify the module as discussed for Claim 1 with the limitations taught by Davison to specify the predictable result of the MOSFET producing less heat than the IGBT in low current conditions due to the voltage drop across a MOSFET being a function of current, compared to the fixed voltage drop of an IGBT, as taught by Davison ([0061]).
Re Claim 10, Kimura and Davison teach the module according to Claim 9, while Kimura further teaches wherein an electric resistance of the first switch element (right side 15) in an energization state is equal to or less than an electric resistance of the second switch element (left side 14) in an energization state ([0103]).
Allowable Subject Matter
Claims 5-7 and 11 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter:
Re Claim 5, the prior art cannot anticipate or render obvious the limitations of: the first semiconductor component has a first free wheel diode […] disposed on the first semiconductor chip with the first switch element, in combination with the additionally claimed features of Claim 5.
Re Claim 7, the prior art cannot anticipate or render obvious the limitations of: the first switch element and the second switch element are transistors of a same type, in combination with the additionally claimed features of Claim 7.
Re Claim 11, the prior art cannot anticipate or render obvious the limitations of: a switching speed of the first switch element is equal to or lower than a switching speed of the second switch element, in combination with the additionally claimed features of Claim 11.
In Re Claim 6, it is objected to due to being dependent on objected Claim 5.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to COLIN RUSSELL MCCUTCHEON whose telephone number is (703)756-1897. The examiner can normally be reached Monday-Friday, 12:30-9:30 EST.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, DREW N RICHARDS can be reached at (571) 272-1736. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/COLIN RUSSELL MCCUTCHEON/Examiner, Art Unit 2892
/NORMAN D RICHARDS/Supervisory Patent Examiner, Art Unit 2892