Prosecution Insights
Last updated: April 19, 2026
Application No. 18/301,938

Component Carrier and Method of Manufacturing the Same

Non-Final OA §103
Filed
Apr 17, 2023
Examiner
WILLIS, TREMESHA S
Art Unit
2847
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
At&S Austria Technologie & Systemtechnik AG
OA Round
4 (Non-Final)
78%
Grant Probability
Favorable
4-5
OA Rounds
2y 6m
To Grant
95%
With Interview

Examiner Intelligence

Grants 78% — above average
78%
Career Allow Rate
679 granted / 873 resolved
+9.8% vs TC avg
Strong +18% interview lift
Without
With
+17.5%
Interview Lift
resolved cases with interview
Typical timeline
2y 6m
Avg Prosecution
44 currently pending
Career history
917
Total Applications
across all art units

Statute-Specific Performance

§101
0.2%
-39.8% vs TC avg
§103
31.6%
-8.4% vs TC avg
§102
49.7%
+9.7% vs TC avg
§112
16.8%
-23.2% vs TC avg
Black line = Tech Center average estimate • Based on career data from 873 resolved cases

Office Action

§103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Response to Amendment The amendments to claims 20 and 21 overcome the objection to the Drawings. Thus, the objection to the Drawings is withdrawn. Applicant’s arguments with respect to claims 1 – 3, 5 – 13, and 15 - 21 have been considered, but they are moot in view of the new ground(s) of rejection. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention. Claims 1 – 3, 5 – 13, and 15 – 21 are rejected under 35 U.S.C. 103 as being unpatentable over Park et al. (U.S. Patent Publication No. 2013/0267066) in view of Liang (U.S. Patent Publication No. 2015/0061125). Regarding claim 1, in Figure 1C, Park discloses a component carrier, comprising: a stack (100a) comprising at least one electrically conductive layer structure (13, 19, 26, 150) and/or at least one electrically insulating layer structure (15, 17, 130); a component (10) comprising a terminal (13) made of a first electrically conductive material (paragraph [0078]) with the terminal embedded in the stack, wherein the first conductive material is selected from the group consisting of aluminum, silver, titanium, gold, silicon, SiC, SiO2, and GaN; a recess (18) in the stack exposing at least a part of the terminal of the component (the insulating layer 17 includes an opening 18 that exposed bonding pad 13, paragraph [0062]; Figure 1C); an interface structure (19) directly on the first electrically conductive material of the at least partially exposed terminal, wherein the interface structure at least partially covers a sidewall of the recess (Figure 1C); and an electrically conductive structure (126) on the interface structure made of a second electrically conductive material (copper or nickel; paragraphs [0083] - [0085]; Figure 2F), wherein the second electrically conductive material is different from the first electrically conductive material and at least partially extends over the sidewall of the recess (Figure 1C). Park does not specifically disclose wherein the second electrically conductive material is different from the first electrically conductive material. In fact, Park does not specify the conductive material of bonding pad 13. However, in Figure 7, Liang discloses bonding pads 204, 206 being gold plated (paragraph [0034], claim 4). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention for the conductive material of bonding pad 13 of Park to be formed of gold as taught by Liang (and thus formed of a different material from routing pattern 126 of Park) in that one having ordinary skill in the art would know that forming bonding pads of a well-conducting material, such as gold, is common place and well known in the art, and is merely a design option for a skilled artisan without the exercise of inventive skill. Regarding claim 2, Park discloses wherein the electrically conductive structure is arranged at least on a portion of the interface structure, which covers the sidewall of the recess (Figure 1C). Regarding claim 3, Park discloses wherein the interface structure partially protrudes into the terminal (Figure 1C). Regarding claim 5, Park discloses wherein the second electrically conductive material is copper (paragraphs [0083] - [0085]). Regarding claim 6, Park discloses wherein the interface structure includes or is an adhesion promoter of one of titanium, copper nitride, tungsten, chromium and nickel (paragraph [0062]). Regarding claim 7, Park discloses wherein the adhesion promoter has a thickness in the range between 20 nm and 100 nm (paragraphs [0062] – [0063]). Regarding claim 8, Park discloses wherein the interface structure comprises or is a diffusion barrier of nickel (paragraph [0062]). Regarding claim 9, Park discloses wherein the diffusion barrier has a thickness in the range between 150 nm and 500 nm (paragraphs [0062] – [0063]). Regarding claim 10, Park discloses at least one of the following features: the component carrier includes at least one component being surface mounted on and/or embedded in the component carrier, wherein the at least one component is selected from a group consisting of an electronic component, an electrically non-conductive and/or electrically conductive inlay, a heat transfer unit, a light guiding element, an energy harvesting unit, an active electronic component, a passive electronic component, an electronic chip, a storage device, a filter, an integrated circuit, a signal processing component, a power management component, an optoelectronic interface element, a voltage converter, a cryptographic component, a transmitter and/or receiver, an electromechanical transducer, an actuator, a microelectromechanical system, a microprocessor, a capacitor, a resistor, an inductance, an accumulator, a switch, a camera, an antenna, a magnetic element, a further component carrier, and a logic chip; wherein at least one of the electrically conductive layer structures of the component carrier includes at least one of a group consisting of copper, aluminum, nickel, silver, gold, palladium, and tungsten; wherein the electrically insulating layer structure includes at least one of the group consisting of reinforced or non-reinforced resin, epoxy resin or bismaleimide-triazine resin, FR-4, FR-5, cyanate ester, polyphenylene derivate, glass, prepreg material, polyimide, polyamide, liquid crystal polymer, epoxy-based Build-Up Film, polytetrafluoroethylene, a ceramic, and a metal oxide; wherein the component carrier is shaped as a plate; wherein the component carrier is configured as one of a group consisting of a printed circuit board, a substrate, and an interposer; wherein the component carrier is configured as a laminate-type component carrier (Figure 1C). Regarding claim 11, in Figure 1C, Park discloses a method of manufacturing a component carrier, comprising: forming a stack (100a) including at least one electrically conductive layer structure (13, 19, 26, 150) and/or at least one electrically insulating layer structure (15, 17, 130); embedding a component (10) having a terminal (13) made of a first electrically conductive material, in the stack, wherein the first conductive material is selected from the group consisting of aluminum, silver, titanium, gold, silicon, SiC, SiO2, and GaN; forming a recess (18) in the stack exposing at least a part of the terminal of the component (the insulating layer 17 includes an opening 18 that exposed bonding pad 13, paragraph [0062]; Figure 1C); forming an interface structure (19) directly on the first electrically conductive material of the at least partially exposed terminal, wherein the interface structure at least partially covers a sidewall of the recess (Figure 1C); and forming an electrically conductive structure (126) on the interface structure made of a second electrically conductive material (copper or nickel; paragraphs [0083] - [0085]; Figure 2F), wherein the second electrically conductive material is different from the first electrically conductive material and at least partially extends over the sidewall of the recess (Figure 1C). Park does not specifically disclose wherein the second electrically conductive material is different from the first electrically conductive material. In fact, Park does not specify the conductive material of bonding pad 13. However, in Figure 7, Liang discloses bonding pads 204, 206 being gold plated (paragraph [0034], claim 4). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention for the conductive material of bonding pad 13 of Park to be formed of gold as taught by Liang (and thus formed of a different material from routing pattern 126 of Park) in that one having ordinary skill in the art would know that forming bonding pads of a well-conducting material, such as gold, is common place and well known in the art, and is merely a design option for a skilled artisan without the exercise of inventive skill. Regarding claim 12, Park discloses wherein the electrically conductive structure is arranged at least on a portion of the interface structure, which covers the sidewall of the recess (Figure 1C). Regarding claim 13, Park discloses wherein the interface structure partially protrudes into the terminal (Figure 1C). Regarding claim 15, Park discloses wherein the second electrically conductive material is copper (paragraphs [0083] - [0085]). Regarding claim 16, Park discloses wherein the interface structure includes or is an adhesion promoter of one of titanium, copper nitride, tungsten, chromium and nickel (paragraph [0062]). Regarding claim 17, Park discloses wherein the interface structure includes or is a diffusion barrier of nickel (paragraphs [0062] – [0063]). Regarding claim 18, Park discloses wherein forming the interface structure and the electrically conductive structure is carried out simultaneously with forming an interface structure and an electrically conductive structure in a through hole of the stack (paragraphs [0062] – [0063], [0083] – [0085]). Regarding claim 19, Park discloses wherein at least one of the interface structure and the electrically conductive structure are deposited by a deposition process or a sputter process, such as thin film deposition, high-power impulse magnetron sputtering, chemical-vapor deposition, plasma-enhanced chemical-vapor deposition, laser ablation, or electroless deposition (paragraphs [0062] – [0063], [0083] – [0085]; Figures 2A - 2F). Regarding claim 20, in Figure 1C, Park discloses a component carrier, comprising: a stack (100a) comprising at least one electrically conductive layer structure (13, 19, 26, 150) and/or at least one electrically insulating layer structure (15, 17, 130); a component (10) comprising a terminal (13) with a single metal structure made of a first electrically conductive material (Figure 1C) and the component and the terminal being embedded in the stack (Figure 1C); a recess (18) in the stack exposing at least a part of the terminal of the component (the insulating layer 17 includes an opening 18 that exposed bonding pad 13, paragraph [0062]; Figure 1C); an interface structure (19) directly on the at least partially exposed terminal, wherein the interface structure at least partially covers a sidewall of the recess (Figure 1C); and an electrically conductive structure (126) on the interface structure made of a second electrically conductive material (paragraphs [0083] and [0085]), wherein the second electrically conductive material is different from the first electrically conductive material (copper or nickel; paragraphs [0083] - [0085]; Figure 2F) and at least partially extends over the sidewall of the recess (Figure 1C). Park does not specifically disclose wherein the second electrically conductive material is different from the first electrically conductive material. In fact, Park does not specify the conductive material of bonding pad 13. However, in Figure 7, Liang discloses bonding pads 204, 206 being gold plated (paragraph [0034], claim 4). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention for the conductive material of bonding pad 13 of Park to be formed of gold as taught by Liang (and thus formed of a different material from routing pattern 126 of Park) in that one having ordinary skill in the art would know that forming bonding pads of a well-conducting material, such as gold, is common place and well known in the art, and is merely a design option for a skilled artisan without the exercise of inventive skill. Regarding claim 21, in Figure 1C, Park discloses a method of manufacturing a component carrier, comprising: forming a stack (100a) including at least one electrically conductive layer structure (13, 19, 26, 150) and/or at least one electrically insulating layer structure (15, 17, 130); embedding a component (10) having a terminal (13) comprising a single metal structure made of a first electrically conductive material (Figure 1C), in the stack; forming a recess (18) in the stack exposing at least a part of the terminal of the component (the insulating layer 17 includes an opening 18 that exposed bonding pad 13, paragraph [0062]; Figure 1C); forming an interface structure (19) directly on the at least partially exposed terminal, wherein the interface structure at least partially covers a sidewall of the recess (Figure 1C); and forming an electrically conductive structure (126) on the interface structure made of a second electrically conductive material (copper or nickel; paragraphs [0083] - [0085]; Figure 2F), wherein the second electrically conductive material is different from the first electrically conductive material and at least partially extends over the sidewall of the recess (Figure 1C). Park does not specifically disclose wherein the second electrically conductive material is different from the first electrically conductive material. In fact, Park does not specify the conductive material of bonding pad 13. However, in Figure 7, Liang discloses bonding pads 204, 206 being gold plated (paragraph [0034], claim 4). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention for the conductive material of bonding pad 13 of Park to be formed of gold as taught by Liang (and thus formed of a different material from routing pattern 126 of Park) in that one having ordinary skill in the art would know that forming bonding pads of a well-conducting material, such as gold, is common place and well known in the art, and is merely a design option for a skilled artisan without the exercise of inventive skill. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to TREMESHA W BURNS whose telephone number is (571)270-3391. The examiner can normally be reached Monday-Friday 8am - 4:30 pm EST. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Timothy Thompson can be reached at (571) 272-2342. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. TREMESHA W. BURNS Primary Examiner Art Unit 2847 /TREMESHA W BURNS/Primary Examiner, Art Unit 2847
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Prosecution Timeline

Apr 17, 2023
Application Filed
Nov 22, 2024
Non-Final Rejection — §103
Feb 18, 2025
Applicant Interview (Telephonic)
Feb 18, 2025
Examiner Interview Summary
Feb 25, 2025
Response Filed
Jun 07, 2025
Final Rejection — §103
Sep 04, 2025
Request for Continued Examination
Sep 09, 2025
Response after Non-Final Action
Sep 28, 2025
Non-Final Rejection — §103
Dec 26, 2025
Response Filed
Mar 27, 2026
Non-Final Rejection — §103 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

4-5
Expected OA Rounds
78%
Grant Probability
95%
With Interview (+17.5%)
2y 6m
Median Time to Grant
High
PTA Risk
Based on 873 resolved cases by this examiner. Grant probability derived from career allow rate.

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