DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Election/Restrictions
Applicant’s election without traverse of claims 13-17 and 21-34 in the reply filed on 12/9/25 is acknowledged.
Claim Rejections - 35 USC § 112
Claim 28 recites the limitation "the lateral dimension of the first semiconductor die" in lines 1 and 2. There is insufficient antecedent basis for this limitation in the claim.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 13-15, and 17 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Lee et al. (US pub 20220278065).
With respect to claim 13, Lee et al. teach a method of forming a bonded assembly, comprising (figs. 1-7E, particularly fig. 3G and 4A-4D and associated text):
providing a semiconductor die 100 comprising a bottom surface and a top surface;
forming a contoured sidewall (the lower left corner of 100) on the semiconductor die, wherein the contoured sidewall of the semiconductor die comprises a vertical sidewall segment (vertical left side) and a non-horizontal, non- vertical surface segment (slanted or contoured or convex portion) that is adjoined to a bottom edge (bottom surface of 100) of the vertical sidewall segment and is adjoined to an edge of the bottom surface;
attaching the semiconductor die and a high bandwidth memory (HBM) die 220 (para 0029) to a mating structure 210 such that the semiconductor die and the HBM die faces a first surface of the mating structure, wherein the mating structure comprises an interposer 210 or an in-process interposer that is subsequently modified into the interposer, wherein the contoured sidewall of the semiconductor die faces the HBM die; and
forming a dielectric material portion 230 between, and around, the semiconductor die and the HBM die.
With respect to claim 14, Lee et al. teach the dielectric material portion is applied directly on the vertical sidewall segment, the non-horizontal, non-vertical surface segment, and sidewalls of the HBM die. See fig. 3G and associated text.
With respect to claim 15, Lee et al. teach the non-horizontal, non-vertical surface segment is formed as: a beveled planar surface segment that is at a constant angle with respective to a horizontal plane including the bottom surface, the constant angle being in a range from 15 degrees to 75 degrees (para 0038); or a convex surface segment having a convex profile in a vertical cross-sectional view and having a straight edge in a horizontal cross-sectional view. See fig. 3G and 4A-4D and associated text.
With respect to claim 17, Lee et al. teach the HBM die comprises on-die bump structures (connector right above 222); the method comprises bonding the on-die bump structures to metal bonding structures (connector right below 222) located within the interposer via metal-to-metal bonding; and the dielectric material portion comprises a molding compound material. See fig. 3G and associated text.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 16 is/are rejected under 35 U.S.C. 103 as being unpatentable over Lee et al. (US pub 20220278065).
With respect to claim 16, Lee et al. teach the HBM die is attached to the interposer through an array of solder material portions 222; the dielectric material portion comprises an underfill material portion; and the method comprises applying a molding compound material around the underfill material portion, the semiconductor die, and the HBM die. See fig. 3G and associated text.
Lee et al. fail to teach the underfill has a filter material.
However, the inclusion of a filler material in an underfill is well-known in semiconductor art.
Claim(s) 21-26 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Lee et al. (US pub 20220278065).
With respect to claim 21, Lee et al. teach a method of forming a bonded assembly, comprising (figs. 1-7E, particularly fig. 3G and 4A-4D and associated text):
providing a first semiconductor die 100 comprising a planar horizontal bottom surface and a top surface;
forming a contoured sidewall (the lower left corner of 100) on the first semiconductor die, wherein the contoured sidewall of the first semiconductor die comprises a vertical sidewall segment and a non- horizontal, non-vertical surface segment that is adjoined to a bottom edge of the vertical sidewall segment and is adjoined to an edge of the planar horizontal bottom surface;
attaching the first semiconductor die and a second semiconductor die 220 to a mating structure 210 such that the first semiconductor die and the second semiconductor die faces a first surface of the mating structure, wherein the mating structure comprises an interposer 210 or an in- process interposer that is subsequently modified into the interposer, wherein the contoured sidewall of the first semiconductor die faces the second semiconductor die; and
forming a dielectric material portion 230 between, and around, the first semiconductor die and the second semiconductor die.
With respect to claim 22, Lee et al. teach the dielectric material portion is applied directly on the vertical sidewall segment, the non-horizontal, non-vertical surface segment, and sidewalls of the second semiconductor die. See fig. 3G and associated text.
With respect to claim 23, Lee et al. teach the non-horizontal, non-vertical surface segment is formed as a beveled planar surface segment that is at a constant angle with respective to a horizontal plane, the constant angle being in a range from 15 degrees to 75 degrees (see para 0038). See fig. 3G and 4A-4D and associated text.
With respect to claim 24, Lee et al. teach the non-horizontal, non-vertical surface segment is formed such that the non-horizontal, non-vertical surface segment extends inward toward a central region of the first semiconductor die from the vertical sidewall segment to the planar horizontal bottom surface. See fig. 3G and 4A-4D and associated text.
With respect to claim 25, Lee et al. teach a first horizontal dimension of the first semiconductor die measured at the edge of the planar horizontal bottom surface is greater than a second horizontal dimension of the first semiconductor die measured at the bottom edge of the vertical sidewall segment. See fig. 3G and 4A-4D and associated text.
With respect to claim 26, Lee et al. teach a vertical height of the non-horizontal, non- vertical surface segment is less than 20% of a vertical height of the vertical sidewall segment. See fig. 3G and 4A-4D and associated text.
Claim(s) 27-33 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Lee et al. (US pub 20220278065).
With respect to claim 27, Lee et al. teach a method of forming a bonded assembly, comprising (figs. 1-7E, particularly fig. 3G and 4A-4D and associated text):
providing a first semiconductor die 100, the first semiconductor die comprising a contoured sidewall (the lower left corner of 100), the contoured sidewall being a side surface that comprises a non-perpendicular segment relative to a primary surface of the first semiconductor die;
attaching the first semiconductor die and a second semiconductor die 220 to a mating structure 210 via an array of bonding structures 222, wherein the mating structure comprises an interposer 210 or an in-process interposer that is subsequently modified into the interposer, wherein the primary surface of the first semiconductor die is attached substantially parallel to a major surface of the mating structure, and wherein the first semiconductor die and the second semiconductor die are laterally positioned such that the contoured sidewall creates a variable lateral spacing between the first semiconductor die and the second semiconductor die to reduce local stress inherently (presence of the contoured surface) in the second semiconductor die proximal to the mating structure;
forming a first underfill material portion 230 between the first semiconductor die and the mating structure, and between the second semiconductor die and the mating structure; and
forming a molding compound material 240 to laterally surround the first semiconductor die and the second semiconductor die, wherein the molding compound material is in direct contact with the contoured sidewall of the first semiconductor die.
With respect to claim 28, Lee et al. teach the contoured sidewall is tapered such that the lateral dimension (the lateral dimension of the contoured or slanted portion of the first die) of the first semiconductor die decreases from the mating structure toward a top surface of the first semiconductor die. See fig. 3G and 4A-4D and associated text.
With respect to claim 29, Lee et al. teach the non-perpendicular segment of the contoured sidewall is formed to have a taper angle in a range from 1 degree to 20 degrees with respect to a vertical direction (para 0038). See fig. 3G and 4A-4D and associated text.
With respect to claim 30, Lee et al. teach the contoured sidewall comprises a vertical segment proximal to the mating structure and an outwardly sloped segment distal from the mating structure. See fig. 3G and 4A-4D and associated text.
With respect to claim 31, Lee et al. teach the non-perpendicular segment of the contoured sidewall is oriented such that the portion of the sidewall nearest the second semiconductor die forms an acute angle with the major surface of the mating structure. See fig. 3G and 4A-4D and associated text.
With respect to claim 32, Lee et al. teach the variable lateral spacing between the first semiconductor die and the second semiconductor die increases monotonically with distance from the mating structure. See fig. 3G and 4A-4D and associated text.
With respect to claim 33, Lee et al. teach the contoured sidewall is formed with a fillet radius connecting the sidewall to the top surface of the first semiconductor die. See fig. 3G and 4A-4D and associated text.
Allowable Subject Matter
Claim 34 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Examiner’s Cited References
The cited references generally show the similar or related structure having a first die and a second die on an interposer wherein the first die having a vertical surface facing the second die having a slanted or contoured portion as presently claimed by applicant.
Conclusion
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LONG . PHAM
Examiner
Art Unit 2823
/LONG PHAM/Primary Examiner, Art Unit 2897