DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Examiner Note
The examiner contacted the applicant multiple times between 5.14.2026 and 7.7.2026 seeking to amend claims 1, 6 and 34 and place the application in condition for allowance but was not successful in obtaining applicant authorization.
Drawings
The drawings are objected to under 37 CFR 1.83(a). The drawings must show every feature of the invention specified in the claims. Therefore, “wherein the isolation layer extends continuously between the first gate structure and the second gate structure” (claim 34) must be shown or the feature(s) canceled from the claim(s).
Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. The figure or figure number of an amended drawing should not be labeled as “amended.” If a drawing figure is to be canceled, the appropriate figure must be removed from the replacement sheet, and where necessary, the remaining figures must be renumbered and appropriate changes made to the brief description of the several views of the drawings for consistency. Additional replacement sheets may be necessary to show the renumbering of the remaining figures. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance.
Claim Objections
Claim 6 is objected to because of the following informalities: “comprising” should read --comprises--. Appropriate correction is required.
Claim Rejections - 35 USC § 112
The following is a quotation of the first paragraph of 35 U.S.C. 112(a):
(a) IN GENERAL.—The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention.
The following is a quotation of the first paragraph of pre-AIA 35 U.S.C. 112:
The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor of carrying out his invention.
Claim 34 is rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, as failing to comply with the written description requirement. The claim(s) contains subject matter which was not described in the specification in such a way as to reasonably convey to one skilled in the relevant art that the inventor or a joint inventor, or for applications subject to pre-AIA 35 U.S.C. 112, the inventor(s), at the time the application was filed, had possession of the claimed invention.
Regarding claim 34, “wherein the isolation layer extends continuously between the first gate structure and the second gate structure” is new matter. For example, the isolation layer 300 does not extend “continuously” between a first gate and a second gate because a selected gate is between both of said gates. See Figs. 10 and 18.
Moreover, Applicant’s arguments fail to indicate where support is found for new claim 34. No prior art rejection is applied to claim 34.
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Claim Rejections - 35 USC § 102 and 35 USC § 103
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim 1 is rejected under 35 U.S.C. 102(a)(1) as being anticipated by Tseng et al. (of record, US 20170154823 A1).
Regarding claim 1, Tseng discloses a method comprising:
depositing (placing) an isolation material (44) over a semiconductor material (12) to form an isolation layer (44, “gate insulating layer 44”) over the semiconductor material (12, Fig. 7);
forming a source/drain region (54, “source/drain region 54”) over (indirectly) the isolation layer (Fig. 7), wherein a line perpendicular to an (sidewall) upper (not uppermost) surface of the isolation layer (44) passes through the source/drain region (54) and through the isolation layer (Fig. 7. Also, see Fig. 9);
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removing a selected gate structure (48, “gate structures 46, 48”), wherein removing the selected gate structure forms a trench (via removal of 44/50 which are replaced with 66/68/70/72) in the semiconductor material (Figs. 8-9); and
forming an isolation structure (68, “high-k dielectric layer 68”) in (partially) the trench (Figs. 8-9).
Claims 4, 6-7 and 32 are rejected under 35 U.S.C. 103 as being unpatentable over Tseng et al. (of record, US 20170154823 A1).
Regarding claim 4, Tseng fails to disclose the method of claim 1, wherein the isolation layer (“gate insulating layer 44”) comprises silicon oxide, silicon nitride, or a combination thereof.
The examiner takes the position that SiO2 is a well-known and commonly employed silicon oxide used in the semiconductor field as a gate insulating material and it would have been obvious to one of ordinary skill in the art, before the effective filing date, to include a silicon oxide as claimed in layer 44 of Tseng because the use of conventional materials to perform their known function is prima-facie obvious (MPEP 2144.07), it’s use was within the ordinary capabilities of one skill in the art and it's use would have yielded predictable results.
Regarding claim 6, Tseng discloses the method of claim 1, wherein depositing the isolation material (44) comprising conformally depositing the isolation material (Fig. 7), but fails to disclose wherein the isolation layer (44) has a vertical thickness of less than 6 nanometers (nm).
It would have been obvious to one of ordinary skill in the art, before the effective filing date, to ensure that layer 44 comprises a vertical thickness as claimed in the method of Tseng so as to minimize final device geometry while ensuring layer 44 is thicker than adjacent layers as required by [0024] of Tseng.
Regarding claim 7, Tseng fails to disclose the method of claim 1, wherein the isolation layer has a band gap of at least 4 e V, and wherein the isolation layer has a dielectric constant of less than 7.5.
The examiner takes the position that SiO2 is a well-known and commonly employed silicon oxide used in the semiconductor field as a gate insulating material wherein SiO2 has a higher band gap than 4eV and has a dielectric constant of less than 7.5 per, e.g., https://www.iue.tuwien.ac.at/phd/hollauer/node11.html.
It would have been obvious to one of ordinary skill in the art, before the effective filing date, to include SiO2 in layer 44 of Tseng because the use of conventional materials to perform their known function is prima-facie obvious (MPEP 2144.07), its use was within the ordinary capabilities of one skill in the art and its use would have yielded predictable results.
Regarding claim 32, Tseng fails to disclose the method of claim 1, wherein depositing the isolation material (44) comprises performing atomic layer deposition.
ALD is a well-known and commonly used deposition technique and it would have been obvious to one of ordinary skill in the art to include ALD as claimed before the effective filing date so as to control deposition thickness of materials.
Claim 33 is rejected under 35 U.S.C. 103 as being unpatentable over Tseng et al. (US 20170154823 A1) in view of Kim et al. (US 20160149030 A1).
Regarding claim 33, Tseng fails to disclose the method of claim 1, wherein the isolation material (“gate insulating layer 44”) comprises silicon carbide nitride, silicon carbide oxide, or silicon carbide oxynitride.
Kim discloses wherein the isolation material (“gate insulating layer 145”) comprises silicon carbide nitride, silicon carbide oxide, or silicon carbide oxynitride ([0094]).
It would have been obvious to one of ordinary skill in the art, before the effective filing date, to include the materials of Kim in Tseng because the use of conventional materials to perform their known function is prima-facie obvious (MPEP 2144.07), its use was within the ordinary capabilities of one skill in the art and its use would have yielded predictable results
Allowable Subject Matter
Claims 2-3, 5 and 8-9 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Claims 27-31 and 35-37 are allowed.
The following is a statement of reasons for the indication of allowable subject matter:
Regarding claim 2, the prior art of record fails to disclose or suggest after removing the selected gate structure, a non-selected gate structure remains over the semiconductor material; the non-selected gate structure comprises a stack of vertically spaced-apart nanosheets including a bottom nanosheet having a top surf ace at a first height over the semiconductor material; the isolation layer has a top surf ace at a second height over the semiconductor material; and the first height is greater than the second height.
Regarding claim 3, the prior art of record fails to disclose or suggest after removing the selected gate structure, a non-selected gate structure remains over the semiconductor material; the non-selected gate structure comprises a stack of vertically spaced-apart nanosheets including a top nanosheet having a top surface; the trench has a nadir; the top surface is distanced from the nadir by a vertical distance H; the trench has a width W; and a ratio of H: W is at least 2: 1 and at most 5: 1.
Regarding claim 5, the prior art of record fails to disclose or suggest wherein the isolation layer comprises a plurality of sublayers, wherein adjacent sublayers have different dielectric constants.
Regarding claim 8, the prior art of record fails to disclose or suggest before removing the selected gate structure, recessing the semiconductor material comprising alternating nanosheets and sacrificial layers laterally adjacent to the selected gate structure to form a gap; laterally etching the sacrificial layers adjacent to the gap to form pockets; and forming inner spacers in the pockets; claim 9 depends from claim 8.
Regarding claim 27, the prior art of record fails to disclose or suggest a trench having a a nadir located below the isolation layer portions as recited within the context of the claim; claims 28-31 depend from claim 27.
Regarding claim 35, the prior art of record fails to disclose or suggest depositing an isolation material in the gap to form an isolation layer; after forming the isolation layer, forming a source/drain region in the gap; removing the selected gate structure to form a trench; and filling the trench with a dielectric material as recited within the context of the claim; claims 36-37 depend from claim 35
Response to Arguments
Applicant’s arguments, filed 4.29.2026, with respect to the drawing objections and 35 USC 112 rejections of the previous Office Action are persuasive. See pg. 7-8.
Applicant's arguments at pg. 9-10 regarding Tseng failing to disclose or suggest amended claim 1 are not persuasive; the examiner now relies on layer 44 as the claimed isolation layer. See rejection above.
Applicant’s arguments at pg. 11-12 regarding Lin failing to disclose or suggest amended claims 1 and 27 are persuasive; the examiner withdraws the rejections over Lin.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to ANDRES MUNOZ whose telephone number is (571)270-3346. The examiner can normally be reached 8AM-5PM Central Time.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Eva Montalvo can be reached at (571)270-3829. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/Andres Munoz/Primary Examiner, Art Unit 2818
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