Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries set forth in Graham v. John Deere Co., 383 U.S. 1, 148 USPQ 459 (1966), that are applied for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claims 1-3, 5, 7-8, 11-12, 15, 18 and 35 are rejected under 35 U.S.C. as obvious over Chen et al. (Patent No.: US 10,964,788 B1) in view of Farrar (Patent No.: US 6,509,590 B1).
Regarding Claim 1, Chen et al. discloses a semiconductor device, comprising: an active region comprising one or more active semiconductor cells (Col. 7, L 32 – Col. 8, L 67; Figs. 1-5 – active region comprising transistor with gate electrode 118, source electrode 128 and drain electrode 130);
PNG
media_image1.png
464
702
media_image1.png
Greyscale
a metallization structure on the active region (Col. 7, L 32 – Col. 8, L 67; Figs. 1-5 - metallization structure comprising conductor 128); and an encapsulating material encapsulating the metallization structure (Col. 9, L 35 – Col. 11, L 39; Figs. 1-5 – encapsulating material comprising dielectric layers 132 and/or 138, wherein the metallization structure comprises an aluminum-beryllium alloy (Col. 9, L 8 – L 34; Figs. 1-5 – this prior art teaches conductor128 comprises “metal, such as aluminum (Al), copper (Cu), iron (Fe), nickel-iron (NiFe) alloy, beryllium-copper (BeCu) alloy, the like, or a combination thereof” which potentially includes aluminum-beryllium alloy, at least in some embodiments). In the alternative, assuming arguendo that Chen et al. is not emphatic enough regarding a semiconductor device, comprising: wherein the metallization structure comprises an aluminum-beryllium alloy, Farrar discloses a semiconductor device, comprising: an active region comprising one or more active semiconductor cells (Col. 3, L 27 – Col. 4, L 67; Figs. 1-5 – active region comprising transistors 14a and 14b);
PNG
media_image2.png
202
612
media_image2.png
Greyscale
a metallization structure on the active region (Col. 3, L 27 – Col. 4, L 67; Figs. 1-5 – metallization structure comprising layer 22’); and wherein the metallization structure comprises an aluminum-beryllium alloy (Col. 3, L 27 – Col. 4, L 67; Figs. 1-5 – metallization structure 22’ comprising aluminum-beryllium alloy).
In summary, use of copper-beryllium alloy as well as aluminum beryllium alloy as a material of metallization structure have been well documented in the prior arts. The addition of a certain range of beryllium improves elastic modulus, rigidity, hardness etc. and can be particularly useful in certain applications.
Chen et al. discloses the claimed invention except for the semiconductor device, comprising: wherein the metallization structure comprises an aluminum-beryllium alloy. It would have been obvious to one having ordinary skill in the art at the time the invention was filed to adapt a semiconductor device, comprising: wherein the metallization structure comprises an aluminum-beryllium alloy, since it has been held that the simple substitution of one known element for another to obtain predictable results is obvious.
Regarding Claim 2, modified Chen, as applied to claim 1, discloses
the semiconductor device, wherein the metallization structure is one or more of a contact, interconnect, or bonding pad for the semiconductor device (Chen et al. - Col. 7, L 32 – Col. 8, L 67; Figs. 1-5 – contact and/or interconnect; Farrar - Col. 3, L 27 – Col. 4, L 67; Figs. 1-5 – contact and/or interconnect and/or bonding pad).
Regarding Claim 3, modified Chen, as applied to claim 1, discloses
the semiconductor device, wherein the metallization structure further comprises copper (Farrar - Col. 3, L 27 – Col. 4, L 67; Figs. 1-5 - metallization structure 22 comprises copper, beryllium and aluminum).
Regarding Claim 5, modified Chen, as applied to claim 1, discloses
the semiconductor device, wherein the metallization structure comprises a range of about 0.1% beryllium to about 3% beryllium (Farrar - Col. 3, L 27 – Col. 4, L 67; claim 7; Figs. 1-5 – claim 7 of this prior art teaches that the metallization structure 22’ comprises, at least, in one embodiment, 1% of beryllium).
Regarding Claim 7, modified Chen, as applied to claim 1, discloses
the semiconductor device, wherein the metallization structure comprises a ternary beryllium alloy (Farrar - Col. 3, L 27 – Col. 4, L 67; also see Table 1 – alloy comprising beryllium, aluminum, copper).
Regarding Claim 8, modified Chen, as applied to claim 7, discloses
the semiconductor device, wherein the ternary beryllium alloy comprises aluminum, beryllium, and a ternary element, wherein the ternary element comprises silver, copper, magnesium, silicon, titanium, vanadium, or zinc (Farrar - Col. 4, L 8-40 – copper).
Regarding Claim 11, modified Chen et al., as applied to claim 1, discloses
the semiconductor device, wherein the semiconductor device further comprises a passivation layer (Chen et al. - Col. 11, L 21 – 39; Fig. 5 – passivation layer 138 (protective layer) is formed on metallization structure comprising source electrode 128 to protect the metallization structure from moisture, for example).
Regarding Claim 12, modified Chen et al., as applied to claim 11, discloses
the semiconductor device, wherein the passivation layer comprises silicon nitride (Chen et al - Col. 11, L 21 – 39).
Regarding Claim 15, modified Chen et al., as applied to claim 1, discloses
the semiconductor device, wherein the one or more active semiconductor cells comprise a wide band gap semiconductor (Chen et al. - Col. 4, L 5 – 38 – silicon carbide or aluminum nitride or gallium nitride).
Regarding Claim 18, modified Chen et al., as applied to claim 1, discloses
the semiconductor device, wherein the one or more active semiconductor cells comprise one or more Group III-nitride based high electron mobility transistor devices (Chen et al. - Col. 4, L 5- Col. 5, L 8).
Regarding Claim 35, Chen et al. discloses a method, comprising: depositing a metallization structure on an active region comprising one or more wide
PNG
media_image1.png
464
702
media_image1.png
Greyscale
band gap semiconductor cells (Col. 4, L 5-38; Col. 7, L 32 – Col. 8, L 67; Figs. 1-5 – active region comprising transistor with gate electrode 118; metallization structure comprising conductor 128; III-N based semiconductor cells); and encapsulating the metallization structure with an encapsulating material (Col. 9, L 35 – Col. 11, L 39; Figs. 1-5 – encapsulating material comprising dielectric layers 132 and/or 138, wherein the metallization structure comprises an aluminum-beryllium alloy (Col. 9, L 8 – L 34; Figs. 1-5 – this prior art teaches conductor128 comprises “metal, such as aluminum (Al), copper (Cu), iron (Fe), nickel-iron (NiFe) alloy, beryllium-copper (BeCu) alloy, the like, or a combination thereof” which potentially includes aluminum-beryllium alloy, at least in some embodiments). In the alternative, assuming arguendo that Chen et al. is not emphatic enough regarding a method, comprising: wherein the metallization structure comprises an aluminum-beryllium alloy, Farrar discloses a method, comprising: depositing a metallization structure on an active region comprising one or more
PNG
media_image2.png
202
612
media_image2.png
Greyscale
semiconductor cells (Col. 3, L 27 – Col. 4, L 67; Figs. 1-5 – active region comprising transistors 14a and 14b; metallization structure 22); and wherein the metallization structure comprises an aluminum-beryllium alloy (Col. 3, L 27 – Col. 4, L 67; Figs. 1-5 – metallization structure 22’ comprising aluminum-beryllium alloy).
In summary, use of copper-beryllium alloy as well as aluminum beryllium alloy as a material of metallization structure have been well documented in the prior arts. The addition of a certain range of beryllium improves elastic modulus, rigidity, hardness etc. and can be particularly useful in certain applications.
Chen et al. discloses the claimed invention except for the method, comprising: wherein the metallization structure comprises an aluminum-beryllium alloy. It would have been obvious to one having ordinary skill in the art at the time the invention was filed to adapt a method, comprising: wherein the metallization structure comprises an aluminum-beryllium alloy, since it has been held that the simple substitution of one known element for another to obtain predictable results is obvious.
Claims 6, 10 and 16-17 are rejected under 35 U.S.C. as obvious over Chen et al. (Patent No.: US 10,964,788 B1) and Farrar (Patent No.: US 6,509,590 B1), as applied to claim 1.
Regarding Claim 6, modified Chen, as applied to claim 1, does not disclose
the semiconductor device, wherein the metallization structure comprises a range of about 0.2% beryllium to about 0.5% beryllium.
However, modified Chen teaches
the semiconductor device, wherein the metallization structure comprises a range of about 1% to 40% (Farrar - Col. 3, L 27 – Col. 4, L 67; claims 1-29). This prior art teaches that adding beryllium to aluminum enhances stiffness while maintaining a low mass density. However, it is also understood that adding too much beryllium would increase electrical resistance and it is also toxic Thus, the optimal amount of beryllium to add depends on the specific application in which it will be used. Modified Chen discloses the claimed invention except for the semiconductor device, wherein the metallization structure comprises a range of about 0.2% beryllium to about 0.5% beryllium. It would have been obvious to one having ordinary skill in the art at the time the invention was filed to adapt the semiconductor device, wherein the metallization structure comprises a range of about 0.2% beryllium to about 0.5% beryllium, since it has been held that where the general conditions of a claim are disclosed in the prior art, discovering the optimum or workable ranges involves only routine skill in the art. In re Aller, 105 USPQ 233 (CCPA 1955).
Regarding Claim 10, modified Chen, as applied to claim 1, discloses
the semiconductor device, wherein the metallization structure comprises a source contact, a drain contact, or a gate contact for a HEMT (Chen - Col. 7, L 32 – Col. 8, L 67; Figs. 1-5 – metallization structure comprises a source electrode 128 which can be considered a part of a source contact) Modified Chen does not explicitly disclose
the semiconductor device, wherein the metallization structure comprises a source contact, a drain contact, or a gate contact for a MOSFET.
In short, whereas modified Chen teaches materials used for source contacts, drain contacts etc. for a HEMT, the instant application teaches potential materials for source contacts, drain contacts etc. for a MOSFET. It would have been obvious to a person of ordinary skills in the art at the time the invention was effectively filed that the contact materials used by modified Chen for transistors could also be potentially used for the source and drain contacts for a MOSFET device.
Modified Chen discloses the claimed invention except for the semiconductor device, wherein the metallization structure comprises a source contact, a drain contact, or a gate contact for a MOSFET. It would have been obvious to one having ordinary skill in the art at the time the invention was filed to adapt the semiconductor device, wherein the metallization structure comprises a source contact, a drain contact, or a gate contact for a MOSFET, since it has been held to be within the general skill of a worker in the art to employ/use a known technique to improve similar devices (methods, products) in the same way is obvious. KSR International Co. v Teleflex Inc., 550 U.S.__, __, 82 USPQ2d 1385, 1395-97 (2007)
Regarding Claim 16, modified Chen, as applied to claim 1, does not explicitly disclose the semiconductor device, wherein the one or more active semiconductor cells comprise one or more silicon carbide-based MOSFETs (this prior art teaches a metallization structure comprising aluminum-beryllium alloy to form a source electrode (Chen) or to connect two transistors of an integrated circuit (Farrar); it does not expressly state that the active semiconductor cells comprise one or more silicon carbide-based MOSFETs; it however, mentions that the metallization structure might be formed on silicon-on-insulator, silicon-on-sapphire, and other advanced structure (Farrar - Col. 3, L 10 – Col. 4, L 67), or the one or more active semiconductor cells comprise one or more III-nitride-based HEMTs (Chen - Col. 7, L 32 – Col. 8, L 67; Figs. 1-5).
In short, whereas modified Chen teaches the one or more active semiconductor cells comprise one or more of III-nitride based, silicon-on-insulator-based, silicon-on-sapphire-based and other advanced structure-based transistors, the instant application teaches the one or more active semiconductor cells comprise one or more silicon carbide-based MOSFETs. It would have been obvious to a person of ordinary skills in the art at the time the invention was effectively filed that the contact materials used by modified Chen for transistors could also be potentially used for contacts/interconnects in silicon carbide-based MOSFETs.
Modified Chen discloses the claimed invention except for the semiconductor device, wherein the one or more active semiconductor cells comprise one or more silicon carbide-based MOSFETs. It would have been obvious to one having ordinary skill in the art at the time the invention was filed to adapt wherein the one or more active semiconductor cells comprise one or more silicon carbide-based MOSFETs, since it has been held to be within the general skill of a worker in the art to apply a known technique to a known device (method, or product) ready for improvement to yield predictable results is obvious. KSR International Co. v Teleflex Inc., 550 U.S.__, __, 82 USPQ2d 1385, 1395-97 (2007)
Regarding Claim 17, modified Chen, as applied to claim 1, does not explicitly disclose the semiconductor device, wherein the one or more active semiconductor cells comprise one or more silicon carbide-based Schottky diodes (this prior art teaches a metallization structure comprising aluminum-beryllium alloy to connect two transistors of an integrated circuit; it does not expressly state that the active semiconductor cells comprise one or more silicon carbide-based Schottky diodes; it however, mentions that the metallization structure might be formed on silicon-on-insulator, silicon-on-sapphire, and other advanced structure (Farrar - Col. 3, L 10 – Col. 4, L 67), or the one or more active semiconductor cells comprise one or more III-nitride-based HEMTs (Chen - Col. 7, L 32 – Col. 8, L 67; Figs. 1-5).
In short, whereas modified Chen teaches the one or more active semiconductor cells comprise one or more of III-nitride based, silicon-on-insulator-based, silicon-on-sapphire-based and other advanced structure-based transistors, the instant application teaches the one or more active semiconductor cells comprise one or more silicon carbide-based Schottky diodes. It would have been obvious to a person of ordinary skills in the art at the time the invention was effectively filed that the contact materials used by Farrar for transistors could also be potentially used for contacts/interconnects in silicon carbide-based Schottky diodes.
Modified Chen discloses the claimed invention except for the semiconductor device, wherein the one or more active semiconductor cells comprise one or more silicon carbide-based Schottky diodes. It would have been obvious to one having ordinary skill in the art at the time the invention was filed to adapt wherein the one or more active semiconductor cells comprise one or more silicon carbide-based Schottky diodes, since it has been held to be within the general skill of a worker in the art to apply a known technique to a known device (method, or product) ready for improvement to yield predictable results is obvious. KSR International Co. v Teleflex Inc., 550 U.S.__, __, 82 USPQ2d 1385, 1395-97 (2007)
Claim 9 is rejected under 35 U.S.C. 103 as obvious over Chen et al. (Patent No.: US 10,964,788 B1) and Farrar (Patent No.: US 6,509,590 B1), as applied to claim 7, further in view of Zhou et al. (“Precipitation behavior and properties of aged Cu-0.23Be-0.84Co alloy” - 2015)
Regarding Claim 9, modified Chen et al., as applied to claim 7, discloses
the semiconductor device, wherein the ternary beryllium alloy comprises aluminum, beryllium, and a ternary element (Farrar - Col. 3, L 27 – Col. 4, L 67; also see Table 1 – beryllium, aluminum, copper)
Modified Chen et al. does not explicitly disclose
the semiconductor device, wherein the ternary element comprises cobalt. However, Zhou et al. teaches the semiconductor device, wherein the ternary element comprises cobalt (Page 920; Introduction Section – this prior art teaches Cu-Be alloys with a small amount of cobalt are widely used, wherein the alloy has good electrical and thermal conductivity, high strength and hardness and low elastic modulus). It would have been obvious to one having ordinary skill in the art at the time the invention was filed to use the teachings of Zhou et al. to adapt the semiconductor device, wherein the ternary element of modified Chen et al. comprises cobalt in order to form an electrical contact with proper hardness and electrical and thermal properties.
Claims 13-14 are rejected under 35 U.S.C. 103 as obvious over Chen et al. (Patent No.: US 10,964,788 B1) and Farrar (Patent No.: US 6,509,590 B1), as applied to claim 11, further in view of Weyers (Pub. No.: US 2020/0243505 A1)
Regarding Claim 13, modified Chen et al., as applied to claim 11, does not explicitly disclose
the semiconductor device, wherein the passivation layer comprises a polymer. However, Weyers teaches the semiconductor device, wherein the passivation layer comprises a polymer (Par. 0031; Fig. 6 – this prior art teaches that a passivation layer such as a polyimide may be arranged over the gate and source pads). In a nutshell, modified Chen et al. teaches the passivation layer comprises silicon nitride. Weyers, on the other hand, teaches that the passivation layer comprises a polymer. In other words, use of silicon nitride as well as polymers in passivation layers have been well-documented before this invention was effectively filed. Modified Chen et al. discloses the claimed invention except for the semiconductor device, wherein the passivation layer comprises a polymer. It would have been obvious to one having ordinary skill in the art at the time the invention was filed to adapt the semiconductor device, wherein the passivation layer comprises a polymer, since it has been held that the simple substitution of one known element for another to obtain predictable results is obvious.
Regarding Claim 14, modified Chen et al., as applied to claim 13, discloses
the semiconductor device, wherein the polymer comprises polyimide (Weyers - Par. 0031).
Claim 19 is rejected under 35 U.S.C. 103 as obvious over Nakano (Pub. No.: US 2012/0049202 A1) in view of Zhou et al. (“Precipitation behavior and properties of aged Cu-0.23Be-0.84Co alloy” - 2015) and Farrar (Patent No.: US 6,509,590 B1).
Regarding Claim 19, Nakano discloses a semiconductor device, comprising: an active region comprising one or more silicon carbide-based MOSFETs (abstract; Par. 0152-0157; Fig, 3 - active region comprising silicon carbide-based MOSFETs);
PNG
media_image3.png
602
416
media_image3.png
Greyscale
one or more metallization structures on the active region, the one or more metallization structures comprising a bonding pad associated with a source contact and a backside metallization structure associated with a drain contact for the semiconductor device (Par. 0152-0157; Fig. 3 – backside metallization structure 37; frontside metallization structure 34 associated with source contact; both the metallization structures are made of aluminum (Al), gold (Au), silver (Ag), copper (Cu), an alloy thereof or a metallic material containing the same); and wherein the one or more metallization structure comprises copper (Cu) or aluminum (Al) or an alloy thereof (Par. 0152-0157; Fig. 3). Nakano does not explicitly disclose
wherein the one or more metallization structures comprise beryllium.
However, Zhou et al., at least, implicitly teaches
wherein the one or more metallization structures comprise beryllium (Page 920; Introduction Section – this prior art teaches Cu-Be alloys are widely used in the components of electronics industry wherein the alloy comprises 0.2 – 2.0 wt% Be; this alloy has good electrical and thermal conductivity, high strength and hardness and low elastic modulus). Furthermore, Farrar teaches
wherein the one or more metallization structures comprise beryllium (Col. 3, L 27 – Col. 4, L 67 - this prior art teaches that adding beryllium to aluminum enhances stiffness while maintaining a low mass density). It would have been obvious to one having ordinary skill in the art at the time the invention was filed to use the teachings of Zhou et al. and Farrar to adapt the semiconductor device, wherein the one or more metallization structures of Nakano comprise beryllium in order to tailor the properties of the metallization structure to meet the demand of the specific application where it will be used.
Claims 50-51 is rejected under 35 U.S.C. 103 as obvious over Chen et al. (Patent No.: US 10,964,788 B1) and Farrar (Patent No.: US 6,509,590 B1), as applied to claim 1 and claim 35, further in view of Hwang et al. (Pub. No.: US 2022/0328388 A1)
Regarding Claim 50, modified Chen, as applied to claim 1, discloses
the semiconductor device, wherein the encapsulating material comprises any suitable dielectric material (Chen - Col. 9, L 35 – Col. 9, L 50 together with Col. 6, L 56-67; Figs. 1-5 – encapsulating material comprises “any suitable dielectric material such as silicon oxide, silicon nitride, silicon oxynitride, low-κ dielectric material, aluminum oxide, aluminum nitride, the like, or a combination thereof, but the present disclosure is not limited thereto” ) Modified Chen does not explicitly disclose
the semiconductor device, wherein the encapsulating material comprises an epoxy mold compound.
However, Hwang et al., at least implicitly teaches
the semiconductor device, wherein the encapsulating material comprises an epoxy mold compound (Par. 0016-0025; Fig. 1 – encapsulating material 140 wherein the encapsulating material comprises an epoxy mold compound; metallization structure 113 comprises a copper-beryllium alloy). In short, encapsulating material comprising any suitable dielectric material such as silicon oxide, silicon nitride etc. as well as epoxy mold compound have been well documented in the prior arts.
Modified Chen et al. discloses the claimed invention except for the semiconductor device, wherein the encapsulating material comprises an epoxy mold compound. It would have been obvious to one having ordinary skill in the art at the time the invention was filed to adapt the semiconductor device, wherein the encapsulating material comprises an epoxy mold compound, since it has been held that the simple substitution of one known element for another to obtain predictable results is obvious.
Regarding Claim 51, modified Chen, as applied to claim 35, discloses
the method, wherein the encapsulating material comprises any suitable dielectric material (Chen - Col. 9, L 35 – Col. 9, L 50 together with Col. 6, L 56-67; Figs. 1-5 – encapsulating material comprises “any suitable dielectric material such as silicon oxide, silicon nitride, silicon oxynitride, low-κ dielectric material, aluminum oxide, aluminum nitride, the like, or a combination thereof, but the present disclosure is not limited thereto” ) Modified Chen does not explicitly disclose
the method, wherein the encapsulating material comprises an epoxy mold compound.
However, Hwang et al., at least implicitly teaches
the method, wherein the encapsulating material comprises an epoxy mold compound (Par. 0016-0025; Fig. 1 – encapsulating material 140 wherein the encapsulating material comprises an epoxy mold compound; metallization structure 113 comprises a copper-beryllium alloy). In short, encapsulating material comprising any suitable dielectric material such as silicon oxide, silicon nitride etc. as well as epoxy mold compound have been well documented in the prior arts.
Modified Chen et al. discloses the claimed invention except for the method, wherein the encapsulating material comprises an epoxy mold compound. It would have been obvious to one having ordinary skill in the art at the time the invention was filed to adapt the method wherein the encapsulating material comprises an epoxy mold compound, since it has been held that the simple substitution of one known element for another to obtain predictable results is obvious.
Response to Arguments
Applicants’ arguments filed on 09/02/2026 have been fully considered but they are moot because of the new grounds of rejection necessitated by amendments made to claims 1 and 35. The Applicants arguments regarding claim 19 has been addressed here. Applicants argue regarding claim 19 “A person having ordinary skill in the art designing thick power bonding pads for a high-power trench-gate SiC MOSFET (Nakano) would not look to a 16 mm bulk extruded metal bar (Zhou) or to a nanoscale suspended air-bridge (Farrar) to "tailor the properties" of the power bonding pads. Accordingly, Applicant respectfully submits that the rejection of independent claim 19 as set forth in the Office Action is improper” The Examiner’s rebuttal: Nakano discloses the metallization structure comprises copper which is in contrast to the metallization structure of the instant claim which comprises beryllium. Now the question is whether there is any motivation to replace the copper of Nakano with a copper beryllium alloy or an aluminum-beryllium alloy. To understand that the Examiner takes help of Zhou et al. and Farrar. Zhou et al. teaches Cu-Be alloys are widely used in the components of electronics industry wherein the alloy comprises 0.2 – 2.0 wt% Be - this alloy has good electrical and thermal conductivity, high strength and hardness and low elastic modulus. In other words, adding a minute amount of Be into Cu substantially improves the strength and hardness of the resultant alloy. Farrar also teaches improvement in mechanical properties of aluminum when alloyed with beryllium. These are the teachings extracted from the cited prior arts of Zhou et al. and Farrar and provides motivation for replacing copper of Nakano with a beryllium alloy especially for applications wherein ruggedness of the metallization structure is desired.
Conclusion
THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any extension fee pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to SYED I GHEYAS whose telephone number is (571)272-0592. The examiner can normally be reached on Monday-Friday from 8:30 AM - 5:30 PM EST.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Britt Hanley, can be reached at telephone number (571)270-3042. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of an application may be obtained from the Patent Application Information Retrieval (PAIR) system. Status information for published applications may be obtained from either Private PAIR or Public PAIR. Status information for unpublished applications is available through Private PAIR only. For more information about the PAIR system, see http://portal.uspto.gov/external/portal. Should you have questions about access to the Private PAIR system, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free).
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
09/19/2026
/SYED I GHEYAS/Primary Examiner, Art Unit 2893