Prosecution Insights
Last updated: April 19, 2026
Application No. 18/305,852

HIGH-DENSITY MICRO-LED ARRAYS WITH REFLECTIVE SIDEWALLS

Final Rejection §102§103§112
Filed
Apr 24, 2023
Examiner
MUSE, ISMAIL A
Art Unit
2812
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Applied Materials, Inc.
OA Round
2 (Final)
86%
Grant Probability
Favorable
3-4
OA Rounds
2y 6m
To Grant
94%
With Interview

Examiner Intelligence

Grants 86% — above average
86%
Career Allow Rate
530 granted / 613 resolved
+18.5% vs TC avg
Moderate +8% lift
Without
With
+7.9%
Interview Lift
resolved cases with interview
Typical timeline
2y 6m
Avg Prosecution
45 currently pending
Career history
658
Total Applications
across all art units

Statute-Specific Performance

§101
0.1%
-39.9% vs TC avg
§103
52.3%
+12.3% vs TC avg
§102
29.5%
-10.5% vs TC avg
§112
16.7%
-23.3% vs TC avg
Black line = Tech Center average estimate • Based on career data from 613 resolved cases

Office Action

§102 §103 §112
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Response to Arguments Applicant’s arguments with respect to claim(s) presented have been considered but are moot because of the new ground of rejection. Claim Rejections - 35 USC § 112 The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. Claims 15-16 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. The claims are rejected specifically in view of the limitation “wherein the first electrode is coupled to the n-doped GaN” in claim 15. A person having ordinary skills in the art will find the limitation indefinite because in claim 12 upon which claim 15 and 16 depends, the first level of the device comprises p-doped GaN and the first electrode is coupled to the first level. Thus, it is unclear how the device will function if the first electrode is coupled to both the p-doped and n-doped layers of the LED. The claims are unclear, however for examination purposes as indicated below, it was discussed the doping type of the semiconductor layers in an LED can be obviously interchanged, thus the coupling of electrodes to semiconductor layers are not inventive. Claim Rejections - 35 USC § 102 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claims 1, 3-6 and 10-11 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Kim et al. [US PGPUB 20170108173] (hereinafter Kim). Regarding claim 1, Kim teaches a micro-Light-Emitting-Diode (micro-LED) structure comprising: a first electrode (151, Para 119) configured to be coupled to a corresponding third electrode (321, Para 119) on a backplane (2000, Para 250, Fig. 42/43) comprising an array of micro-LED structures (Fig. 43, Para 148); a second electrode (153, Para 119) configured to be coupled to a corresponding fourth electrode (323, Para 119) on the backplane (Fig. 42/43); an LED epilayer (120, Para 126) comprising a first side coupled to the first electrode (Fig. 42) and the second electrode (Fig. 42) and sidewalls extending in a direction away from the backplane (Fig. 42/43); and a reflective coating (140, Para 107 or 143, Para 108 -see Fig. 3) applied to the sidewalls of the LED epilayer (Fig. 42), wherein the first electrode and the second electrode extend through the reflective coating (Fig. 42). Regarding claim 3, Kim teaches a micro-LED structure wherein the reflective coating further covers a portion of the first side of the LED epilayer (Fig. 42). Regarding claim 4, Kim teaches a micro-LED structure wherein the reflective coating leaves an opening on the first side of the LED epilayer to which the first electrode is coupled (Fig. 42). Regarding claim 5, Kim teaches a micro-LED structure further comprising a first dielectric layer (141, Para 108) between the LED epilayer and the reflective coating (Fig. 3). Regarding claim 6, Kim teaches a micro-LED structure further comprising a second dielectric layer (SiN.sub.X, Para 107) over the reflective coating (Para 107). Regarding claim 10, Kim teaches a micro-LED structure wherein the reflective coating comprises a plurality of layers of a Distributed Bragg Reflector (DBR) (Para 135). Regarding claim 11, Kim teaches a micro-LED structure wherein the plurality of layers of the DBR comprises alternating layers of SiO2 and TiO2 (Para 135). Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 1-2 and 5-9 are rejected under 35 U.S.C. 103 as being unpatentable over Biwa et al. [US PGPUB 20180062047] in view of Kim (hereinafter Biwa). Regarding claim 1, referring to Fig. 8 of Biwa, Biwa teaches a Light-Emitting-Diode (micro-LED) structure comprising: a first electrode (53, Para 168) configured to be coupled to a corresponding third electrode (202, Para 168) on a backplane (200, Fig. 8); a second electrode (52, Para 168) configured to be coupled to a corresponding fourth electrode (203, Para 168) on the backplane (Fig. 8); an LED layer (41-43, Para 166) comprising a first side coupled to the first electrode (Fig. 8) and the second electrode (Fig. 8) and sidewalls extending in a direction away from the backplane (Fig. 8); and a coating (47, Para 166) applied to the sidewalls of the LED layer (Fig. 8), wherein the first electrode and the second electrode extend through the reflective coating (Fig. 8). In the embodiment of Fig. 8, Biwa does not specifically disclose that the Light-Emitting-Diode (micro-LED) structure is a micro-Light-Emitting-Diode (micro-LED) structure, the backplane comprising an array of micro-LED structures; that the LED layer is an epilayer; and that the coating is a reflective coating. Referring to Fig. 1 of Biwa, Biwa discloses a micro-Light-Emitting-Diode (micro-LED) structure (Para 114 – LED chip has a size of, for example, 5 μm or more and 100 mm or less), the backplane comprising an array of micro-LED structures (Fig. 1); and coating 17 is a reflective coating (Para 129, also see Fig. 16/17). At least In view of such teaching further disclosure by Biwa, it would have been obvious to a person having ordinary skills in the art before the effective filing date of the claimed invention to have the embodiment of Fig. 8 further comprise the teachings of Fig. 1, at least based on the rationale of using known technique to improve similar devices (methods, or products) in the same way using or to yield predictable results (MPEP 2143.I.C/D); where using micro-LEDs allows forming compact an array which has a reflective coating that improves luminance of the device. Referring to the invention of Kim, Kim teaches various methods of forming LED layers, wherein in an instance, the LED layers are formed as epilayers (Para 126). In view of such teaching by Kim, it would have been obvious to a person having ordinary skills in the art before the effective filing date of the claimed invention to have the invention of Biwa comprise the teachings of Kim at least based on the rationale of using known technique to improve similar devices (methods, or products) in the same way using (MPEP 2143.I.C) Regarding claim 2, the modified invention of Biwa teaches a micro-LED structure wherein the reflective coating substantially covers the sidewalls of the LED epilayer to prevent light leakage out of the sidewalls of the LED epilayer (Biwa, Para 173). Regarding claim 5, the modified invention of Biwa teaches a micro-LED structure further comprising a first dielectric layer (46, Para 166) between the LED layer epilayer and the reflective coating (Biwa, Fig. 3). Regarding claim 6, the modified invention of Biwa teaches micro-LED structure further comprising a second dielectric layer (48, Para 166) over the reflective coating (Biwa, Fig. 3). Regarding claim 7, the modified invention of Biwa teaches micro-LED structure wherein the first dielectric layer and the second dielectric layer enclose the reflective coating to electrically isolate the reflective coating from the first electrode (Biwa, Fig. 3 Regarding claim 8, the modified invention of Biwa teaches micro-LED structure wherein the reflective coating comprises a metal layer (Biwa, Para 131). Regarding claim 9, the modified invention of Biwa teaches micro-LED structure wherein the reflective coating comprises a material from the group consisting of: Al, Rh, Pt, Ag, Au, and Cr (Biwa, Para 131). Claims 12-13 and 15-21 are rejected under 35 U.S.C. 103 as being unpatentable over Iguchi [US PGPUB 20200343410] in view of Pynn et al. [US PGPUB 20220209044] (hereinafter Pynn). Regarding claim 12, Iguchi teaches a method of fabricating a micro-LED structure, the method comprising: forming an LED layer (14, Para 216) on a substrate (growth substrate 9, Para 216), wherein the LED layer comprises a first side (side facing away from the substrate 9, Fig. 15B), a second side opposite the first side (side contacting substrate 9, Fig. 15B) and adjacent to the substrate, and sidewalls (side facing one another in the separation trench region, Fig. 15B); performing a mesa etch (Fig. 15B-C) on the LED layer to form a first level (level of layer 13, Fig. 15C) comprising p-doped Nitride on the first side of the LED layer (Fig. 34B), and a second level (level of layer 11, Fig. 15B-C) comprising n-doped GaN on the first side of the LED layer (Fig. 15B-C); forming a reflective coating (20d, Para 213) on forming a first electrode (23P, Para 213) coupled to the first level of the first side of the LED layer (Fig. 15J). Iguchi does not specifically disclose that the LED layer is an LED epilayer; and that the p-doped Nitride is a p-doped Gallium Nitride (GaN). Referring to the invention of Pynn, Pynn teaches structure of a LED and the method of forming it, wherein semiconductor layers epitaxially grown (Para 108) on a substrate (Para 110) and wherein the doped Nitride layers of the LED comprise GaN (Para 110). In view of such teaching by Pynn, it would have been obvious to a person having ordinary skills in the art before the effective filing date of the claimed invention to have the invention of Iguchi comprise the teachings of Pynn at least based on the rationale of using known technique to improve similar devices (methods, or products) in the same way using (MPEP 2143.I.C). Regarding claim 13, Iguchi teaches a method further comprising selectively forming the reflective coating to leave an opening on the first side of the LED epilayer where the first electrode is coupled to the first side of the LED epilayer (Fig. 15G). Regarding claim 15, the modified invention of Iguchi as applied in claim 12 teaches the limitations of claim 12 upon which it depends. The modified invention does not specifically disclose a method wherein the first electrode is coupled to the n-doped GaN. However, as disclosed by Pynn (Para 110), the doping type of the semiconductor can be interchanged –i.e., the semiconductor layer closer to the growth substrate is either p or n doped and the semiconductor layer further from the growth substrate can be either p or n doped. Thus, in view of such teaching by Pynn, it would have been obvious to a person having ordinary skills in the art before the effective filing date of the claimed invention to have layer 11 of Iguchi be a p-side layer and layer 13 being a n-side layer at least based on the rationale of relying in teaching, suggestion, or motivation in the prior art that would have led one of ordinary skill to modify the prior art reference or to combine prior art reference teachings to arrive at the claimed invention (MPEP 2143.I.G) –where the location of the p or n doped layer will be dependent on device requirements, such as, heat dissipation, luminance, electrical performance, etc. Regarding claim 16, the modified invention of Iguchi as applied in claim 12 teaches the limitations of claim 15 upon which it depends. The modified invention does not specifically disclose a method further comprising forming a second electrode coupled to the p-doped GaN. However, as disclosed by Pynn (Para 110), the doping type of the semiconductor can be interchanged –i.e., the semiconductor layer closer to the growth substrate is either p or n doped and the semiconductor layer further from the growth substrate can be either p or n doped. Thus, in view of such teaching by Pynn, it would have been obvious to a person having ordinary skills in the art before the effective filing date of the claimed invention to have layer 11 of Iguchi be a p-side layer and layer 13 being a n-side layer at least based on the rationale of relying in teaching, suggestion, or motivation in the prior art that would have led one of ordinary skill to modify the prior art reference or to combine prior art reference teachings to arrive at the claimed invention (MPEP 2143.I.G) –where the location of the p or n doped layer will be dependent on device requirements, such as, heat dissipation, luminance, electrical performance, etc. Regarding claim 17, Iguchi teaches a method further comprising: forming a dielectric layer (17, Para 218) between the reflective coating and the LED epilayer (Fig. 15J); and etching the dielectric layer (Para 219) to expose the LED epilayer where the first electrode couples to the first side of the LED epilayer (Fig. 15I/J). Regarding claim 18, Iguchi teaches a micro-LED array comprising: a backplane substrate (50, Fig. 25); a plurality of micro-LED structures (100h, Para 244) mounted to the backplane substrate (Fig. 25), wherein the plurality of micro-LED structures comprise LED layers (14, Fig. 15A/J) with first reflective coatings (20h, Para 244) that cover sidewalls of the LED layers (Fig. 25); and a plurality of pixel isolation structures (35, Fig. 25) formed between the plurality of micro-LED structures (Fig. 25), wherein the plurality of pixel isolation structures extend above a height of the LED layers of the plurality of micro-LED structures (Fig. Fig. 25); and second reflective coatings (36, Fig. 25) on a portion of the plurality of pixel isolation structures that extends above the height of the LED layers of the plurality of micro-LED structures (Fig. 25), wherein the second reflective coatings are physically separated from the first reflective coatings (Fig. 25). Iguchi does not specifically disclose that the LED layer is an LED epilayer. Referring to the invention of Pynn, Pynn teaches structure of a LED and the method of forming it, wherein semiconductor layers epitaxially grown (Para 108) on a substrate (Para 110) and wherein the doped Nitride layers of the LED comprise GaN (Para 110). In view of such teaching by Pynn, it would have been obvious to a person having ordinary skills in the art before the effective filing date of the claimed invention to have the invention of Iguchi comprise the teachings of Pynn at least based on the rationale of using known technique to improve similar devices (methods, or products) in the same way using (MPEP 2143.I.C). Regarding claim 19, modified invention of Iguchi specifically in view of Iguchi teaches a micro-LED array wherein the plurality of micro-LED structures further comprises luminescence regions (31-33, Fig. 25) formed on the LED epilayers (Fig. 25), wherein the second reflective coatings are between the luminescence regions and the plurality of pixel isolation structures (Fig. 25). Regarding claim 20, modified invention of Iguchi specifically in view of Iguchi teaches a micro-LED array wherein the second reflective coatings on the portion of the plurality of pixel isolation structures that extends above the height of the LED epilayers does not extend below the height of the LED epilayers (Fig. 25). Regarding claim 21, modified invention of Iguchi specifically in view of Iguchi teaches a micro-LED array wherein the second reflective coatings begin at top-most surfaces of the plurality of microLED structures such that a portion of the topmost surfaces extends beneath the second reflective coatings and laterally into the plurality of pixel isolation structures (Fig. 25). Conclusion Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to ISMAIL A MUSE whose telephone number is (571)272-1470. The examiner can normally be reached Monday - Friday 8:00 AM-5:00 PM. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, William Partridge can be reached at (571)270-1402. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /ISMAIL A MUSE/ Primary Examiner, Art Unit 2812
Read full office action

Prosecution Timeline

Apr 24, 2023
Application Filed
Jul 26, 2025
Non-Final Rejection — §102, §103, §112
Dec 01, 2025
Response Filed
Mar 10, 2026
Final Rejection — §102, §103, §112 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

3-4
Expected OA Rounds
86%
Grant Probability
94%
With Interview (+7.9%)
2y 6m
Median Time to Grant
Moderate
PTA Risk
Based on 613 resolved cases by this examiner. Grant probability derived from career allow rate.

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