Prosecution Insights
Last updated: October 01, 2026
Application No. 18/307,002

SEMICONDUCTOR PACKAGE STRUCTURE AND METHOD FOR FORMING THE SAME

Final Rejection §103
Filed
Apr 25, 2023
Examiner
ANDERSON, WILLIAM H
Art Unit
2817
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Taiwan Semiconductor Manufacturing Company, Ltd.
OA Round
4 (Final)
85%
Grant Probability
Favorable
5-6
OA Rounds
0m
Est. Remaining
99%
With Interview

Examiner Intelligence

Grants 85% — above average
85%
Career Allowance Rate
188 granted / 221 resolved
+17.1% vs TC avg
Strong +18% interview lift
Without
With
+17.9%
Interview Lift
resolved cases with interview
Typical timeline
2y 7m
Avg Prosecution
46 currently pending
Career history
261
Total Applications
across all art units

Statute-Specific Performance

§101
0.3%
-39.7% vs TC avg
§103
52.9%
+12.9% vs TC avg
§102
28.5%
-11.5% vs TC avg
§112
15.6%
-24.4% vs TC avg
Black line = Tech Center average estimate • Based on career data from 221 resolved cases

Office Action

§103
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Rejection Note: Italicized claim limitations indicate limitations that are not explicitly disclosed in the primary reference, but disclosed in the secondary reference(s). Claims 11-15 are rejected under 35 U.S.C. 103 as being unpatentable over Jin (US 20210398908 A1) in view of Lee (US 20110260338 A1). Regarding independent claim 11, Jin discloses a semiconductor package structure (Fig. 1) comprising: a semiconductor die (120); a molding compound (140) surrounding the semiconductor die; a redistribution structure (110/170) over the semiconductor die and the molding compound (over in the DR3 direction), wherein the redistribution structure comprises at least a top dielectric layer (170); an integrated passive device (IPD) package (210) over and electrically connected to the redistribution structure (over and electrically connected in the DR3 direction); an underfill (200; [0086]: “underfill material”) between the IPD package and the redistribution structure; a first frame-like trench (T, selecting the embodiment of Fig. 11, and designating T1/T2/T3 as the first trench. Note: the ordinary meaning of “frame” is used here; an open case or structure made for admitting, enclosing, or supporting something) in the redistribution structure, wherein the first frame-like trench laterally surrounds the IPD package in a top view of the semiconductor package structure (at least partially surrounds); a second frame-like trench in the redistribution structure, wherein the second frame-like trench laterally surrounds the IPD package and the first frame-like trench in the top view; and a separation structure disposed between and separating the first frame-like trench and the second frame-like trench from each other, wherein the separation structure and the top dielectric layer of the redistribution structure comprise a same material. Illustrated below are marked and annotated figures of Figs. 1, 11, and 13 of Jin. PNG media_image1.png 537 848 media_image1.png Greyscale PNG media_image2.png 519 921 media_image2.png Greyscale PNG media_image3.png 566 610 media_image3.png Greyscale Jin fails to teach “a second frame-like trench in the redistribution structure, wherein the second frame-like trench laterally surrounds the IPD package and the first frame-like trench in the top view; and a separation structure disposed between and separating the first frame-like trench and the second frame-like trench from each other, wherein the separation structure and the top dielectric layer of the redistribution structure comprise a same material”. Lee discloses a second frame-like trench (Figs. 6a and 6b: 201) in the redistribution structure (120), wherein the second frame-like trench laterally surrounds the IPD package (206 is relied upon here as a generic component; [0055]: “component”) and the first frame-like trench (200) in the top view; and a separation structure (204 with a corresponding portion of 130) disposed between and separating the first frame-like trench and the second frame-like trench from each other (horizontally separating, See annotated Fig. 6a for direction designation), wherein the separation structure (the portion of 130, See annotated figure) and the top dielectric layer of the redistribution structure (the top dielectric layer is layer 130) comprise a same material (since the portion of 130 is a portion of the entire layer, these structures are “a same material”). Modifying the redistribution structure of Jin by including the second frame-like structure and separation structure in the same way as Lee would arrive at the claimed trench configuration. Lee provides a teaching to motivate one of ordinary skill in the art before the effective filing date to include the second trench and separation structure in that it would protect the structure from excess underfill during manufacture ([0057]: “controlling the outward flow of excess underfill material”). A person of ordinary skill in the art before the effective filing date would have had a reasonable expectation of success doing so because in each scenario the trenches perform the same function to control the flow of underfill (Jin: [0092]: “the flow of the first underfill…may be improved or enhanced”; Lee: [0057]: “controlling the outward flow of excess underfill material”). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date to have the claimed trench and separation structure configuration because it would protect the structure from excess underfill during manufacture. Illustrated below are marked and annotated figures of Figs. 6a and 6b of Lee. PNG media_image4.png 499 708 media_image4.png Greyscale Regarding claim 12, Jin in view of Lee discloses the semiconductor package structure of claim 11 (Jin: Fig. 13), wherein a portion of the underfill is disposed in the first frame-like trench (underfill 200 is in trench T1/T2/T3). Regarding claim 13, Jin in view of Lee discloses the semiconductor package structure of claim 11 (Jin: Fig. 11), wherein a depth of the first frame-like trench (t2) is equal to a depth of the second frame-like trench (Lee: Fig. 6a shows multiple trenches 200 and 201 having equal depths. This same teaching is incorporated when including the second frame-like trench). Regarding claim 14, Jin in view of Lee discloses the semiconductor package structure of claim 11 (Lee: Fig. 6a), wherein a portion of the underfill is disposed in the second frame-like trench (As reasoned in the claim 11 rejection, the second frame-like trench is included for controlling the flow of underfill. Lee: Fig. 6a shows underfill 216 in trench 201.). Regarding claim 15, Jin in view of Lee discloses the semiconductor package structure of claim 11 (Lee: Fig. 6a), but fails to teach “wherein the second frame-like trench is free of the underfill”. However, Lee teaches the second frame-like trench performs the function of controlling the flow of excess underfill (Lee: [0057]: “controlling the outward flow of excess underfill material”). Separately, Lee teaches an embodiment with a lesser amount of excess underfill (Fig. 3g: 154), that does not flow beyond the wall structure (140). In situations with a lesser amount of excess underfill (of Fig. 3g), the second frame-like trench (of Fig. 6a) would be free of the underfill. A person of ordinary skill in the art before the effective filing date would have been motivated to have the claimed trench and underfill configuration for the same reasons as in the claim 11 rejection, because the second frame-like trench would provide protection from excess underfill regardless of whether the amount of excess underfill were sufficient to fill the trench (Lee: [0057]: “controlling the outward flow of excess underfill material”). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date to have the claimed underfill configuration because it is the resultant configuration based on the amount of excess underfill. MPEP 2144.03. Claim 16 is rejected under 35 U.S.C. 103 as being unpatentable over Jin in view of Lee as applied to claim11 above, and further in view of Chou (US 20160315028 A1). Regarding claim 16, Jin in view of Lee discloses the semiconductor package structure of claim 11 (Jin: Fig. 1), but fails to teach the claimed “depth” configuration “wherein a depth of the first frame-like trench and a depth of the second frame-like trench are greater than a thickness of the top dielectric layer”. Chou discloses wherein a depth of the first frame-like trench (Fig. 1: one trench 128, See annotated figure for Depth annotation) and a depth of the second frame-like trench (Fig. 1: another trench 128) are greater than a thickness of the top dielectric layer ([0031]: “equal to a total thickness of the first insulating layer 122 and the second insulating layer 126”). Modifying the first and second frame-like trenches (of Jin in view of Lee) by incorporating the alternative known “depth” configuration of Chou (i.e., a change in size) would arrive at the claimed “depth” configuration. A person of ordinary skill in the art before the effective filing date would have had a reasonable expectation of success doing so because: 1) in each situation the trench is performing the same function to control the flow of excess underfill (Chou: [0030]: “fill the excess portion of the underfill 150 into the groove 128”; Lee: [0057]: “controlling the outward flow of excess underfill material”), and 2) Chou teaches a depth range ([0031]: “less than the total thickness” is an open ended range, open on lower endpoint of the depth range) overlapping the depth illustrated by Jin and Lee (i.e., a depth less than or equal to the thickness of the top dielectric layer). Chou provides a teaching to motivate one of ordinary skill in the art before the effective filing date to modify the trenches by incorporating the alternative “depth” configuration in that it’s a difference in size chosen according to needed underfill flow control (Chou: [0030]: “prevents the excess underfill…during an overflow…so as to fill the excess portion of the underfill 150 into the groove 128” with [0031]: “a depth of the groove 128 is equal…but in other embodiments, the depth of the groove 128 may also be less than…”). Therefore, the claimed “depth” configuration would have been obvious to one of ordinary skill in the art before the effective filing date because it is a difference in size encompassed by teachings elsewhere in the prior art for substantially similar structures. MPEP 2144.04 (IV)(A). Allowable Subject Matter Claims 1-10 and 17-20 are allowed. The following is a statement of reasons for the indication of allowable subject matter: The primary reason for the allowable subject matter of claims 1-10 is the inclusion of the limitation “a conductive wall structure laterally surrounding the trench, wherein the first UBM and the conductive wall structure comprise a same material, and a thickness of the conductive wall structure is equal to a thickness of the first UBM” in combination with the other limitations in the claim. For example, prior art of record fails to teach or be reasonably combined to render obvious the claimed limitations “conductive wall structure”, “same material”, and the equal “thickness” configuration in combination with all other limitations in claim 1 because the prior art lacks any specific dimensional relation or suggested relation among the walls and the UBM disclosed elsewhere in the art; these walls and UBM are not made in a way that would imply, or otherwise reasonably encompass any specific dimensional relation consistent with the claim. The primary reason for the allowable subject matter of claims 17-20 is the inclusion of the limitation “forming a first UBM in the first opening, a second UBM in the second opening, and a conductive wall structure over the redistribution structure simultaneously” in combination with the other limitations in the claim. For example, prior art of record fails to teach or be reasonably combined to render obvious the claimed limitations “conductive wall structure”, “UBM”, and forming these structures “simultaneously” in combination with all other limitations in claim 17 because the prior art discloses these structures separately formed and cannot be reasonably combined to arrive at the claimed “simultaneously” method configuration. Response to Arguments Applicant's arguments filed 7/28/2026 have been fully considered but they are not persuasive. Applicant argues: Applicant argues with respect to amended claim 11 that “Lee fails to teach or suggest that the separation structure and a top dielectric layer of the redistribution structure comprise a same material”. Remarks at pg. 2. Examiner’s reply: The examiner disagrees and points to MPEP 2111: Broadest Reasonable Interpretation and finds “separation structure” as claimed reasonably encompassed by the shapes and arrangements cited in the instant Office action. The rejection has been adjusted with new citations and remarks as necessitated by claim amendment and to promote clarity of the record. Applicant argues: Applicant argues with respect to amended claim 16 that “Jin and Lee fails to teach or suggest that the depths of the first and second frame-like trenches are greater than a thickness of a top dielectric layer of the redistribution structure”. Remarks at pg. 2. Examiner’s reply: Applicant’s arguments with respect to claim(s) 16 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument. Chou is relied upon in the instant Office action to teach the contended difference in size/proportion. MPEP 2144.04(IV)(A). Conclusion THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to WILLIAM H ANDERSON whose telephone number is (571)272-2534. The examiner can normally be reached Monday-Friday, 8:00-5:00. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Kretelia Graham can be reached at (571) 272-5055. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /WILLIAM H ANDERSON/ Examiner, Art Unit 2817
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Prosecution Timeline

Show 2 earlier events
Jan 21, 2026
Response Filed
Feb 19, 2026
Final Rejection mailed — §103
Apr 14, 2026
Response after Non-Final Action
Apr 23, 2026
Request for Continued Examination
Apr 28, 2026
Response after Non-Final Action
May 01, 2026
Non-Final Rejection mailed — §103
Jul 28, 2026
Response Filed
Aug 20, 2026
Final Rejection mailed — §103 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

5-6
Expected OA Rounds
85%
Grant Probability
99%
With Interview (+17.9%)
2y 7m (~0m remaining)
Median Time to Grant
High
PTA Risk
Based on 221 resolved cases by this examiner. Grant probability derived from career allowance rate.

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