DETAILED ACTION
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
This action is responsive to the following communications: the Amendment filed 1/6/2026.
Claims 1-14 and 21-26 are pending. Claims 15-20 are cancelled. Claims 21-26 are new.
Information Disclosure Statement
The information disclosure statement (IDS) submitted on 4/26/2023 is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner.
Election/Restrictions
Applicant’s election of Invention I in the reply filed on 1/6/2026 is acknowledged. Because applicant did not distinctly and specifically point out the supposed errors in the restriction requirement, the election has been treated as an election without traverse (MPEP § 818.01(a)).
Claims 15-20, which have been canceled, were drawn to a nonelected Invention, there being no allowable generic or linking claim. Election was made without traverse in the reply filed on 1/6/2026.
A. Prior-art rejections based at least in part by Chen
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 21-22 and 26 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Chen et al. (US 2021/0020602 A1, hereinafter “Chen”) as evidenced by Sumi et al. (US 2016/0276572 A1, hereinafter “Sumi”).
Regarding independent claim 21, Figure 9 of Chen discloses a semiconductor package, comprising:
a first integrated circuit SC1 (“semiconductor chip”- ¶0046) having a first bonding layer 110 (“protection layer”, which is used in fusion bonding between the chips- ¶0029);
a plurality of second integrated circuits SC2, SC3 (“semiconductor chip”- ¶0046), having second bonding layers 201 (see Fig. 2A for notation), 301 (“substrate”, which is used in fusion bonding between the chips- ¶¶0029, 0047) bonded onto the first integrated circuit SC1 respectively;
at least one adhesion layer 112 (“etch stop layer”- ¶0017, comprised of silicon nitride- ¶0030, which has adhesive properties given Sumi discloses the use of silicon nitride as an adhesion layer- Sumi ¶0039), disposed on the first bonding layer 110 between the second bonding layers 201, 301; and
an encapsulant 114 (“gap fill layer”- ¶0030) different from the at least one adhesion layer 112, disposed on the at least one adhesion layer 112 between the second integrated circuits SC2, SC3.
Regarding claim 22, Figure 9 of Chen discloses wherein the at least one adhesion layer 112 is further disposed between a sidewall of one of the second integrated circuits SC2, SC3 and a sidewall of the encapsulant 114.
Regarding claim 26, Figure 9 of Chen discloses wherein the at least one adhesion layer 112 contacts the first bonding layer 110 and the second bonding layers 201, 301.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claims 1-4, 7-10 and 14 are rejected under 35 U.S.C. 103 as being unpatentable over Chen in view of Chung et al. (US 2022/0093461 A1, hereinafter “Chung”) and as evidenced by Sumi.
Regarding independent claim 1, Figure 9 of Chen discloses a semiconductor package, comprising:
a first integrated circuit SC1 (“semiconductor chip”- ¶0046);
a plurality of second integrated circuits SC2, SC3 (“semiconductor chip”- ¶0046), bonded onto the first integrated circuit SC1;
at least one adhesion layer 112 (“etch stop layer”- ¶0017, comprised of silicon nitride- ¶0030, which has adhesive properties given Sumi discloses the use of silicon nitride as an adhesion layer - Sumi ¶0039) extending between the second integrated circuits SC2, SC3 and disposed on sidewalls of the second integrated circuits SC2, SC3; and
a gap fill 114 (“gap fill layer”- ¶0030), extending between the second integrated circuits SC2, SC3 and on the at least one adhesion layer 112, wherein a surface of the at least one adhesion layer 112 facing away from the first integrated circuit SC1 is substantially coplanar with a surface of the gap fill 114 facing away from the first integrated circuit SC1;
wherein the gap fill 114 comprises silicon oxide (¶0030).
Chen does not expressly disclose wherein the gap fill is a molding compound.
Figure 19 Chung discloses a semiconductor package comprising a gap fill 90 (“gap filling region”- ¶0052) which comprises silicon oxide or a molding compound (¶0052).
In light of such teachings, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Chen such that the gap fill comprises a molding compound as taught by Chung for the purpose of substituting art recognized equivalents known to be used for the same purpose (MPEP 2144.06), specifically utilizing a suitable and well-known composition for the gap fill.
Thus, the combined teachings including Chung discloses the claimed “molding compound”, which is the modified gap fill 114 in Chen which includes a molding compound composition.
Regarding claim 2, Figure 9 of Chen discloses wherein the at least one adhesion layer 112 continuously covers sidewalls of the second integrated circuits SC2, SC3 and a surface of the first integrated circuit SC1 between the second integrated circuits SC2, SC3.
Regarding claim 3, the combined teachings, particularly Figure 9 of Chen discloses wherein the molding compound 114 is in direct contact with the at least one adhesion layer 112.
Regarding claim 4, the combined teachings, particularly Figure 9 of Chen discloses wherein the surfaces of the at least one adhesion layer 112 and the molding compound 114 are substantially coplanar with surfaces of the second integrated circuits SC2, SC3 facing away from the first integrated circuit SC1.
Regarding independent claim 7, Figure 9 of Chen discloses a semiconductor package, comprising:
a first integrated circuit SC1 (“semiconductor chip”- ¶0046);
a plurality of second integrated circuits SC2, SC3 (“semiconductor chip”- ¶0046), bonded onto the first integrated circuit;
at least one adhesion layer 112 (“etch stop layer”- ¶0017, comprised of silicon nitride- ¶0030, which has adhesive properties given Sumi discloses the use of silicon nitride as an adhesion layer- Sumi ¶0039), extending between the second integrated circuits SC2, SC3 and having a substantially constant thickness on at least one sidewall of the second integrated circuits SC2, SC3; and
a gap fill 114 (“gap fill layer”- ¶0030), extending between the second integrated circuits SC2, SC3 and on at least one the adhesion layer 112;
wherein the gap fill 114 comprises silicon oxide (¶0030).
Chen does not expressly disclose wherein the gap fill is a molding compound.
Figure 19 Chung discloses a semiconductor package comprising a gap fill 90 (“gap filling region”- ¶0052) which comprises silicon oxide or a molding compound (¶0052).
In light of such teachings, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Chen such that the gap fill comprises a molding compound as taught by Chung for the purpose of substituting art recognized equivalents known to be used for the same purpose (MPEP 2144.06), specifically utilizing a suitable and well-known composition for the gap fill.
Thus, the combined teachings including Chung discloses the claimed “molding compound”, which is the modified gap fill 114 in Chen which includes a molding compound composition.
Regarding claim 8, Figure 9 of Chen discloses wherein the at least one adhesion layer 112 entirely covers the at least one sidewall of the second integrated circuits SC2, SC3.
Regarding claim 9, Figure 9 of Chen discloses wherein a topmost surface of the at least one adhesion layer 112 facing away from the first integrated circuit SC1 is substantially coplanar with a top surface of the molding compound 114 facing away from the first integrated circuit SC1.
Regarding claim 10, Figure 9 of Chen discloses wherein the at least one adhesion layer 112 extending on the first integrated circuit SC1 between the second integrated circuits SC2, SC3 has a substantially flat surface.
Regarding claim 14, Figure 9 of Chen discloses wherein the at least one adhesion layer 112 is in direct contact with the second integrated circuits SC2, SC3.
Claims 6 and 13 are rejected under 35 U.S.C. 103 as being unpatentable over the combined teachings of Chen and Chung (as evidenced by Sumi) in further view of Kim et al. (US 2022/0093393 A1, hereinafter “Kim”).
Regarding claim 6, Figure 9 of Chen discloses wherein a material of the at least one adhesion layer 112 comprises silicon nitride (¶0030), and wherein the at least one adhesion layer 112 is an etch stop layer (¶0030).
Chen does not expressly disclose wherein a material of the at least one adhesion layer comprises a spin-on-glass (SOG), polyimide, benzocyclobutene (BCB) or polybenzoxazole (PBO).
Figure 8 of Kim discloses an etch stop layer 260 (“etch stopper film”- ¶0056), which is comprised of silicon nitride or spin-on-glass (SOG) (¶0056).
In light of such teachings, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the combined teachings such that a material of the at least one adhesion layer comprises a spin-on-glass (SOG) as taught by Kim for the purpose of substituting art recognized equivalents known to be used for the same purpose (MPEP 2144.06), specifically utilizing a suitable and well-known composition for an etch stop layer.
Regarding claim 13, Figure 9 of Chen discloses wherein a material of the at least one adhesion layer 112 comprises silicon nitride (¶0030), and wherein the at least one adhesion layer 112 is an etch stop layer (¶0030).
Chen does not expressly disclose wherein a material of the at least one adhesion layer comprises a spin-on-glass (SOG), polyimide, benzocyclobutene (BCB) or polybenzoxazole (PBO).
Figure 8 of Kim discloses an etch stop layer 260 (“etch stopper film”- ¶0056), which is comprised of silicon nitride or spin-on-glass (SOG) (¶0056).
In light of such teachings, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the combined teachings such that a material of the at least one adhesion layer comprises a spin-on-glass (SOG) as taught by Kim for the purpose of substituting art recognized equivalents known to be used for the same purpose (MPEP 2144.06), specifically utilizing a suitable and well-known composition for an etch stop layer.
Claims 5 and 12 are rejected under 35 U.S.C. 103 as being unpatentable over the combined teachings of Chen and Chung (as evidenced by Sumi) in further view of Kim and Tsai et al. (US 2014/0252597 A1, hereinafter “Tsai”)
Regarding claim 5, Figure 9 of Chen discloses wherein a material of the at least one adhesion layer 112 comprises silicon nitride (¶0030), and wherein the at least one adhesion layer 112 is an etch stop layer (¶0030).
Chen does not expressly disclose wherein a viscosity of the at least one adhesion layer is smaller than a viscosity of the molding compound.
Figure 8 of Kim discloses an etch stop layer 260 (“etch stopper film”- ¶0056), which is comprised of silicon nitride or spin-on-glass (SOG) (¶0056).
In light of such teachings, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the combined teachings such that a material of the at least one adhesion layer comprises a spin-on-glass (SOG) as taught by Kim for the purpose of substituting art recognized equivalents known to be used for the same purpose (MPEP 2144.06), specifically utilizing a suitable and well-known composition for an etch stop layer.
Tsai discloses a molding compound 62 (“molding compound”- ¶0014) comprising Cyclotrisiloxane-hexamethyl (¶0014).
In light of such teachings, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the combined teachings such that the mold compound comprises Cyclotrisiloxane-hexamethyl as taught by Tsai for the purpose of substituting art recognized equivalents known to be used for the same purpose (MPEP 2144.06), specifically utilizing a suitable and well-known composition for the molding compound.
Thus, regarding the limitation, “wherein a viscosity of the at least one adhesion layer is smaller than a viscosity of the molding compound”, the limitation appears to be directed to a property or characteristic of the device, thus "the examiner provides a basis in fact and/or technical reasoning to reasonably support the determination that the allegedly inherent characteristic necessarily flow from the teachings of the applied prior art" (quoting Ex Parte Levy, 17 USPQ2s 1461, 1464 (Bd. Pat. App. & Inter. 1990 under Section 2112.IV of the MPEP), then the burden of proof is shifted to the Applicant to show that the apparatus taught by the prior art reference cannot function or does not have the property or characteristic as recited. This manner of interpreting claim limitations directed to a property or characteristic of the device is hereby adopted for the remainder of the office action.
Therefore, the combined teachings including Kim and Tsai would inherently meet the limitation, since the combined teachings including Kim and Tsai discloses the same material compositions for the at least one adhesion layer (i.e., spin-on-glass (SOG)) and the molding compound (i.e., Cyclotrisiloxane-hexamethyl) as claimed/disclosed in the current application, and thereby the properties and characteristics associated with these structural elements, specifically the respective viscosities and the associated relationship between the respective viscosities of the adhesion layer and molding compound, as recited in the limitation would be inherent in the prior art unless shown otherwise.
Regarding claim 12, Figure 9 of Chen discloses wherein a material of the at least one adhesion layer 112 comprises silicon nitride (¶0030), and wherein the at least one adhesion layer 112 is an etch stop layer (¶0030).
Chen does not expressly disclose wherein a viscosity of the at least one adhesion layer is smaller than a viscosity of the molding compound.
Figure 8 of Kim discloses an etch stop layer 260 (“etch stopper film”- ¶0056), which is comprised of silicon nitride or spin-on-glass (SOG) (¶0056).
In light of such teachings, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the combined teachings such that a material of the at least one adhesion layer comprises a spin-on-glass (SOG) as taught by Kim for the purpose of substituting art recognized equivalents known to be used for the same purpose (MPEP 2144.06), specifically utilizing a suitable and well-known composition for an etch stop layer.
Tsai discloses a molding compound 62 (“molding compound”- ¶0014) comprising Cyclotrisiloxane-hexamethyl (¶0014).
In light of such teachings, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the combined teachings such that the mold compound comprises Cyclotrisiloxane-hexamethyl as taught by Tsai for the purpose of substituting art recognized equivalents known to be used for the same purpose (MPEP 2144.06), specifically utilizing a suitable and well-known composition for the molding compound.
Thus, regarding the limitation, “wherein a viscosity of the at least one adhesion layer is smaller than a viscosity of the molding compound”, the limitation appears to be directed to a property or characteristic of the device, thus "the examiner provides a basis in fact and/or technical reasoning to reasonably support the determination that the allegedly inherent characteristic necessarily flow from the teachings of the applied prior art" (quoting Ex Parte Levy, 17 USPQ2s 1461, 1464 (Bd. Pat. App. & Inter. 1990 under Section 2112.IV of the MPEP), then the burden of proof is shifted to the Applicant to show that the apparatus taught by the prior art reference cannot function or does not have the property or characteristic as recited. This manner of interpreting claim limitations directed to a property or characteristic of the device is hereby adopted for the remainder of the office action.
Therefore, the combined teachings including Kim and Tsai would inherently meet the limitation, since the combined teachings including Kim and Tsai discloses the same material compositions for the at least one adhesion layer (i.e., spin-on-glass (SOG)) and the molding compound (i.e., Cyclotrisiloxane-hexamethyl) as claimed/disclosed in the current application, and thereby the properties and characteristics associated with these structural elements, specifically the respective viscosities and the associated relationship between the respective viscosities of the adhesion layer and molding compound, as recited in the limitation would be inherent in the prior art unless shown otherwise.
B. Prior-art rejections based at least in part by Chen 601
Claim Rejections - 35 USC § 102
Claims 21-26 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Chen et al. (US 2021/0020601 A1, hereinafter “Chen 601”) as evidenced by Sumi et al. (US 2016/0276572 A1, hereinafter “Sumi”).
Regarding independent claim 21, Figure 1H of Chen 601 discloses a semiconductor package, comprising:
a first integrated circuit 100 (“die”- ¶0013) having a first bonding layer BS1 (“bonding structure”- ¶0013; see Fig. 1B for notation);
a plurality of second integrated circuits 200 (“dies”- ¶0020), having second bonding layers BS2 (“bonding structure”- ¶0027; see Fig. 1B for notation) bonded onto the first integrated circuit 100 respectively;
at least one adhesion layer BS/F-1 (collectively BS “dielectric layer” and F-1 “dielectric layer”- ¶¶0034, 0039, comprised of silicon nitride- ¶0032, which has adhesive properties given Sumi discloses the use of silicon nitride as an adhesion layer- Sumi ¶0039), disposed on the first bonding layer BS1 between the second bonding layers BS2; and
an encapsulant F-2 (“dielectric layer”- ¶0034) different from the at least one adhesion layer BS/F-1, disposed on the at least one adhesion layer BS/F-1 between the second integrated circuits 200.
Regarding claim 22, Figure 1H of Chen 601 discloses wherein the at least one adhesion layer BS/F-1 is further disposed between a sidewall of one of the second integrated circuits 200 and a sidewall of the encapsulant F-2.
Regarding claim 23, Figure 1H of Chen 601 discloses wherein a thickness of the at least one adhesion layer BS/F-1 disposed between the sidewall of the one of the second integrated circuits 200 and the sidewall of the encapsulant F-2 is smaller than a thickness of the at least one adhesion layer BS/F-1 disposed on the first bonding layer BS1 between the second bonding layers BS2.
Regarding claim 24, Figure 1H of Chen 601 discloses wherein a thickness (i.e., collective thickness of BS and F-1) of the at least one adhesion layer BS/F-1 is larger than a thickness of one of the second bonding layers BS2 of the second integrated circuits 200.
Regarding claim 25, Figure 1H of Chen 601 discloses wherein the at least one adhesion layer BS/F-1 comprises a first adhesion layer BS and a second adhesive layer F-1 between the first adhesion layer BS and the encapsulant F-2.
Regarding claim 26, Figure 1H of Chen 601 discloses wherein the at least one adhesion layer BS/F-1 contacts the first bonding layer BS1 and the second bonding layers BS2.
C. Prior-art rejections based at least in part by Tsai
Claim Rejections - 35 USC § 102
Claims 7 and 11 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Tsai et al. (US 2015/0287697 A1, hereinafter “Tsai 697”) as evidenced by Sumi et al. (US 2016/0276572 A1, hereinafter “Sumi”).
Regarding independent claim 7, Figure 7 of Tsai 697 discloses a semiconductor package, comprising:
a first integrated circuit 105 (“substrate”, which comprises silicon and includes active elements and thereby is considered an “integrated circuit”- ¶¶0024-0025);
a plurality of second integrated circuits 101, 103 (“die”- ¶0016), bonded onto the first integrated circuit 105;
at least one adhesion layer 201 (“protective cap”-¶0039, comprised of titanium- ¶0039, which has adhesive properties given Sumi discloses the use of titanium as an adhesion layer- Sumi ¶0039), extending between the second integrated circuits 101, 103 and having a substantially constant thickness on at least one sidewall of the second integrated circuits 101, 103; and
a molding compound 301 (“encapsulant… molding compound”- ¶0041), extending between the second integrated circuits 101, 103 and on at least one the adhesion layer 201.
Regarding claim 11, Figure 7 of Tsai 697 discloses wherein a thickness of the at least one adhesion layer 201 extending on the first integrated circuit 105 between the second integrated circuits 101, 103 is larger than the substantially constant thickness.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to JAY C CHANG whose telephone number is (571)272-6132. The examiner can normally be reached Mon- Fri 12pm-10pm.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Eliseo Ramos-Feliciano can be reached at (571)-272-7925. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/JAY C CHANG/ Primary Examiner, Art Unit 2817