1DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 1 -5, and 12 are rejected under 35 U.S.C. 103 as being unpatentable over Koike (US 2011/0057317) in view of Liu (US 2018/0012797).
Regarding claim 1, Koike discloses a method, comprising: forming a first conductive layer (Fig.19, numeral 608a) via physical vapor deposition (PVD) in an opening of a substrate ([0129]),; forming a second conductive layer (608b) via PVD on the first conductive layer ([0219]), wherein the first conductive layer and the second conductive layer are formed at a temperature of less than 50°C ([0210); and annealing at least a portion of the first conductive layer and the second conductive layer ([0220]).
Koike does not explicitly disclose wherein the first conductive layer has a thickness of less than 20 angstroms.
Koike however discloses that the first conductive layer is a barrier layer and has a thickness of 20 angstroms ([0220]). And Liu discloses that the thickness of the first conductive layer can less than 20 angstroms ([0057]).
It would have therefore obvious to one of ordinary skill in the art at the time the invention was filed to modify Koike with Liu to have first conductive layer having a thickness of less than 20 angstroms because this a typical thickness of the barrier layers.
Regarding claim 2, Liu discloses wherein the first conductive layer has a thickness of 4 to 12 angstroms ([0057]).
Regarding claim 3, Liu discloses wherein the first conductive layer has a thickness of about 8 angstroms ([0057]).
Regarding claim 4, Liu discloses wherein the first conductive layer has a thickness of about two monolayers ([0057]; note: 3 angstroms).
Regarding claim 5, Koike discloses wherein the first conductive layer and the second conductive layer comprise at least one of tungsten, cobalt, titanium, copper, nickel, ruthenium, aluminum, tantalum, molybdenum ([0219]).
Regarding claim 12, Koike discloses wherein the annealing is performed while forming, via chemical vapor deposition (CVD), a third conductive layer on the second conductive layer ([0220]).
Claim(s) 6 is/are rejected under 35 U.S.C. 103 as being unpatentable over Koike in view of Liu as applied to claim 1 above, and further in view of Fu (US 2010/0105203)
Regarding claim 6, Koike does not disclose wherein the first conductive layer and the second conductive layer comprise tungsten.
Koike however discloses that the first conductive layer and the second conductive layer are barrier layers. Fu however discloses wherein a barrier layer comprise tungsten ([0022]).
It would have been therefore obvious to one of ordinary skill in the art at the time the invention was filed to have the first conductive layer and the second conductive layer comprise tungsten because this one of the typical materials for forming barrier layers.
Claim(s) 7 and 8 are rejected under 35 U.S.C. 103 as being unpatentable over Koike in view of Lu as applied to claim 1 above, and further in view of Fisher (US 2008/0157208).
Regarding claims 7 and 8, Koike does not disclose wherein the first conductive layer and the second conductive layer are formed at a temperature of about 25 C.
Koike however discloses that the first conductive layer and the second conductive layer are formed by sputtering at a temperature below 50 °C ([0219]). And Fisher discloses that sputtering is performed at room temperature ([0087]).
It would have been therefore obvious to one of ordinary skill in the art at the time the invention was filed to adjust the temperature to be in the claimed range for the purpose of optimizing deposition of the conductive layers.
Claim(s) 9 is/are rejected under 35 U.S.C. 103 as being unpatentable over Koike in view of Fu as applied to claim 1 above, and further in view of Liu (US 2018/0012797) and Gopalraja (US 2004/0140196).
Regarding clam 9, Koike discloses the second conductive layer is formed with a bias of greater than 50 W applied to the substrate ([0219).
Koike does not disclose wherein the first conductive layer is formed with a bias of between 1W and 50 W applied to the substrate.
Liu however discloses wherein the first conductive layer is formed with a bias of applied to the substrate lower than a bias applied to the substrate during formation of second conductive layer ([0056]- [0058]). Liu further discloses that plasma during applying a lower bias to the substrate would not impinge on the metal ([0056]). And Gopalraja discloses that a lower bias during sputtering process is from 0W to 150 W ([0040]).
It would have been therefore obvious to one of ordinary skill in the art at the time the invention was filed to modify Koike with Liu and Gopalraja to have the first conductive layer is formed with a bias applied to the substrate to be in the claimed range for the purpose of optimization sputtering process (Gopalraja, [0040]).
Claim 10 is rejected under 35 U.S.C. 103 as being unpatentable over Koike in view of Fu as applied to claim 1 above, and further in view of Lu (US 2018/0012797)
Regarding claim 10, Koike discloses the second conductive layer is formed with a bias of 125 W to 175 W applied to the substrate ([0219]).
Koike does not disclose wherein the first conductive layer is formed with a bias of about 0 W applied to the substrate.
Liu however discloses wherein the first conductive layer is formed with a bias of about 0 W applied to the substrate ([0008].
It would have been therefore obvious to one of ordinary skill in the art at the time the invention was filed to modify Koike with Liu to have the first conductive layer is formed with a bias of about 0 W applied to the substrate for the purpose of effectively forming barrier layers (Liu, [0007]).
Claim(s) 11 is/are rejected under 35 U.S.C. 103 as being unpatentable over Koike in view of Fu as applied to claim 1 above, and further in view of Nakano (US 2019/0071767).
Regarding claim 11, Koike does not disclose a spacing between a sputtering target and the substrate is from 130mm to 160mm when forming the first conductive layer and the second conductive layer.
Nakano however discloses a spacing between a sputtering target and the substrate is from 130mm to 160mm ([0052]).
It would have been therefore obvious to one of ordinary skill in the art at the time the invention was filed to modify Koike with Nakano to have a spacing between a sputtering target and the substrate to be in the claimed range for the purpose of productivity optimization (Nakano, [0052]).
Claim(s) 13 is rejected under 35 U.S.C. 103 as being unpatentable over Koike in view of Fu as applied to claim 1 above, and further in view of Chung (US 2023/0360969).
Regarding claim 13, Koike in view of Fu does not discloses etching at least a portion of the first conductive layer and the second conductive layer from one or more sidewalls of the opening; and after etching, selectively forming a bulk layer of a conductive material on the second conductive layer.
Chung however discloses etching at least a portion of the first conductive layer and the second conductive layer from one or more sidewalls of the opening (Figs. 1H, 1I), numerals 108, 110); and after etching, selectively forming a bulk layer of a conductive material (Fig.1L, numeral 122A) on the second conductive layer (110) ([0027]).
It would have been therefore obvious to one of ordinary skill in the art at the time the invention was filed to modify Koike with Chung to perform etching at least a portion of the first conductive layer and the second conductive layer from one or more sidewalls of the opening; and after etching, selectively forming a bulk layer of a conductive material on the second conductive layer for the purpose of lowering resistance in contact structures (Chung, [0010]).
Claim(s) 14, 16-20 are rejected under 35 U.S.C. 103 as being unpatentable over Liu in view of Koike.
Regarding claim 14, Liu discloses a method, comprising: forming a first conductive layer (Fig.3C, numeral 316) via physical vapor deposition (PVD) in an opening of a substrate (304) ([0057]), wherein the first conductive layer (316) has a thickness of less than 20 angstroms ([0057]); forming a second conductive layer (326) via PVD on the first conductive layer (316) ([0057]), wherein the second conductive layer (326) has a thickness of greater than 20 angstroms ([0058]).
Liu does not disclose and the first conductive layer and the second conductive layer are formed at a temperature of less than 50°C.
Koike however discloses that the first conductive layer and the second conductive layer are formed at a temperature of less than 50°C.
It would have been therefore obvious to one of ordinary skill in the art at the time the invention was filed to modify Liu with Koike to form the first conductive layer and the second conductive layer at a temperature of less than 50°C for the purpose of effectively forming barrier layers (Koike, [0219]).
Regarding claim 16, Liu discloses wherein the first conductive layer has a thickness of 4 to 12 angstroms ([0057]).
Regarding claim 17, Liu discloses wherein the first conductive layer and the second conductive layer comprise at least one of tungsten, cobalt, titanium, copper, nickel, ruthenium, aluminum, tantalum, molybdenum ([0057]).
Regarding claim 18, Liu discloses a method, comprising: forming a first conductive layer (Fig.3C, numeral 316) via physical vapor deposition (PVD) ([0057]) in an opening of a substrate (304), wherein the first conductive layer (316) has a thickness of less than 20 angstroms ([0057]); forming a second conductive layer (326) via PVD ([0058]) on the first conductive layer (316), and depositing a third conductive layer (Fig.3F, numeral 308) ([0061]) on the second conductive layer (326).
Liu does not disclose (1) the first conductive layer and the second conductive layer are formed at a temperature of less than 50°C; (2) that the third conductive layer is deposited via chemical vapor deposition (CVD).
Regarding element (1), Koike however discloses that the first conductive layer and the second conductive layer are formed at a temperature of less than 50°C.
It would have been therefore obvious to one of ordinary skill in the art at the time the invention was filed to modify Liu with Koike to form the first conductive layer and the second conductive layer at a temperature of less than 50°C for the purpose of effectively forming barrier layers (Koike, [0219]).
Regarding element (2), Koike discloses that the third conductive layer (Fig.19, numeral 607) is deposited via chemical vapor deposition (CVD) ([0091]; [0128]; [0220]).
It would have been therefore obvious to one of ordinary skill in the art at the time the invention was filed to modify Liu with Koike to deposit a third conductive layer via CVD because this a typical method for forming contact plugs (Koike, [0220]).
Regarding claim 19, Liu discloses wherein the first conductive layer is formed with a bias of less than 50 W applied to the substrate ([0056]), and the second conductive layer is formed with a bias of greater than 50 W applied to the substrate ([0058]).
Regarding claim 20, Liu discloses wherein the first conductive layer has a thickness of 4 to 12 angstroms ([0057]).
Claim(s) 15 is/are rejected under 35 U.S.C. 103 as being unpatentable over Liu in view of Koike as applied to claim 14 above, and further in view of Gopalraja.
Regarding claim 15, Liu discloses, and the second conductive layer is formed with a bias of greater than 50 W applied to the substrate ([0058]).
Liu does not disclose wherein the first conductive layer is formed with a bias of between 1W and 50 W applied to the substrate
Liu however discloses wherein the first conductive layer is formed with a bias of applied to the substrate lower than a bias applied to the substrate during formation of second conductive layer ([0056]- [0058]). Liu further discloses that plasma during applying a lower bias to the substrate would not impinge on the metal ([0056]). And Gopalraja discloses that a lower bias during sputtering process is from 0W to 150 W ([0040]).
It would have been therefore obvious to one of ordinary skill in the art at the time the invention was filed to modify Liu with Gopalraja to have the first conductive layer is formed with a bias applied to the substrate to be in the claimed range for the purpose of optimization sputtering process (Gopalraja, [0040]).
Conclusion
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/JULIA SLUTSKER/ Primary Examiner, Art Unit 2891