DETAILED ACTION
This Notice is responsive to communication filed on 05/19/2026.
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Amendment
An amendment filed on 05/19/2026 has been acknowledged and entered into the record. Claims 8, 10, 18, and 20 have been cancelled.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Rejection Note: Italicized claim limitations indicate limitations that are not explicitly disclosed in the primary reference(s).
Claim(s) 1-3, and 6, 7, and 9 are rejected under 35 U.S.C. 103 as being unpatentable over Chang Chien et al. (US 20220045028), and further in view of Andry et al. (US 20130182998).
Regarding claim 1, Chang Chien teaches an electronic package, comprising:
an encapsulation layer Fig. 1E: 160 having a first surface (bottom surface of 160), a second surface (top surface of 160) opposing the first surface, and a side surface (left or right surface of 160) adjacent to the first surface and the second surface (para. 0046 teaches encapsulant 160 may completely cover the side surface 130c);
a photonic element Fig. 1E: 130 embedded in the encapsulation layer Fig. 1E: 160 and disposed on the first surface of the encapsulation layer Fig. 1E: 160,
wherein a part of a surface of the photonic element Fig. 1E: 130 protrudes from the side surface to be used as an external contact area (annotated below), and
the external contact area has an electrical port Fig. 1E: 131 (para. 0039),
wherein the photonic element Fig. 1E: 130 has a functional surface Fig. 1E: 130a and a back surface (top surface) opposing the functional surface Fig. 1E: 130a, the functional surface Fig. 1E: 130a corresponds to the first surface (bottom surface) of the encapsulation layer Fig. 1E: 160,
at least one electrical contact Fig. 1E: 135 is disposed on the functional surface Fig. 1E: 130a, and
the external contact area is defined on the back surface; and
an electronic element Fig. 1E: 120 embedded in the encapsulation layer Fig. 1E: 160 and disposed on the first surface of the encapsulation layer Fig. 1E: 160,
wherein the electronic element Fig. 1E: 120 is electrically connected to the photonic element Fig. 1E: 130 (para. 0053).
PNG
media_image1.png
423
794
media_image1.png
Greyscale
Andry discloses the following claim limitations not disclosed by Chang Chien:
the external contact area Fig. 1: 112 is defined on the back surface Fig. 1: 110.
Andry teaches forming the optical coupling interface in an etched cavity on the backside 110 of the photonic chip 100, opposite the front/functional side 108 where the active layer 102 of the photonic device 100 is formed (paragraphs 0012-0026).
It would be obvious to one of ordinary skill in the art before the effective filing date of the invention to modify Chang Chien with Andry in order to protect the optical coupling interface (for example integrated microlens) from damage (para. 0022).
Regarding claim 2, Chang Chien teaches the electronic package of claim 1, further comprising a circuit structure Fig. 1E: 150 formed on the first surface of the encapsulation layer Fig. 1E: 160, wherein the circuit structure Fig. 1E: 150 is electrically connected to the electronic element Fig. 1E: 120 and the photonic element Fig. 1E: 130 (para. 0053).
Regarding claim 3, Chang Chien teaches the electronic package of claim 2, wherein the circuit structure Fig. 1E: 150 is of a redistribution layer specification or a substrate specification (para. 0053, “redistribution circuit structure”).
Regarding claim 6, Chang Chien teaches the electronic package of claim 1, wherein the external contact area (annotated above) is connected to an optical fiber, and the electrical port Fig. 1E: 131 is electrically connected to the optical fiber (para. 0067 teaches a light guide element, i.e. optical fiber, in contact with the optical signal transmission are, i.e. electrical port, 131).
Regarding claim 7, Chang Chien teaches the electronic package of claim 1, further comprising a plurality of conductive elements (annotated above) formed on the first surface of the encapsulation layer Fig. 1E: 160, wherein the plurality of conductive elements are connected to an electronic device Fig. 1E: 110.
Regarding claim 9, Chang Chien teaches the electronic package of claim 1, wherein the back surface (i.e. top surface) of the photonic element Fig. 1E: 130 is flush with the second surface (i.e. top surface) of the encapsulation layer Fig. 1E: 160 (para. 0046 teaches encapsulant 160 may completely cover the side surface 130c).
Claim(s) 11-13, 16, 17, and 19 are rejected under 35 U.S.C. 103 as being unpatentable over Yu et al. (US 20230109686), and further in view of Chang Chien et al (US 20220045028).
Regarding claim 11, Yu teaches a method of manufacturing an electronic package (see Fig. 1-7), comprising:
disposing a photonic element Fig. 10: 30 and an electronic element Fig. 10: 26 on a carrier Fig. 10: 20,
wherein the photonic element Fig. 10: 30 has an external contact area Fig. 13: 64, and
the external contact area Fig. 13: 64 has an electrical port Fig. 14: 66;
forming an encapsulation layer Fig. 10: 34 on the carrier Fig. 10: 20 to cover the photonic element Fig. 10: 30 and the electronic element Fig. 10: 26,
wherein the encapsulation layer Fig. 10: 34 has a first surface (bottom surface) and a second surface opposing the first surface (top surface of 34 shown in Fig. 3), and
the encapsulation layer Fig. 10: 34 is bonded onto the carrier Fig. 10: 20 via the first surface of the encapsulation layer Fig. 10: 34 (shown in fig. 3),
wherein the photonic element Fig. 13: 30 has a functional surface (bottom surface as shown in Fig. 13) and a back surface (top surface as shown in Fig. 13) opposing the functional surface,
the functional surface corresponds to the first surface of the encapsulation layer (shown in Fig. 13), at least one electrical contact Fig. 13: 32 is disposed on the functional surface, and
the external contact area Fig. 13: 64 is defined on the back surface; and
removing the carrier Fig. 12: 20 to expose the first surface of the encapsulation layer Fig. 13: 34 (para. 0031-0032 teaches the removal of the carrier and exposure of the encapsulation surface),
wherein the encapsulation layer Fig. 13: 34 has a side surface adjacent to the first surface and the second surface (left/right surface of Fig. 13: 34), and
the external contact area of the photonic element protrudes from the side surface.
Chang Chien discloses the following claim limitations not disclosed by Yu:
the external contact area (i.e. protruding portion of Fig. 1E: 130) of the photonic element Fig. 1E: 130 protrudes from the side surface (side surface of Fig. 1E: 160).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to modify the teachings of Yu with the teachings of Chang Chien in order to include an optical signal transmission area adapted to receive or transmit optical signals (para. 0039).
Regarding claim 12, Yu teaches the method of claim 11, further comprising forming a circuit structure on the first surface of the encapsulation layer Fig. 13: 34, wherein the circuit structure is electrically connected to the electronic element Fig. 13: 26 and the photonic element Fig. 13: 30 (para. 0016).
Regarding claim 13, Yu teaches the method of claim 12, wherein the circuit structure is of a redistribution layer specification Fig. 14: 38,42 or a substrate specification (para. 0027-0028).
Regarding claim 16, Yu teaches the method of claim 11, wherein the external contact area Fig. 13: 64 is connected to an optical fiber Fig. 14: 58, and the electrical port Fig. 14: 66 is electrically connected to the optical fiber Fig. 14: 58 (para. 0046).
Regarding claim 17, Yu teaches the method of claim 11, further comprising forming a plurality of conductive elements Fig. 14: 36-46 on the first surface of the encapsulation layer Fig. 14: 34, wherein the plurality of conductive elements Fig. 14: 36-46 are connected to an electronic device Fig. 14: 52.
Regarding claim 19, Yu teaches wherein the back surface (i.e. top surface) of the photonic element Fig. 13: 30 is flush with the second surface (i.e. top surface) of the encapsulation layer Fig. 13: 34
Claim 4 is rejected under 35 U.S.C. 103 as being unpatentable over Chang Chien et al. (US 20220045028) and Andry et al. (US 20130182998) as applied to claim 1 above, and further in view of Tai et al. (US 20230266528).
Regarding claim 4, Tai discloses the following claim limitations not disclosed by Chang Chien and Andry, the electronic package of claim 1,
wherein the external contact area is in a shape of a notch Fig. 22: 76 (para. 29 edge coupler formed by a patterning process).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to combine the teachings of Chang Chien and Andry with the teachings of Tai for the purpose of allowing for lateral or inline coupling of an optical fiber to the integrated circuit die (i.e. photonic element) (para. 0029).
Claim 14 is rejected under 35 U.S.C. 103 as being unpatentable over Yu et al. (US 20230109686) and Chang Chien et al (US 20220045028) as applied to claim 11 above, and further in view of Tai et al. (US 20230266528).
Regarding claim 14, Tai discloses the following claim limitations not disclosed by Chang Chien and Andry, the electronic package of claim 14,
wherein the external contact area is in a shape of a notch Fig. 22: 76 (para. 29 edge coupler formed by a patterning process).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to combine the teachings of Chang Chien and Yu with Tai for the purpose of allowing for lateral or inline coupling of an optical fiber to the integrated circuit die (i.e. photonic element) (para. 0029).
Response to Arguments
Applicant’s arguments with respect to claim(s) 1 and 11 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument.
Regarding claims 1 and 11, the amendment of claims 1 and 11 to include the limitation “the external contact area is defined on the back surface” is now being rejected with a new ground of rejection.
Applicant's arguments filed 05/19/2026 regarding claims 4 and 14 and the prior rejection in view of Tai et al. (US 20230266528) have been fully considered but they are not persuasive.
Regarding claims 4 and 14, Tai’s invention teaches a photonic element Fig. 22: 50C (para. 0028) that is in the shape of a notch. This, in combination with the prior references, teaches the limitations as claimed in claims 4 and 14.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to NKECHINYERE ESIABA whose telephone number is (571)272-0720. The examiner can normally be reached Monday - Friday 10am-5pm EST.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Kretelia Graham can be reached at (571) 272-5055. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/Nkechinyere Esiaba/Examiner, Art Unit 2817
/Kretelia Graham/Supervisory Patent Examiner, Art Unit 2817