DETAILED ACTION
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Election/Restrictions
Applicant’s election without traverse of Group I in the reply filed on 2/4/2026 is acknowledged.
Claims 11-20 are withdrawn from further consideration pursuant to 37 CFR 1.142(b) as being drawn to a nonelected Group, there being no allowable generic or linking claim. Election was made without traverse in the reply filed on 2/4/2026.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1-10 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Chen et al. (US 2021/0287997 A1, hereinafter “Chen”).
Regarding independent claim 1, Figure 1 of Chen discloses an electronic package, comprising:
an encapsulating layer 12 (“dielectric layer”- ¶0036) having a first surface and a second surface opposing the first surface;
an electronic element 13 (“electronic component”- ¶0034) embedded in the encapsulating layer 12;
a shielding layer 10c2 (“conductive layer”, which is part of shielding structure SD1- ¶0041) formed on the first surface of the encapsulating layer 12 and covering the electronic element 13;
a plurality of shielding pillars 11v (“conductive via”, which are part of shielding structure SD1- ¶0041) embedded in the encapsulating layer 12 and in communication with the first surface and the second surface to contact and connect the shielding layer 10c2; and
a circuit structure 15 (“conductive layer”- ¶0027, specifically the portion of 15 connected to 13v and 17) formed on the second surface of the encapsulating layer 12 and electrically connected to the electronic element 13 (¶0037).
Regarding claim 2, Figure 1 of Chen discloses the electronic package further comprising a bonding layer 11 (“dielectric layer… adhesive layer”- ¶0034) formed between the shielding layer 10c2 and the electronic element 13.
Regarding claim 3, Figure 1 of Chen discloses wherein the shielding layer 10c2 is in indirect contact with the electronic element 13.
Regarding claim 4, Figure 1 of Chen discloses wherein a width of each of the plurality of shielding pillars 11v is greater than a thickness of the shielding layer 10c2.
Regarding claim 5, Figure 1 of Chen discloses wherein the electronic element 13 is surrounded by the plurality of shielding pillars 11v.
Regarding claim 6, Figure 1 of Chen discloses the electronic package further comprising a shielding portion 10v (“conductive via”, which is part of shielding structure SD1- ¶0041) disposed indirectly on an underside of the circuit structure 15 and connected to the plurality of shielding pillars 11v.
Regarding claim 7, Figure 1 of Chen discloses wherein the shielding portion 10v is formed indirectly on side surfaces (i.e., vertical and bottom side surfaces) of the circuit structure 15.
Regarding claim 8, Figure 1 of Chen discloses wherein the shielding portion 10v is arranged obliquely relative to the second surface of the encapsulating layer 12, since portion 10v has angled sidewalls which are disposed obliquely relative to the horizontal second surface of the encapsulating layer 12.
Regarding claim 9, Figure 1 of Chen discloses the electronic package further comprising an insulating protection layer 10d (“carrier”- ¶0029) covering at least part of the shielding portion 10v.
Regarding claim 10, Figure 1 of Chen discloses wherein a maximum width of the circuit structure 15 (i.e., specifically the portion of 15 connected to 13v and 17) is less than a width of the second surface of the encapsulating layer 12.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure:
Lee et al. (US 2018/0374798 A1), which discloses an electronic package comprising a shielding layer and shielding pillars surrounding an electronic component.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to JAY C CHANG whose telephone number is (571)272-6132. The examiner can normally be reached Mon- Fri 12pm-10pm.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Eliseo Ramos-Feliciano can be reached at (571)-272-7925. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/JAY C CHANG/Primary Examiner, Art Unit 2817