Prosecution Insights
Last updated: July 15, 2026
Application No. 18/310,815

ELECTRONIC PACKAGE AND MANUFACTURING METHOD THEREOF

Final Rejection §102
Filed
May 02, 2023
Priority
Dec 29, 2022 — TW 111150723
Examiner
CHANG, JAY C
Art Unit
2817
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Siliconware Precision Industries Co., Ltd.
OA Round
2 (Final)
85%
Grant Probability
Favorable
3-4
OA Rounds
0m
Est. Remaining
99%
With Interview

Examiner Intelligence

Grants 85% — above average
85%
Career Allowance Rate
564 granted / 663 resolved
+17.1% vs TC avg
Moderate +14% lift
Without
With
+14.1%
Interview Lift
resolved cases with interview
Typical timeline
2y 3m
Avg Prosecution
30 currently pending
Career history
697
Total Applications
across all art units

Statute-Specific Performance

§101
0.3%
-39.7% vs TC avg
§103
58.6%
+18.6% vs TC avg
§102
18.9%
-21.1% vs TC avg
§112
19.9%
-20.1% vs TC avg
Black line = Tech Center average estimate • Based on career data from 663 resolved cases

Office Action

§102
DETAILED ACTION The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . This action is responsive to the following communications: the Amendment filed 4/14/2026. Claims 1-5, 7-15 and 17-20 are pending. Claims 11-15 and 17-20 are withdrawn. Claims 6 and 16 are cancelled. Claim 1 is currently amended. Claim 1 is independent. Response to Arguments Applicants' arguments and amendments, filed 4/14/2026, with respect to independent claim 1, although substantive and pertinent to expediting the prosecution of the current application, are considered moot and not persuasive, respectfully, in light of new grounds of rejections using a new interpretation of the prior art of Chen as noted below in the rejection of independent claim 1, specifically the interpretation of the claimed “circuit structure” as electrical contacts 17 and the claimed “shielding portion” as conductive layer 15 in Chen. Claim Rejections - 35 USC § 102 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claims 1-5, 7 and 9-10 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Chen et al. (US 2021/0287997 A1, hereinafter “Chen”). Regarding independent claim 1, Figure 1 of Chen discloses an electronic package, comprising: an encapsulating layer 12 (“dielectric layer”- ¶0036) having a first surface and a second surface opposing the first surface; an electronic element 13 (“electronic component”- ¶0034) embedded in the encapsulating layer 12; a shielding layer 10c2 (“conductive layer”, which is part of shielding structure SD2- ¶0041) formed on the first surface of the encapsulating layer 12 and covering the electronic element 13; a plurality of shielding pillars 11v (“conductive via”, which are part of shielding structure SD1- ¶0041) embedded in the encapsulating layer 12 and in communication with the first surface and the second surface to contact and connect the shielding layer 10c2; a circuit structure 17 (“electrical contacts”- ¶0027) formed on the second surface of the encapsulating layer 12 and electrically connected to the electronic element 13 (¶0037); and a shielding portion 15 (“conductive layer”, which is part of shielding structure SD1- ¶0041) formed on an underside of the circuit structure 17 and the second surface of the encapsulating layer 12, and connected to the plurality of shielding pillars 11v. Regarding claim 2, Figure 1 of Chen discloses the electronic package further comprising a bonding layer 11 (“dielectric layer… adhesive layer”- ¶0034) formed between the shielding layer 10c2 and the electronic element 13. Regarding claim 3, Figure 1 of Chen discloses wherein the shielding layer 10c2 is in indirect contact with the electronic element 13. Regarding claim 4, Figure 1 of Chen discloses wherein a width of each of the plurality of shielding pillars 11v is greater than a thickness of the shielding layer 10c2. Regarding claim 5, Figure 1 of Chen discloses wherein the electronic element 13 is surrounded by the plurality of shielding pillars 11v. Regarding claim 7, Figure 1 of Chen discloses wherein the shielding portion 15 is formed on side surfaces (i.e., bottom horizontal side surfaces) of the circuit structure 17. Regarding claim 9, Figure 1 of Chen discloses the electronic package further comprising an insulating protection layer 16 (“protecting layer”- ¶0038) covering at least part of the shielding portion 15. Regarding claim 10, Figure 1 of Chen discloses wherein a maximum width of the circuit structure 17 is less than a width of the second surface of the encapsulating layer 12. Allowable Subject Matter Claim 8 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. Regarding claim 8, the prior art of record including Chen, either singularly or in combination, does not disclose or suggest the combination of limitations including, but not limited to, “wherein the shielding portion is arranged obliquely relative to the second surface of the encapsulating layer”. Conclusion Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to JAY C CHANG whose telephone number is (571)272-6132. The examiner can normally be reached Mon- Fri 12pm-10pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Eliseo Ramos-Feliciano can be reached at (571)-272-7925. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /JAY C CHANG/Primary Examiner, Art Unit 2817
Read full office action

Prosecution Timeline

May 02, 2023
Application Filed
Feb 24, 2026
Non-Final Rejection mailed — §102
Apr 14, 2026
Response Filed
May 13, 2026
Final Rejection mailed — §102
Jul 13, 2026
Response after Non-Final Action

Precedent Cases

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

3-4
Expected OA Rounds
85%
Grant Probability
99%
With Interview (+14.1%)
2y 3m (~0m remaining)
Median Time to Grant
Moderate
PTA Risk
Based on 663 resolved cases by this examiner. Grant probability derived from career allowance rate.

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