DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Election/Restrictions
Applicant’s election without traverse of Group II in the reply filed on 10/3/2025 is acknowledged. Claims 1-15 and new Claims 21-25 are under consideration.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim 21 and 25 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Ervin et al (US 2011/0201161).
With respect to Claim 21, Ervin et al discloses a method for forming a semiconductor structure (Figures 4-9), comprising: forming an opening (Figure 4, 12) in a semiconductor body (Figure 4, 10), wherein the semiconductor body is p-type doped (paragraph 32); introducing n-type dopants (paragraph 32) into the semiconductor body to form a modified portion near the opening (above 54A, near top of 10, Figure 5); forming a dielectric layer (Figure 9, 70, paragraph 57) along sidewalls of the opening; and forming a conductive structure (Figure 9, 72, paragraph 57) over the dielectric layer to fill the opening. See Figures 4-9 and corresponding text, especially paragraphs 32-59.
With respect to Claim 25, Ervin et al discloses introducing an n-type dopant gas into the opening; and heating (application of energy) the semiconductor body so that the n-type dopants containing gas are introduced into the semiconductor body. See paragraphs 31-36.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claim 23 is rejected under 35 U.S.C. 103 as being unpatentable over Ervin et al (US 2011/0201161).
Ervin et al is relied upon as discussed above. Moreover, Ervin et al disclose a conductive layer (Figure 12, 74 ) and a dielectric layer (Figure 12, 20), where the opening extends through the dielectric layer and extends into the semiconductor body. See paragraphs 59 and 20 of Ervin et al.
However, Ervin does not explicitly disclose forming a plurality of dielectric layers and a plurality of conductive features over the semiconductor body, wherein the opening extends through the dielectric layers and extends into the semiconductor body (Claim 23).
It would have been obvious to one of ordinary skill in the art, before the effective date of the invention, to use multiple dielectric layers and conductive features, as duplication of parts for their known benefit id prima facie obvious. See In re Harza, 124 USPQ 378 (CCPA 1960).
Allowable Subject Matter
Claims 22 and 24 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Claims 1-15 are allowed.
The following is an examiner’s statement of reasons for allowance: The closest prior art known to the Examiner is listed on the enclosed PTO 892 and IDS forms.
With respect to Claims 1-10, none of the references anticipate or make obvious inter alia “forming an opening in a semiconductor body, wherein the semiconductor body is doped with first type dopants, and the semiconductor body is first-typed doped; introducing second-type dopants into the semiconductor body to form a modified portion near the opening, wherein the modified portion remains first-type doped”.
With respect to Claims 11-15, none of the references anticipate or make obvious inter alia “forming an opening in a semiconductor body, wherein the semiconductor body is p-type doped; Introducing n-type dopants into the semiconductor body to form a modified portion near the opening, wherein the modified portion is p-type doped”.
Any comments considered necessary by applicant must be submitted no later than the payment of the issue fee and, to avoid processing delays, should preferably accompany the issue fee. Such submissions should be clearly labeled “Comments on Statement of Reasons for Allowance.”
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to ALEXANDER G GHYKA whose telephone number is (571)272-1669. The examiner can normally be reached Monday-Friday 9-6.
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AGG
December 21, 2025
/ALEXANDER G GHYKA/Primary Examiner, Art Unit 2812