Prosecution Insights
Last updated: October 23, 2026
Application No. 18/319,507

PROBE CARD AND CALIBRATION METHOD FOR PROBER

Final Rejection §103
Filed
May 18, 2023
Priority
Apr 10, 2023 — TW 112113332
Examiner
MCDONNOUGH, COURTNEY G
Art Unit
2858
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
United Microelectronics Corp.
OA Round
4 (Final)
82%
Grant Probability
Favorable
5-6
OA Rounds
0m
Est. Remaining
99%
With Interview

Examiner Intelligence

Grants 82% — above average
82%
Career Allowance Rate
474 granted / 580 resolved
+13.7% vs TC avg
Strong +18% interview lift
Without
With
+17.9%
Interview Lift
resolved cases with interview
Typical timeline
2y 8m
Avg Prosecution
17 currently pending
Career history
613
Total Applications
across all art units

Statute-Specific Performance

§101
2.3%
-37.7% vs TC avg
§103
62.5%
+22.5% vs TC avg
§102
19.1%
-20.9% vs TC avg
§112
14.8%
-25.2% vs TC avg
Black line = Tech Center average estimate • Based on career data from 580 resolved cases

Office Action

§103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Continued Examination Under 37 CFR 1.114 A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 03/17/2026 has been entered. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim(s) 1 and 4- 14 are rejected under 35 U.S.C. 103 as being unpatentable over Lim et al. US 2020/0141976 A1 (hereinafter referred to as Lim) in view of Brewer et al. US 2024/0125817 A1 (hereinafter referred to as Brewer). Regarding claim 1, Lim discloses a probe card, comprising: a circuit board (fig. 2, PCB 212, par. [0019]); a base board (fig. 2, substrate 214, par. [0019]), disposed on the circuit board, wherein the base board includes at least three probe regions (fig. 6, regions 602, 604, 606 and 608, par. [0023]); and a plurality of probing tips (fig. 6, one or more probe tips in regions 602, 604, 606 and 608 are used for testing for planarity, par. [0023]), only disposed on the base board in the at least three probe regions and electrically connected with the circuit board (par. [0019]). Lim does not disclose each of the at least three probe regions disposed at corresponding corner of the base board. Brewer discloses each of the at least three probe regions (fig. 3, 4, multiple tilt angle sensors 172, par. [0054]) disposed at corresponding corner (see fig. 4, first group of the plurality of test patterns are disposed around a periphery of the device-under-test, par. [0012], [0057]) of the base board (fig. 3, 4, 160 , par. [0052]). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to (provide probe device includes a plurality of tilt angle sensors, measure a number of connections formed between the tilt angle sensors and the test patterns, determine a first offset angle and a second offset angle between the device-under-test and the probe device based on the number of connections ), as taught in Brewer in modifying the apparatus of Lim. The motivation would be to change a parallelism between the surface of the device-under-test if necessary to calibrate the probe system. (see Brower: par. [0013]). Regarding claim 4, Lim and Brewer discloses the claimed invention except for an area of the base board is between 4 cm2 and 4,356 cm2. It would have been obvious to one having ordinary skill in the art at the time the invention was made to provide a base board with an area between 4 cm2 and 4,356 cm2, since it has been held that where the general conditions of a claim are disclosed in the prior art, discovering the optimum or workable ranges involves only routine skill in the art. In re Aller, 105 USPQ 233 (CCPA 1955). Regarding claims 5 and 6: the shape of the shape of the base board is quadrilateral or square, absent any criticality, are only considered to be obvious modifications of the shape of base board disclosed by Lim as the courts have held that a change in shape or configuration, without any criticality, is within the level of skill in the art as the particular shape claimed by Applicant is nothing more than one of numerous shapes that a person having ordinary skill in the art will find obvious to provide using routine experimentation based on its suitability for the intended use of the invention. See In re Dailey, 149 USPQ 47 (CCPA 1976) and MPEP 2144.04. Regarding claim 7, Lim discloses the probe card according to claim 1, wherein each of the at least three probe regions (fig. 6, regions 602, 604, 606 and 608, par. [0023]) includes at least two probing tips of the plurality of probing tips (fig. 6, one or more probe tips in regions 602, 604, 606 and 608 are used for testing for planarity, par. [0023]). Regarding claim 8, Lim discloses the probe card according to claim 7, Lim discloses wherein one of the at least two probing tips in each of the at least three probe regions is grounded (fig. 7, par. [0014], [0024]). Regarding claim 9, Lim discloses a calibration method for a prober (fig. 2, 4, prober stage 205, par. [0022]), comprising: providing a first probe card (fig. 2, probe card, par. [0019]), wherein the first probe card comprises: a circuit board (fig. 2, PCB 212, par. [0019]); a base board (fig. 2, substrate 214, par. [0019]), disposed on the circuit board, wherein the base board includes at least three probe regions (fig. 6, regions 602, 604, 606 and 608, par. [0023]); and a plurality of first probing tips (fig. 8, blk. 802, par. [0026]) (fig. 2, probes 218 extending from the substrate 214 to probe tips, par. [0019]), only disposed on the base board in the at least three probe regions and electrically connected with the circuit board (par. [0019]), wherein the each of the at least three probe regions includes at least two first probing tips of the plurality of first probing tips (fig. 6, one or more probe tips in regions 602, 604, 606 and 608 are used for testing for planarity, par. [0023]), (fig. 8, blk. 802, par. [0026]); and performing a planarity calibration process (fig. 1-8, planarity testing, par. [0023]-[0028]) on the prober through the first probe card based on a plurality of first test signals corresponding to the plurality of first probing tips (fig. 8, blk. 802, par. [0026]-[0028]). Lim does not disclose each of the at least three probe regions disposed at corresponding corner of the base board. Brewer discloses each of the at least three probe regions (fig. 3, 4, multiple tilt angle sensors 172, par. [0054]) disposed at corresponding corner (see fig. 4, first group of the plurality of test patterns are disposed around a periphery of the device-under-test, par. [0012], [0057]) of the base board (fig. 3, 4, 160 , par. [0052]). The references are combined for the same reason already applied in the rejection of claim 1. Regarding claim 10, Lim discloses the calibration method for the prober according to claim 9, Lim discloses wherein the step of performing the planarity calibration process (fig. 8, blk. 802-808, par. [0026]-[0028]) on the prober (fig. 2, 4, prober stage 205, par. [0022]), though the first probe card (fig. 2, probe card, par. [0019]) based on the plurality of first test signals corresponding to the plurality of first probing tips includes (fig. 4, 7, first plurality of test probe, par. [0026]) (fig. 8, blk. 802, par. [0026]): performing a first test step to obtain a first set of the first test signals of the plurality of first test signals (fig. 8, blk. 802-806, par. [0026]); and adjusting a planarity of the prober based on the first set of the first test signals of the plurality of first test signals (fig. 8, blk. 808, par. [0026]-[0027]). Regarding claim 11, Lim discloses the calibration method for the prober according to claim 10, Lim discloses wherein the step of performing the planarity calibration process (fig. 8, blk. 802-808, par. [0026]-[0028]) on the prober (fig. 2, 4, prober stage 205, par. [0022]), though the first probe card (fig. 2, probe card, par. [0019]) based on the plurality of first test signals (fig. 8, blk. 802-806, par. [0026]) corresponding to the plurality of first probing tips(fig. 6, one or more probe tips in regions 602, 604, 606 and 608 are used for testing for planarity, par. [0023]) (fig. 8, blk. 802, par. [0026]) further includes: performing a second test step to obtain a second set of the first test signals of the plurality of first test signals to confirm the planarity of the prober (determining whether the second plurality of test probes has a proper contact with the wafer based upon signals received by the second plurality of test probes, par. [0005], [0026]). Regarding claim 12, Lim discloses the calibration method for the prober according to claim 11, Lim discloses wherein during the first test step and the second test step, the plurality of first probing tips (fig. 6, one or more probe tips in regions 602, 604, 606 and 608 are used for testing for planarity, par. [0023]) (fig. 8, blk. 802, par. [0026]) in the first probe card (fig. 2, probe card, par. [0019]), are in contact with an object under test on a chuck of the prober (fig. 8, blk. 802-806, par. [0026]). Regarding claim 13, Lim discloses the calibration method for the prober according to claim 9, Lim discloses wherein the plurality of first test signals (fig. 4, 7, second plurality of test probe, par. [0018], [0026]) are provided by a tester (fig. 2, 7, control circuit 207, par. [0018], [0026]) electrically connected with the first probe card (fig. 2, probe card, par. [0019]). Regarding claim 14, Lim discloses the calibration method for the prober according to claim 9, Lim discloses wherein the plurality of first test signals (fig. 8, blk. 802-806, par. [0026]) are open-short signals (par. [0025]). Claim 2 is rejected under 35 U.S.C. 103 as being unpatentable over Lim as in view of Brewer applied to claim 1 above, and further in view of Tunaboylu US 2009/0184725 A1. Regarding claim 2, Lim and Brewer discloses the probe card according to claim 1, Lim does not disclose wherein a material of the base board includes an insulating material. Tunaboylu discloses wherein a material of the base board includes an insulating material (fig. 4, substrate 402, par. [0036]). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to provide a substrate in made from ceramic material, as taught in Tunaboylu in modifying the apparatus of Lim and Brewer. The motivation would be to provide electric and thermal insulation. Claim 3 is rejected under 35 U.S.C. 103 as being unpatentable over Lim in view of Brewer in view of Tunaboylu as applied to claim 1 above, and further in view of US 2004/0245628 A1. Regarding claim 3, Lim, Brewer and Tunaboylu discloses the probe card according to claim 2, Lim and Tunaboylu do not disclose wherein the insulating material includes polyimide or epoxy resin. Chung discloses wherein the insulating material includes polyimide or epoxy resin (fig. 3, base substrate, par. [0031]). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to provide base substrate made of made of polyimide or epoxy-based resin, as taught in Chung in modifying the apparatus of Lim, Brewer and Tunaboylu, The motivation would be to provide flexibility to base substrate (see Chung: par. [0014]). Claim 15 is rejected under 35 U.S.C. 103 as being unpatentable over Lim in view of Brewer as applied to claim 9 above, and further in view of Olmstead US 2015/0054534 A1. Regarding claim 15, Lim discloses the calibration method for the prober according to claim 9, wherein after performing the planarity calibration process (fig. 8, blk. 802-808, par. [0026]-[0028]), the method further includes. Lim does not disclose providing a second probe card, including a plurality of second probing tips; and performing a third test step to obtain a plurality of second test signals corresponding to the plurality of second probing tips to perform a planarity verification process on the prober. Olmstead discloses providing a second probe card (fig. 6, extra probe card 506, par. 0047]), including a plurality of second probing tips (fig. 8, probes 510, par. [0048); and performing a third test step to obtain a plurality of second test signals corresponding to the plurality of second probing tips to perform a planarity verification process on the prober (fig. 9, par. [0053]-[0057]). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to provide a probe card analyzer that does not include a probe card interface, as taught in Olmstead in modifying the apparatus of Lim and Brewer. The motivation would be , review and repair of the probe card may require only a limited number or type of more mechanically oriented tests which can be carried out without need for the highly complex and costly probe card interface mechanisms (see Olmstead: par. [0047]). Conclusion Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to COURTNEY G MCDONNOUGH whose telephone number is (571)272-6552. The examiner can normally be reached M-F 8 am-5 pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, EMAN ALKAFAWI can be reached at (571) 272-4448. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /COURTNEY G MCDONNOUGH/Examiner, Art Unit 2858 /EMAN A ALKAFAWI/Supervisory Patent Examiner, Art Unit 2858 4/16/2026
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Prosecution Timeline

Show 1 earlier event
Jun 20, 2025
Non-Final Rejection mailed — §103
Sep 17, 2025
Response Filed
Dec 19, 2025
Final Rejection mailed — §103
Mar 17, 2026
Request for Continued Examination
Mar 24, 2026
Response after Non-Final Action
Apr 21, 2026
Non-Final Rejection mailed — §103
Jul 17, 2026
Response Filed
Oct 19, 2026
Final Rejection mailed — §103 (current)

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Prosecution Projections

5-6
Expected OA Rounds
82%
Grant Probability
99%
With Interview (+17.9%)
2y 8m (~0m remaining)
Median Time to Grant
High
PTA Risk
Based on 580 resolved cases by this examiner. Grant probability derived from career allowance rate.

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