DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Continued Examination Under 37 CFR 1.114
A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 6.17.2026 has been entered.
Double Patenting
The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969).
A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b).
The filing of a terminal disclaimer by itself is not a complete reply to a nonstatutory double patenting (NSDP) rejection. A complete reply requires that the terminal disclaimer be accompanied by a reply requesting reconsideration of the prior Office action. Even where the NSDP rejection is provisional the reply must be complete. See MPEP § 804, subsection I.B.1. For a reply to a non-final Office action, see 37 CFR 1.111(a). For a reply to final Office action, see 37 CFR 1.113(c). A request for reconsideration while not provided for in 37 CFR 1.113(c) may be filed after final for consideration. See MPEP §§ 706.07(e) and 714.13.
The USPTO Internet website contains terminal disclaimer forms which may be used. Please visit www.uspto.gov/patent/patents-forms. The actual filing date of the application in which the form is filed determines what form (e.g., PTO/SB/25, PTO/SB/26, PTO/AIA /25, or PTO/AIA /26) should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to www.uspto.gov/patents/apply/applying-online/eterminal-disclaimer.
Claims 9-10, 12 and 14-15 are rejected on the ground of nonstatutory double patenting as being unpatentable over claims 13 and 15 (Note: claim 15 depends from claim 13) of U.S. Patent No. US 10553476 B2.
Regarding claim 10, claims 13 and 15 of US 10553476 B2 anticipate claim 10 and disclose a semiconductor device comprising:
a first polysilicon structure (“a first polysilicon structure”);
a first barrier layer over the first polysilicon structure (“a first barrier layer over the first polysilicon structure”), wherein the first barrier layer comprises
a central region having a uniform thickness (“the first barrier layer has a first thickness at a center region”; the first thickness is uniform over at least a portion of the center region); and
a peripheral region, wherein the peripheral region is closer to an edge of the semiconductor device than the central region (“the first barrier layer has a second thickness at a peripheral region of the first barrier layer”; a peripheral region being closer to an edge is inherent by the disclosure of central and peripheral regions);
a second polysilicon structure over the first barrier layer (“a second polysilicon structure over the first barrier layer”); and
dopants in each of the first polysilicon structure and the second polysilicon structure, wherein a uniformity of a distribution of dopants in the first polysilicon structure is less than a uniformity of a distribution of dopants in the second polysilicon structure (“wherein the distribution of dopants in the second polysilicon structure is more uniform than the distribution of dopants in the first polysilicon structure”).
Regarding claim 9, claims 13 and 15 of US 10553476 B2 anticipate claim 9 inherently since dopants are known to accumulate along grain boundaries.
Regarding claim 12, claims 13 and 15 of US 10553476 B2 anticipate claim 12 and disclose wherein less than an entirety of the first barrier layer has the uniform thickness (“the second thickness is different from the first thickness”; the first thickness is uniform over at least a portion of the central portion).
Regarding claim 14, claims 13 and 15 of US 10553476 B2 anticipate claim 14.
Regarding claim 15, claims 13 and 15 of US 10553476 B2 anticipate claim 15 inherently since grain size is known to be coupled to uniformity of dopant distribution.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 26-27 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Regarding claims 26-27, “the semiconductor device of claim 22, wherein the (first?) dopants are along grain boundaries in the first polysilicon structure” (claim 26) and “the semiconductor device of claim 22, wherein the (second?) dopants are along grain boundaries in the second polysilicon structure” (claim 27) are both indefinite because “the dopants” in each of the claims lacks proper antecedent basis wherein it is noted that base claim 22 has “first dopants” and “second dopants” wherein it is isn’t clear what “the dopants” refers to. Examiner’s suggestions are included in parenthesis.
Claim Rejections - 35 USC § 102
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 9-11 and 15 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Beintner et al. (of record, US 6967384 B2).
Regarding claim 10, Beintner discloses (inverted or upside-down Fig. 3) a semiconductor device comprising:
a first polysilicon structure (140 “polysilicon 140”);
a first barrier layer (130) over the first polysilicon structure, wherein the first barrier layer comprises
a central region (center) having a uniform thickness (inverted or upside-down Fig. 3); and
a peripheral region (periphery), wherein the peripheral region is closer to an edge of the semiconductor device than the central region (inverted or upside-down Fig. 3);
a second polysilicon structure (125 “polysilicon layer 125”) over the first barrier layer; and
dopants in each of the first polysilicon structure and the second polysilicon structure (“depending upon the dopants used”), wherein a uniformity of a distribution of dopants in the first polysilicon structure (140) is less than a uniformity of a distribution of dopants in the second polysilicon structure (125, “Another problem is that the diffusion of dopants in these "large-grain" polysilicon gates will probably be mostly through lattice diffusion (similar to that of crystalline silicon) which is relatively slow (e.g., typically about a factor of 10 slower than diffusion for polysilicon) and sufficient dopant may not reach the polysilicon/oxide interface, where dopant is also needed to prevent polysilicon depletion effects” and “the small grain size facilitates dopant diffusion and reduces polysilicon depletion”. 125 has a smaller grain size than 140 and dopant distribution is inherently less uniform in 140 with a greater grain size. Examiner’s position is additionally supported by applicant admission at [0015]).
Regarding claim 9, Beintner the semiconductor device of claim 10, wherein the dopants are along grain boundaries in the first polysilicon structure (140, “Another problem is that the diffusion of dopants in these "large-grain" polysilicon gates will probably be mostly through lattice diffusion (similar to that of crystalline silicon) which is relatively slow (e.g., typically about a factor of 10 slower than diffusion for polysilicon) and sufficient dopant may not reach the polysilicon/oxide interface, where dopant is also needed to prevent polysilicon depletion effects”. 140 is a large-grain polysilicon which has dopants and wherein dopants are known to inherently accumulate along grain boundaries).
Regarding claim 11, Beintner discloses the semiconductor device of claim 10, wherein the peripheral region of the first barrier layer (130) has the uniform thickness (inverted or upside-down Fig. 3).
Regarding claim 15, Beintner discloses wherein the first polysilicon structure has a first grain size (“The grain size here (e.g., of polysilicon 140) can be different (e.g., typically within a range of about 30 nm to about 80 nm”), the second polysilicon structure has a second grain size (“125 illustrates the small grain (about 10-20 nm grain size)””) smaller than the first grain size.
Allowable Subject Matter
Claims 1-2, 5-8 and 21-25 are allowed.
The following is a statement of reasons for the indication of allowable subject matter: the prior art of record fails to disclose or suggest (claim 1) the peripheral region has the non-uniform thickness, and a thickness of the peripheral region increases as a distance from the edge of the semiconductor device decreases as recited within the context of the claim; claims 2, 5-8 and 21 depend from claim 21, and (claim 22) first dopants in each of the first polysilicon structure and the second polysilicon structure; and second dopants in the first barrier layer, wherein a species of the second dopants is different from a species of the first dopants as recited within the context of the claim; claims 23-25 depend from claim 22.
Claim 13 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter: the prior art of record fails to disclose or suggest (claim 13) wherein the peripheral region of the first barrier layer has a non-uniform thickness.
Claims 26-27 would be allowable if rewritten to overcome the rejection(s) under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), 2nd paragraph, set forth in this Office action in view of their dependency to allowable basis claim 22.
Response to Arguments
Applicant's arguments filed 5.15.2026 have been fully considered but they are not persuasive.
The applicant alleges that claim 10 is not subject to a double patenting rejection because it recites “a central region having an uniform thickness”. This is not persuasive as claims 13 and 15 of US 10553476 B2 disclose a central region having a uniform thickness (“the first barrier layer has a first thickness at a center region”; the first thickness is uniform over at least a portion of the center region).
The applicant alleges that claim 10 should be allowed because it recites “a central region having an uniform thickness” from previously objected claim 5. First, claim 5 was not a dependent of claim 10 and second, Beintner et al. (of record, US 6967384 B2) discloses (inverted or upside-down Fig. 3) a central region (center) having a uniform thickness (inverted or upside-down Fig. 3).
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to ANDRES MUNOZ whose telephone number is (571)270-3346. The examiner can normally be reached 8AM-5PM Central Time.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Eva Montalvo can be reached at (571)270-3829. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/Andres Munoz/Primary Examiner, Art Unit 2818
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