Prosecution Insights
Last updated: April 19, 2026
Application No. 18/322,882

SEMICONDUCTOR DEVICE INCLUDING POLYSILICON STRUCTURES AND METHOD OF MAKING

Final Rejection §102§103§112§DP
Filed
May 24, 2023
Examiner
MUNOZ, ANDRES F
Art Unit
2818
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Taiwan Semiconductor Manufacturing Company Ltd.
OA Round
3 (Final)
76%
Grant Probability
Favorable
4-5
OA Rounds
2y 4m
To Grant
94%
With Interview

Examiner Intelligence

Grants 76% — above average
76%
Career Allow Rate
541 granted / 707 resolved
+8.5% vs TC avg
Strong +18% interview lift
Without
With
+17.8%
Interview Lift
resolved cases with interview
Typical timeline
2y 4m
Avg Prosecution
36 currently pending
Career history
743
Total Applications
across all art units

Statute-Specific Performance

§101
0.5%
-39.5% vs TC avg
§103
43.7%
+3.7% vs TC avg
§102
28.6%
-11.4% vs TC avg
§112
21.5%
-18.5% vs TC avg
Black line = Tech Center average estimate • Based on career data from 707 resolved cases

Office Action

§102 §103 §112 §DP
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Objections Claim 10 is objected to because of the following informalities: “dopants in each of the first polysilicon structure” should read -- dopants in each of the first and second polysilicon structures-- or similar. Appropriate correction is required. Double Patenting The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969). A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b). The filing of a terminal disclaimer by itself is not a complete reply to a nonstatutory double patenting (NSDP) rejection. A complete reply requires that the terminal disclaimer be accompanied by a reply requesting reconsideration of the prior Office action. Even where the NSDP rejection is provisional the reply must be complete. See MPEP § 804, subsection I.B.1. For a reply to a non-final Office action, see 37 CFR 1.111(a). For a reply to final Office action, see 37 CFR 1.113(c). A request for reconsideration while not provided for in 37 CFR 1.113(c) may be filed after final for consideration. See MPEP §§ 706.07(e) and 714.13. The USPTO Internet website contains terminal disclaimer forms which may be used. Please visit www.uspto.gov/patent/patents-forms. The actual filing date of the application in which the form is filed determines what form (e.g., PTO/SB/25, PTO/SB/26, PTO/AIA /25, or PTO/AIA /26) should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to www.uspto.gov/patents/apply/applying-online/eterminal-disclaimer. Claims 1-2, 6-11 and 13-15 are rejected on the ground of nonstatutory double patenting as being unpatentable over claim 15 of U.S. Patent No. US 10553476 B2. Regarding claim 1, claim 15 of US 10553476 B2 implicitly anticipates claim 1 because claim 15 recites “ wherein the distribution of dopants in the second polysilicon structure is more uniform than the distribution of dopants in the first polysilicon structure” which is inherent to a smaller grain size and therefore inherently meets “the second polysilicon structure has a second grain size smaller than the first grain size” of clam 1. All other limitations of claim 1 are explicitly met. Regarding claim 2, claim 15 of US 10553476 B2 does not disclose “wherein the dopants are a same species in each of the first polysilicon structure and the second polysilicon structure”. Claim 15 requires dopants in each of the polysilicon structures and the dopant species can either be the same or different, wherein it would have been obvious to one of ordinary skill in the art, before the effective filing date, to select the same species according to device design characteristics and provide, e.g., a gate for a transistor and/or because the dopant species can either be the same or different and selecting one or the other would have yielded predictable results and falls within the ordinary capabilities of one skilled in the art. Regarding claim 6, claim 15 of US 10553476 B2 inherently anticipates claim 6 since dopants are known to accumulate along grain boundaries. Regarding claim 7, claim 15 of US 10553476 B2 anticipates claim 7. Regarding claim 8, claim 15 of US 10553476 B2 anticipates claim 8. Regarding claim 9, claim 15 of US 10553476 B2 inherent anticipates claim 9 since dopants are known to accumulate along grain boundaries. Regarding claim 10, claim 15 of US 10553476 B2 anticipates claim 10. Regarding claim 11, claim 15 of US 10553476 B2 anticipates claim 11. Regarding claim 13, claim 15 of US 10553476 B2 anticipates claim 13 since claim 15 requires two different thicknesses which discloses a non-uniform thickness. Regarding claim 14, claim 15 of US 10553476 B2 anticipates claim 14. Regarding claim 15, claim 15 of US 10553476 B2 inherently anticipates claim 15 since grain size is known to be coupled to uniformity of dopant distribution. Claim Rejections - 35 USC § 112 The following is a quotation of 35 U.S.C. 112(d): (d) REFERENCE IN DEPENDENT FORMS.—Subject to subsection (e), a claim in dependent form shall contain a reference to a claim previously set forth and then specify a further limitation of the subject matter claimed. A claim in dependent form shall be construed to incorporate by reference all the limitations of the claim to which it refers. The following is a quotation of pre-AIA 35 U.S.C. 112, fourth paragraph: Subject to the following paragraph [i.e., the fifth paragraph of pre-AIA 35 U.S.C. 112], a claim in dependent form shall contain a reference to a claim previously set forth and then specify a further limitation of the subject matter claimed. A claim in dependent form shall be construed to incorporate by reference all the limitations of the claim to which it refers. Claim 9 is rejected under 35 U.S.C. 112(d) or pre-AIA 35 U.S.C. 112, 4th paragraph, as being of improper dependent form for failing to further limit the subject matter of the claim upon which it depends, or for failing to include all the limitations of the claim upon which it depends. Applicant may cancel the claim(s), amend the claim(s) to place the claim(s) in proper dependent form, rewrite the claim(s) in independent form, or present a sufficient showing that the dependent claim(s) complies with the statutory requirements. Regarding claim 9, “The semiconductor device of claim 6, wherein the dopants are along grain boundaries in the first polysilicon structure” is already recited in base claim 6 as “wherein the dopants in each of the first polysilicon structure and the second polysilicon structure are located along grain boundaries”. Hence, claim 9 does not further limit claim 6. Claim Rejections - 35 USC § 102 and 35 USC § 103 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. (a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 10-12 and 14-15 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Beintner et al. (of record, US 6967384 B2). Regarding claim 10, Beintner discloses (inverted or upside-down Fig. 3) a semiconductor device comprising: a first polysilicon structure (140 “polysilicon 140”); a second polysilicon structure (125 “polysilicon layer 125”) over the first polysilicon structure; and dopants in each of the first polysilicon structure (“depending upon the dopants used”), wherein a uniformity of a distribution of dopants in the first polysilicon structure (140) is less than a uniformity of a distribution of dopants in the second polysilicon structure (125, “Another problem is that the diffusion of dopants in these "large-grain" polysilicon gates will probably be mostly through lattice diffusion (similar to that of crystalline silicon) which is relatively slow (e.g., typically about a factor of 10 slower than diffusion for polysilicon) and sufficient dopant may not reach the polysilicon/oxide interface, where dopant is also needed to prevent polysilicon depletion effects” and “the small grain size facilitates dopant diffusion and reduces polysilicon depletion”. 125 has a smaller grain size than 140 and dopant distribution is inherently less uniform in 140 with a greater grain size. Examiner’s position is additionally supported by applicant admission at [0015]). Regarding claim 11, Beintner discloses further comprising a first barrier layer (130) between the first polysilicon structure and the second polysilicon structure (inverted or upside-down Fig. 3). Regarding claim 12, Beintner discloses wherein the first barrier layer (130) has a uniform thickness (inverted or upside-down Fig. 3). Regarding claim 14, Beintner discloses wherein the dopants are in the first barrier layer (“not a dopant diffusion barrier” and “to cause dopants to reach the polysilicon/oxide interface” indicates that dopants are present throughout 125/130/140 inherently). Regarding claim 15, Beintner discloses wherein the first polysilicon structure has a first grain size (“The grain size here (e.g., of polysilicon 140) can be different (e.g., typically within a range of about 30 nm to about 80 nm”), the second polysilicon structure has a second grain size (“125 illustrates the small grain (about 10-20 nm grain size)””) smaller than the first grain size. Claims 10 and 15 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Fu et al. (of record, US 6991999 B2). Regarding claims 10 and 15, Fu discloses (claim 10) a semiconductor device (inverted of upside-down Figs. 3C-3D) comprising: a first polysilicon structure (308, “polycrystalline silicon film 308”); a second polysilicon structure (306, “polysilicon film 306”) over the first polysilicon structure; and dopants (316, “Dopants 316”) in each of the first polysilicon structure (inverted Fig. 3D), wherein a uniformity of a distribution of dopants in the first polysilicon structure (308) is less than (inverted Fig. 3D) a uniformity of a distribution of dopants in the second polysilicon structure (306), and (claim 15) wherein the first polysilicon structure (308) has a first grain size (“long columnar grain boundaries 311”), the second polysilicon structure (306) has a second grain size (“small and random grains 307”) smaller the first grain size (inverted Fig. 3C). Claim 13 is rejected under 35 U.S.C. 103 as being unpatentable over Beintner et al. (of record, US 6967384 B2) in view of Wilson et al. (of record, US 4682407 A). Regarding claim 13, Beintner fails to disclose wherein the first barrier layer (130) has a non-uniform thickness. Wilson discloses wherein the first barrier layer has a non-uniform thickness (note the depicted shape of 53b in Figs. 4A-4B which is interpreted as non-uniform per MPEP 2125). It would have been obvious to one of ordinary skill in the art to include the barrier as claimed in Beintner in view of Wilson before the effective filing date so as to achieve “controlling dopant migration in polycrystalline semiconductor layers during high temperature processing” per Wilson. Claims 1-3, 6 and 8-9 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Yew et al. (of record, US 6150251 A) Regarding claims 1-3, 6 and 8-9, Yew discloses (claim 1) a semiconductor device (Fig. 1C) comprising: a first polysilicon structure (104b), wherein the first polysilicon structure has a (one of many) first grain size (a singular grain selected to be the largest one in 104b, Fig 1C, MPEP 2125); a first barrier layer (106a) over the first polysilicon structure, wherein the first barrier layer has a non-uniform thickness (depicted in Fig. 1C, MPEP 2125); and a second polysilicon structure (108b) over the first barrier layer, wherein the second polysilicon structure has a (one of many) second grain size (a singular grain selected to be the smallest one in 108b, Fig 1C, MPEP 2125) smaller than the first grain size (the claim does not refer to average grain size, therefore, singular grain sizes of 104b and 108b meet the claim limitation per Fig. 1C and MPEP 2125); and dopants in each of the first polysilicon structure (104b) and the second polysilicon structure (108b, “An ion implantation step is performed in order to increase the conductivity of the first amorphous silicon layer 104 (140a), the polysilicon layer 106 (106a), and the second amorphous silicon layer 108 (108a), or the first polysilicon layer with a small grain size 104 (104a), the polysilicon layer 106 (106a), and the second polysilicon layer with a small grain size 108 (108a)”, (claim 2) wherein the dopants are a same species in each of the first polysilicon structure and the second polysilicon structure (“An ion implantation step is performed in order to increase the conductivity of the first amorphous silicon layer 104 (140a), the polysilicon layer 106 (106a), and the second amorphous silicon layer 108 (108a), or the first polysilicon layer with a small grain size 104 (104a), the polysilicon layer 106 (106a), and the second polysilicon layer with a small grain size 108 (108a)” discloses a single implantation step and common species are inherently disclosed), (claim 3) wherein the first barrier layer (106a as depicted in Fig. 1C, MPEP 2125) comprises: a central region (inner); and a peripheral region (outer), wherein the peripheral region is closer to an edge of the semiconductor device than the central region (Fig. 1C), and the peripheral region (and the central region both) has the non-uniform thickness (Fig. 1C, MPEP 2125), (claim 6) wherein the dopants in each of the first polysilicon structure and the second polysilicon structure are located along grain boundaries (“An ion implantation step is performed in order to increase the conductivity of the first amorphous silicon layer 104 (140a), the polysilicon layer 106 (106a), and the second amorphous silicon layer 108 (108a), or the first polysilicon layer with a small grain size 104 (104a), the polysilicon layer 106 (106a), and the second polysilicon layer with a small grain size 108 (108a)” wherein dopants are known to inherently accumulate along grain boundaries), (claim 8) wherein the dopants are in the first barrier layer (“An ion implantation step is performed in order to increase the conductivity of the first amorphous silicon layer 104 (140a), the polysilicon layer 106 (106a), and the second amorphous silicon layer 108 (108a), or the first polysilicon layer with a small grain size 104 (104a), the polysilicon layer 106 (106a), and the second polysilicon layer with a small grain size 108 (108a)”), and, (claim 9) wherein the dopants are along grain boundaries in the first polysilicon structure (inherent per applicant’s admission at [0015]). Allowable Subject Matter Claims 4-5 and 21 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. The following is a statement of reasons for the indication of allowable subject matter: the prior art of record fails to disclose or suggest (claim 4) “wherein a thickness of the peripheral region increases as a distance from the edge of the semiconductor device decreases”, (claim 5) “wherein the central region has a uniform thickness” and (claim 21) “further comprising dopants in the first barrier layer, wherein the dopants in the first barrier layer are different from the dopants in each of the first polysilicon structure and the second polysilicon structure”. Claims 22-25 are allowed. The following is a statement of reasons for the indication of allowable subject matter: the prior art of record fails to disclose or suggest (claim 22) first dopants in each of the first polysilicon structure and the second polysilicon structure; and second dopants in the first barrier layer, wherein a species of the second dopants is different from a species of the first dopants as recited within the context of the claim; claims 23-25 depend from claim 22. Response to Arguments Applicant's arguments filed 11/24/2025 have been fully considered but they are not persuasive. The applicant alleges that neither Beintner et al. (of record, US 6967384 B2) nor Fu et al. (of record, US 6991999 B2) disclose amended claim 10. This is not persuasive as, per the rejections above, the figures or Beintner and Fu are now inverted and meet claim 10. The applicant alleges against Yew et al. (of record, US 6150251 A) that: “Applicants respectfully submit that the shapes shown in Figure 1C are merely cartoon representations of many grains in elements 104b and 108b versus few grains in element 106b”. This is not persuasive because, per MPEP 2125 (“Drawings and pictures can anticipate claims if they clearly show the structure which is claimed”), different individual grain sizes are shown for 104b, 106a and 108b. “One of ordinary skill in the art would understand that there is no explicit or inherent disclosure in Yew which would support element 106b of Yew as including only four grains as depicted in Figure 1C”. This is not persuasive because MPEP 2125 clearly states “Drawings and pictures can anticipate claims if they clearly show the structure which is claimed”. “Yew explicitly uses a singular "grain size" when referring to the grain size of each of element 104b and element 108b. Therefore, the interpretation of Yew explicitly or inherently disclosing multiple grain sizes is not supported by the text in Yew”. This is not persuasive because, per MPEP 2125 (“Drawings and pictures can anticipate claims if they clearly show the structure which is claimed”), different individual grain sizes are shown for 104b, 106a and 108b. “Yew fails to explicitly or inherently disclose a grain size relationship between element 104b and element 108b”. This is not persuasive as per MPEP 2125 (“Drawings and pictures can anticipate claims if they clearly show the structure which is claimed”), different individual grain sizes are shown for 104b and 108b since the claim does not recite require a comparison between average grain size. PNG media_image1.png 504 812 media_image1.png Greyscale Conclusion Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to ANDRES MUNOZ whose telephone number is (571)270-3346. The examiner can normally be reached 8AM-5PM Central Time. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Eva Montalvo can be reached at (571)270-3829. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /Andres Munoz/Primary Examiner, Art Unit 2818
Read full office action

Prosecution Timeline

May 24, 2023
Application Filed
Oct 02, 2024
Non-Final Rejection — §102, §103, §112
Jan 10, 2025
Response Filed
Aug 20, 2025
Non-Final Rejection — §102, §103, §112
Nov 24, 2025
Response Filed
Mar 13, 2026
Final Rejection — §102, §103, §112 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

4-5
Expected OA Rounds
76%
Grant Probability
94%
With Interview (+17.8%)
2y 4m
Median Time to Grant
High
PTA Risk
Based on 707 resolved cases by this examiner. Grant probability derived from career allow rate.

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