DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 1-16, 21-24 is/are rejected under 35 U.S.C. 103 as being unpatentable over Song(USPGPUB DOCUMENT: 2021/0175199, hereinafter Song) in view of Lin (USPGPUB DOCUMENT: 2016/0322330, hereinafter Lin) and Zhao (USPGPUB DOCUMENT: 2022/0278056, hereinafter Zhao).
Re claim 1 Song discloses in Fig 13 a stacked semiconductor device, comprising: a first die(410); a second die(left/right 310) that is bonded(by way of 1120/1020/1124) to the first die(410); a third die(left/right 310) that is bonded(by way of 1120/1020/1124) to the first die(410);
Song does not disclose a heat dissipation component that is formed in one piece and that is bonded to the first die(410); wherein the heat dissipation component is spaced apart from the second die and the third die, wherein the heat dissipation component is adjacent to at least two edges of each of the second die(left/right 310) and the third die(left/right 310).
Lin discloses in Fig 1A/B a heat dissipation component(101/106)[0015,0034] that is formed in one piece and that is bonded to the first die(102); wherein the heat dissipation component is adjacent to at least two edges of each of the second die(left/right 104) and the third die(left/right 104).
It would have been obvious to one of ordinary skill in the art before the effective filling date of the invention to apply the teachings of Lin to the teachings of Song in order to in order to reduce CTE mismatch and improve the warpage profile of the resulting package [0015, Lin].
Song does not disclose wherein the heat dissipation component is spaced apart from the second die and the third die,
Zhao discloses in Fig 12 wherein the heat dissipation component(3)[0046] is spaced apart(by way of 4)[0070] from the second die(21/22) and the third die(21/22),
It would have been obvious to one of ordinary skill in the art before the effective filling date of the invention to apply the teachings of Zhao to the teachings of Song in order to in order to improve reliability and service life of a chip package, enhance board-level reliability, and increase a chip package size [0005, Zhao].
Re claim 2 Song, Lin and Zhao disclose the stacked semiconductor device according to claim 1, wherein the heat dissipation component(101/106)[0015,0034 of Lin] includes a semiconductor material(Silicon)[0013].
Re claim 3 Song, Lin and Zhao disclose the stacked semiconductor device according to claim 1, wherein the heat dissipation component(101/106)[0015,0034 of Lin] includes a covering portion that covers at least one of the second die(left/right 310) or the third die(left/right 310).
Re claim 4 Song, Lin and Zhao disclose the stacked semiconductor device according to claim 1, wherein the heat dissipation component(101/106)[0015,0034 of Lin] surrounds the second die(left/right 310) and the third die(left/right 310), and is formed with a first space that accommodates the second die(left/right 310), and a second space that accommodates the third die(left/right 310); and wherein the first space and the second space spatially communicate with each other.
Re claim 5 Song, Lin and Zhao disclose the stacked semiconductor device according to claim 1, wherein the heat dissipation component(101/106)[0015,0034 of Lin] laterally surrounds each of the second die(left/right 310) and the third die(left/right 310).
Re claim 6 Song, Lin and Zhao disclose the stacked semiconductor device according to claim 1, further comprising a material disposed between the heat dissipation component(101/106)[0015,0034 of Lin] and each of the second die(left/right 310) and the third die(left/right 310).
Re claim 7 Song, Lin and Zhao disclose the stacked semiconductor device according to claim 6, wherein the heat dissipation component(101/106)[0015,0034 of Lin] includes a covering portion that covers at least one of the second die(left/right 310) or the third die(left/right 310), and the material disposed between the heat dissipation component(101/106)[0015,0034 of Lin] and each of the second die(left/right 310) and the third die(left/right 310) has a first extending portion that extends through the covering portion.
Re claim 8 Song, Lin and Zhao disclose the stacked semiconductor device according to claim 7, wherein the material disposed between the heat dissipation component(101/106)[0015,0034 of Lin] and each of the second die(left/right 310) and the third die(left/right 310) has a second extending portion that is spaced apart from the first extending portion, and that extends through one of the covering portion and a sidewall of the heat dissipation component(101/106)[0015,0034 of Lin].
Re claim 9 Song, Lin and Zhao disclose the stacked semiconductor device according to claim 6, wherein the material disposed between the heat dissipation component(101/106)[0015,0034 of Lin] and each of the second die(left/right 310) and the third die(left/right 310) includes a two-dimensional material.
Re claim 10 Song discloses in Fig 13 a stacked semiconductor device, comprising: a first die(410); a second die(left/right 310) bonded to the first die(410);
Song does not disclose a heat dissipation cap component bonded to the first die(410), and a heat dissipation cap component bonded to the first die, spaced apart from the second die and covering the second die(left/right 310); wherein the heat dissipation cap component has a thermal conductivity greater than a thermal conductivity of SiO2.
Lin discloses in Fig 1A/B a heat dissipation cap component(101/106)[0015,0034] bonded to the first die(102), and covering the second die(left/right 104); wherein the heat dissipation cap component has a thermal conductivity greater than a thermal conductivity of SiO2[0013].
It would have been obvious to one of ordinary skill in the art before the effective filling date of the invention to apply the teachings of Lin to the teachings of Song in order to in order to reduce CTE mismatch and improve the warpage profile of the resulting package [0015, Lin].
Song and Lin does not disclose a heat dissipation cap component bonded to the first die, spaced apart from the second die, and covering the second die.
Zhao discloses in Fig 12 a heat dissipation cap component(3)[0046](since 3 is on top or covers, this may be interpreted as a heat dissipation cap component) bonded(by way of 4)[0070] to the first die(21/22), spaced apart from the second die(21/22), and covering the second die(21/22).
It would have been obvious to one of ordinary skill in the art before the effective filling date of the invention to apply the teachings of Zhao to the teachings of Song in order to in order to improve reliability and service life of a chip package, enhance board-level reliability, and increase a chip package size [0005, Zhao].
Re claim 11 Song, Lin and Zhao disclose the stacked semiconductor device according to claim 10, wherein the heat dissipation cap component(101/106)[0015,0034 of Lin] includes single-crystal silicon[0013].
Re claim 12 Song, Lin and Zhao disclose the stacked semiconductor device according to claim 10, further comprising a glue material disposed between the second die(left/right 310) and the heat dissipation cap component(101/106)[0015,0034 of Lin].
Re claim 13 Song, Lin and Zhao disclose the stacked semiconductor device according to claim 10, wherein the heat dissipation cap component(101/106)[0015,0034 of Lin] includes a covering portion disposed over the second die(left/right 310), and the covering portion is formed with a through hole over the second die(left/right 310).
Re claim 14 Song, Lin and Zhao disclose the stacked semiconductor device according to claim 13, wherein the heat dissipation cap component(101/106)[0015,0034 of Lin] is formed with an opening in one of the covering portion and a side surface of the heat dissipation cap component(101/106)[0015,0034 of Lin], and the opening is in spatial communication with the through hole through a space where the second die(left/right 310) is disposed.
Re claim 15 Song, Lin and Zhao disclose the stacked semiconductor device according to claim 10, further comprising a third die(left/right 310) bonded to the first die(410), and another heat dissipation cap component(101/106)[0015,0034 of Lin] bonded to the first die(410) and covering the third die(left/right 310); wherein the heat dissipation cap component(101/106)[0015,0034 of Lin] and the another heat dissipation cap component(101/106)[0015,0034 of Lin] are spaced apart from each other.
Re claim 16 Song, Lin and Zhao disclose the stacked semiconductor device according to claim 10, further comprising a third die(left/right 310) bonded to the first die(410), wherein the heat dissipation cap component(101/106)[0015,0034 of Lin] is formed in one piece and further covers the third die(left/right 310).
Re claim 21 Song discloses in Fig 13 a stacked semiconductor device, comprising: a first die(410); a second die(left/right 310) bonded to the first die(410);
Song does not disclose a heat dissipation cap component bonded to the first die, spaced apart from the second die, and having a recess that opens to the first die(410) and that accommodates the second die(left/right 310); wherein the heat dissipation cap component has a thermal conductivity greater than a thermal conductivity of SiO2.
Lin discloses in Fig 1A/B a heat dissipation cap component(101/106)[0015,0034] bonded to the first die(102), and having a recess(recess of 102/104) that opens to the first die(102) and that accommodates the second die(left/right 104); wherein the heat dissipation cap component has a thermal conductivity greater than a thermal conductivity of SiO2[0013].
It would have been obvious to one of ordinary skill in the art before the effective filling date of the invention to apply the teachings of Lin to the teachings of Song in order to in order to reduce CTE mismatch and improve the warpage profile of the resulting package [0015, Lin].
Song does not disclose a heat dissipation cap component bonded to the first die, spaced apart from the second die,
Zhao discloses in Fig 12 a heat dissipation cap component(3)[0046](since 3 is on top or covers, this may be interpreted as a heat dissipation cap component) bonded(by way of 4)[0070] to the first die(21/22), spaced apart from the second die(21/22),
It would have been obvious to one of ordinary skill in the art before the effective filling date of the invention to apply the teachings of Zhao to the teachings of Song in order to in order to improve reliability and service life of a chip package, enhance board-level reliability, and increase a chip package size [0005, Zhao].
Re claim 22 Song, Lin and Zhao disclose the stacked semiconductor device according to claim 21, further comprising a first glue feature that is made of a mixture of an organic material and a thermal conductive substance, and that is disposed in the recess and between the second die(left/right 310) and the heat dissipation cap component(101/106)[0015,0034 of Lin], wherein the thermal conductive substance has a thermal conductivity ranging from 4400 W/(m-K) to 5800 W/(m-K)[0013].
Re claim 23 Song, Lin and Zhao disclose the stacked semiconductor device according to claim 22, wherein a portion of the first glue feature extends through the heat dissipation cap component(101/106)[0015,0034 of Lin] along a direction away from the first die(410).
Re claim 24 Song, Lin and Zhao disclose the stacked semiconductor device according to claim 22, further comprising a second glue feature that is made of the mixture, and that is disposed on an outer sidewall of the heat dissipation cap component(101/106)[0015,0034 of Lin].
Response to Arguments
Applicant’s arguments with respect to claim(s) 1-16, 21-24 have been considered but are moot because the arguments do not apply to any of the references being used in the current rejection.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
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/PATRICIA D VALENZUELA/Primary Examiner, Art Unit 2812
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