DETAILED ACTION
This Office Action is in response to a Non-Final, filed on 07/29/2026. Claims 16-20 are presented for examination consideration.
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Arguments
The Examiner is in agreement with Applicant's Arguments (filed on 07/29/2026) with respect to the reference of Chen and the use of “metal connection layer 7 as a thru-hole of the ceramic block 4” in independent claims 1.
Nevertheless, Applicant’s Arguments to the rejection of claims based on 102 rejections are moot in view of new grounds of second Non-Final rejection.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries set forth in Graham v. John Deere Co., 383 U.S. 1, 148 USPQ 459 (1966), that are applied for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claims 16, 17, 18, and 19 are rejected under 35 U.S.C. 103 as being unpatentable over Chen et al. (CN114698255A and Chen hereinafter), in view of Chi et al. (US12,010,416B1 and Chi hereinafter).
Regarding claim 16, Chen discloses a circuit board (Fig. 8 and ¶[n0041 & n0108] from Espacenet Translation shows and indicates a circuit board of Fig. 8 {flowchart of the fabrication process of the third type of printed circuit board}), comprising: a substrate, comprising an opening (items 1, 11 of Fig. 8 and claim 1 & ¶[n0046_0050_n0055-n0056_n0095_n0105 & n0114] from Espacenet Translation shows and indicates circuit board of Fig. 8 is comprised of substrate 1 {core board 1} that is comprised of an opening 11 {through hole 11}); a ceramic substrate, disposed in the opening (items 4 of Fig. 8 & Fig. 5 and claims 1-2_8-9 & ¶[n0046_n0049 & n0051] from Espacenet Translation shows and indicates ceramic substrate 4 {ceramic block 4} that is disposed in opening 11); an adhesive layer, disposed between the substrate and the ceramic substrate (item 3 of Fig. 8 and claim 1 & ¶[n0046-n0047] from Espacenet Translation shows and indicates adhesive layer 3 disposed between substrate 1 and ceramic substrate 4); and a circuit layer, disposed on the substrate and the ceramic substrate, wherein the substrate, the ceramic substrate, and the adhesive layer are substantially coplanar with each other (item 2 of Fig. 8 and claims 1_5 & ¶[n0050_n0055_n0082-n0083 & n0116] from Espacenet Translation shows and indicates circuit layer 2 that is disposed on substrate 1 and ceramic substrate 4; where substrate 1, ceramic substrate 4, and adhesive layer 3 are substantially coplanar with each other).
However, Chen does not explicitly disclose wherein substrate, comprising an opening; a ceramic substrate, disposed in the opening, and comprising a plurality of through holes.
Shi discloses wherein substrate, comprising an opening; a ceramic substrate, disposed in the opening, and comprising a plurality of through holes (items 602, 620 of Fig. 6C and 10:18-32 shows and indicates where substrate 620 {bulk molding compound [BMC] 620}, comprising opening 620-embedding-602 {ceramic substrate embedded in the bulk molding compound 620}; and where ceramic substrate 602 is disposed in opening 620-embedding-602; and where ceramic substrate 602 is comprised of a plurality of through holes).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to incorporate wherein substrate, comprising an opening; a ceramic substrate, disposed in the opening, and comprising a plurality of through holes into the structure of Chen. One would have been motivated in the circuit board of Chen and have the substrate be comprised of an opening, where the ceramic substrate disposed in the opening, and where the ceramic substrate is comprised of a plurality of through holes, in order to provide signal connection to and from the components through the ceramic substrate, as shown in Fig. 6C of Shi, in the circuit board of Chen.
Regarding claim 17, modified Chen discloses a circuit board, wherein the substrate comprises the circuit layer (Shi: item 600 of Fig. 6C and abstract & 10:27-32 shows and indicates where substrate 620 is further comprised redistribution layer 600 connected to the circuit layer that is connecting to the components, as shown in Fig. 6C).
Regarding claim 18, modified Chen discloses a circuit board, further comprising: a bonding layer, disposed between the circuit layer and the substrate and disposed between the circuit layer and the ceramic substrate (Chen: item 5 of Fig. 8 and claims 5-6 & ¶[n0046_n0050_n0055-n0056_n0082-n0083_n0095_n0105_n0114 & n0116] from Espacenet Translation shows and indicates circuit board of Fig. 8 is further comprised of bonding layer 5 {chemical plating process bonding of metal seed layer 5} that is disposed between circuit layer 2 and substrate 1 and disposed between circuit layer 2 and ceramic substrate 4).
Regarding claim 19, modified Chen discloses a circuit board, wherein the bonding layer is coplanarly extended across the substrate, the ceramic substrate, and the adhesive layer (Chen: Fig. 8 and claims 5-6 & ¶[n0046-n0047_n0050_n0055-n0056_n0082-n0083_n0095_n0105_n0114 & n0116] from Espacenet Translation shows and indicates where bonding layer 5 is coplanarly extended across substrate 1, ceramic substrate 4, and adhesive layer 3).
Allowable Subject Matter
Claim 20 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter:
Regarding claim 20, the primary reason for allowance is due to a circuit board, wherein the bonding layer is extended to the through holes.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to GUILLERMO J EGOAVIL whose telephone number is (571)270-1325. The examiner can normally be reached Mon-Fri 8:00-5:00.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Timothy Thompson can be reached at (571) 272-2342. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/GUILLERMO J EGOAVIL/Examiner, Art Unit 2847
/TIMOTHY J THOMPSON/Supervisory Patent Examiner, Art Unit 2847