DETAILED ACTION
This Office action is in response to the filing of this application on 26 May 2023. Claims 1-20 are pending in the application. Claims 1, 12, and 18 are independent.
This application is a divisional of application Serial No. 16/997,686, filed on 19 August 2020, now US Patent 11,688,615.
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Objections
Claim 12 is objected to because of the following informalities: Line 1 of claim 12 states “A method comprising, comprising: “. It is suggested that “comprising” (first occurrence) be deleted. Appropriate correction is required.
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1, 9-15, 18, and 20 are rejected under 35 U.S.C. 102(a)(1) as being clearly anticipated by Parkhe, US 2017/0215230, cited by Applicant on the Information Disclosure Statement (IDS) submitted on 13 June 2023.
With respect to claim 1, Parke discloses a method, comprising:
supporting a semiconductor wafer 134 on a top surface of a wafer support 132/170, as shown in Fig. 2;
heating the semiconductor wafer 134 with an array of heating elements 154 and 140 positioned within the wafer support 132/170 below the top surface, see Fig. 2 and paragraphs [0024]-[0042];
generating, for each heating element 154 and 140, first sensor signals with a respective first temperature sensor 141 each positioned within the wafer support 12/170, see Fig. 2 and paragraphs [0049]-[0050], [0060], [0062], [0065], [0067], [0074]-[0079];
selectively controlling each heating element 140 via first electrical connectors (see Fig. 5) coupled to the heating elements 140 (the first electrical connectors shown in Fig. 5 connect the heating elements 140 to the tuning heating controller 202 which is configured to independently control an output of one of the spatially tunable heaters 140 relative to another of the spatially tunable heaters 140);
a plurality of first electrical connectors 250 coupled to the heating elements 140 and configured to enable selective control of individual heating elements 140, see paragraph [0083]; and
passing the first sensor signals from the wafer support 132/170 via a plurality of second electrical connectors coupled to the first temperature sensors 141, see paragraph [0077]: “each temperature sensor 141 may be independently coupled to the tuning heater controller 202”).
With respect to claim 9, the method of Parkhe further comprises holding the semiconductor wafer 134 in place on the wafer support 132/170 via electrostatic force with a conductive surface of the wafer support, see paragraphs [0032]-[0035].
With respect to claim 10, the method of Parkhe further comprises holding the wafer 134 in place on the wafer support with a clamp, see paragraph [0072].
With respect to claim 11, in the method of Parkhe, the first temperature sensors 141 include thermocouples, see paragraph [0064].
With respect to claim 12, Parkhe discloses a method comprising:
supporting a semiconductor wafer 134 with a wafer support 132/170 positioned in a semiconductor processing chamber 102, as shown in Figs. 1 and 2 and paragraphs [0025] and [0028];
heating the semiconductor wafer 134 with an array of heating elements 154 and 140 positioned within the wafer support 132/170, see Fig. 2 and paragraphs [0024]-[0042];
generating, for each heating element 154 and 140, first sensor signals with a respective first temperature sensor 141 positioned within the wafer support 132/170, see Fig. 2 and paragraphs [0049]-[0050], [0060], [0062], [0065], [0067], [0074]-[0079]; and
selectively operating, with a control system 202 communicatively coupled to the heating elements (as shown in Figs. 2 and 5) and the first temperature sensors 141 each heating element 154 and 140 responsive, at least in part, to the first sensor signal. with a control system 202, see paragraphs [0065], [0067], [0074]-[0079]
With respect to claim 13, the method of Parkhe comprises operating, with the control system 202, the heating elements 140 to generate an even temperature distribution on a surface of the semiconductor wafer 134, see paragraphs [0026], [0046], [0081], [0098], [0104].
With respect to claim 14, the method of Parkhe comprises operating, with the control system 202, the heating elements 140 to selectively heat some regions of the semiconductor wafer 134 more than other regions, see paragraphs [0041], [0044], [0077]-[0079].
With respect to claim 15, the method of Parkhe further comprises performing a semiconductor process on the wafer (see paragraphs [0025] and [0027]) with semiconductor process equipment communicatively coupled to the control system 202; and adjusting, with the control system 202, the semiconductor process equipment responsive to the first sensor signals, that is, adjusting the heating elements 140 to provide uniform heating, see paragraphs [0026], [0046], [0081], [0098], [0104].
With respect to claim 18, Parkhe discloses a method, comprising:
supporting a semiconductor wafer 134 with a wafer support 132/170 positioned within a semiconductor processing chamber 102, as shown in Figs. 1 and 2 and paragraphs [0025] and [0028];
performing a semiconductor process on the wafer 134 within the semiconductor process chamber 102, see Fig. 1 and paragraphs [0025]-[0028}
heating the semiconductor wafer 134 during the semiconductor process (see paragraph [0027]) with a plurality of heating elements 154 and 140 positioned within the wafer support 132/170, see Fig. 2 and paragraphs [0024]-[0042];
generating, for each heating element 154 and 140, first sensor signals with a respective first temperature sensor 141 positioned within the wafer support 132/170, see Fig. 2 and paragraphs [0049]-[0050], [0060], [0062], [0065], [0067], [0074]-[0079];
and
selectively controlling individual heating elements 154 and 140, with a control system 202, responsive to the first sensor signal, see paragraphs [0065], [0067], [0074]-[0079]
With respect to claim 20, the method of Parkhe further comprises adjusting the semiconductor process, with the control system, responsive to the first sensor signals, see paragraphs [0025]-[0027].
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim 2 is rejected under 35 U.S.C. 103 as being unpatentable over Parkhe, US 2017/0215230, as applied to claim 1 above, and further in view of Habermas et al., US 2019/0381628, cited by Applicant on the Information Disclosure Statement (IDS) submitted on 13 June 2023.
Parke is applied as above. Although Parkhe discloses resistive heaters 154, Parkhe does not disclose that each heating element 154 includes a respective heating coil. However, Habermas et al. disclose that a resistive heater 155 in a chuck 127 that includes a coil, see Fig. 1B and paragraphs [0045]. Therefore, in light of the disclosure
of Habermas et al., it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention that the resistive heater 154 in the known method of Parkhe could comprise a heating coil.
Allowable Subject Matter
Claims 3-8, 16-17, and 19 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter: None of the references of record teach or suggest a method comprising
generating, for each heating element, second sensor signals with a respective second temperature sensor positioned within the wafer support, as required in dependent claims 3, 16, and 19.
Claims 4-8 and 17 have been objected to by virtue of their dependency from claims 3 or 16.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. The additionally cited references disclose various methods of processing a semiconductor wafer in which the wafer support includes heating elements and temperature sensors.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to MARY A WILCZEWSKI whose telephone number is (571)272-1849. The examiner can normally be reached M-TH 7:30 AM-5:00 PM.
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MARY A. WILCZEWSKI
Primary Examiner
Art Unit 2898
/MARY A WILCZEWSKI/Primary Examiner, Art Unit 2898
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