Prosecution Insights
Last updated: July 17, 2026
Application No. 18/326,103

DISPLAY PANEL AND METHOD OF MANUFACTURING THE SAME

Non-Final OA §112
Filed
May 31, 2023
Priority
Aug 10, 2022 — RE 10-2022-0099769
Examiner
HALL, VICTORIA KATHLEEN
Art Unit
2897
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Samsung Display Co., Ltd.
OA Round
3 (Non-Final)
84%
Grant Probability
Favorable
3-4
OA Rounds
0m
Est. Remaining
99%
With Interview

Examiner Intelligence

Grants 84% — above average
84%
Career Allowance Rate
693 granted / 827 resolved
+15.8% vs TC avg
Strong +19% interview lift
Without
With
+18.9%
Interview Lift
resolved cases with interview
Typical timeline
2y 4m
Avg Prosecution
33 currently pending
Career history
854
Total Applications
across all art units

Statute-Specific Performance

§101
0.7%
-39.3% vs TC avg
§103
64.4%
+24.4% vs TC avg
§102
4.6%
-35.4% vs TC avg
§112
18.7%
-21.3% vs TC avg
Black line = Tech Center average estimate • Based on career data from 827 resolved cases

Office Action

§112
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Continued Examination Under 37 CFR 1.114 A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on March 30, 2026 has been entered. Response to Arguments Claims 1-27 stand rejected under Section 103. After an interview with the Office, applicants filed a Request for Continued Examination on March 30, 2026, which the Office has accepted and entered. In this response, applicants amended claims 1, 5-9, 11, 13, 15, 17, 21, 22, 24, 25, and 27. Applicants argue that the application is in condition for allowance. Section 103 rejections: Applicants’ amendment to independent claims requires “the semiconductor pattern at least partially overlaps only a part of the trench in plan view” (claim 1) or “the semiconductor pattern at least partially overlaps only a part of a trench in plan view” (claim 17). As for independent claim 21, the claim has been amended to change “forming a semiconductor pattern on the first insulating layer, at least a first portion of the semiconductor pattern overlapping the trench in a plan view” to “forming a semiconductor pattern on the first insulating layer, at least a first portion of the semiconductor pattern overlapping only a part of the trench in a plan view”. As for the amendment to claim 1: Applicants’ amendment overcomes the previously noted Section 103 rejections of claim 1 and its dependent claims. The rejections of claim 1 and its dependent claims are withdrawn. As for the amendment to claim 17: Applicants’ amendment overcomes the previously noted Section 103 rejections of claim 17 and its dependent claims, but introduces informalities and raises Section 112(b) issues, which are noted below. The Section 103 rejections of claim 17 and its dependent claims are withdrawn. As for the amendment to claim 21: Applicants’ amendment overcomes the previously noted Section 103 rejections of claim 21 and its dependent claims. The rejections of claim 21 and its dependent claims are withdrawn. Updated searches yielded no further prior art which anticipates or renders obvious the claims, or that could be used with previously cited prior art to render obvious the claims. For these reasons, claims 1-16 and 21-27 are allowed, with claims 17-20 being allowable once the Section 112(b) rejections and informalities are addressed. Claim Objections Claims 17-20 are objected to because of the following informalities: Claim 17, line 8: Change “each pixel” to “each transistor of the first transistor, the second transistor, and the third transistor”. Claim 17, line 9: Change the comma after “a gate” to a semicolon. Claim 17, line 10: Delete “of one pixel” or change to “one transistor of the group consisting of the first transistor, the second transistor, and the third transistor”. Claim 17, line 14: Change “a trench” to “the first region”. See discussion in Section 112(b) rejections section. Claims 18-20 are objected to for depending from objected-to base claim 17. Appropriate correction is required. Claim Rejections - 35 USC § 112 The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. Claims 17-20 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. Regarding claim 17: This claim requires the following: A display panel comprising: a base layer including a first region partially removed from an upper surface in a thickness direction of the base layer and a second region surrounding the first region; a light blocking pattern at least partially overlapping the first region in a plan view and on the upper surface of the base layer; and a pixel including a first transistor, a second transistor, and a third transistor, each pixel including a semiconductor pattern, a first electrode, a second electrode, and a gate, and a light emitting element electrically connected to the first transistor, wherein the semiconductor pattern of one pixel faces the light blocking pattern and is in the first region and a portion of the second region adjacent to the first region, and wherein the semiconductor pattern at least partially overlaps only a part of a trench in the plan view. Claim 17 defines “a base layer including a first region partially removed from an upper surface in a thickness direction of the base layer and a second region surrounding the first region”. Claim 17 later defines a semiconductor pattern, “wherein the semiconductor pattern […] faces the light blocking pattern and is in the first region and a portion of the second region adjacent to the first region, and wherein the semiconductor pattern at least partially overlaps only a part of a trench in the plan view.” (emphasis added). Although a trench-like feature is defined in the first region of the base layer, and the semiconductor pattern is placed both in the first region and a portion of the second region, and then also in a part of a trench. There is no definition of the location of the newly added trench, or its relationship to the first and second regions. Because the claim language is unclear on these points, claim 17 is rejected as indefinite. Claims 18-20 are rejected under Section 112(b) for depending from rejected base claim 17. Allowable Subject Matter Claims 1-16 and 21-27 are allowed. Claims 17-20 would be allowable if rewritten or amended to overcome the rejection(s) under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), 2nd paragraph, set forth in this Office action, and if the informalities were addressed. The following is a statement of reasons for the indication of allowable subject matter: PNG media_image1.png 768 1072 media_image1.png Greyscale The Office considered two references for combining with the prior art combination: Peng, U.S. Pat. Pub. No. 2018/0102382, Figures 8-10, and Nguyen, U.S. Pat. Pub. No. 2020/0312937, Figures 3 and 6. Both disclose a semiconductor pattern on a slope, and Peng discloses the use of a light blocking layer on the slope underneath the semiconductor pattern. The slopes are present due to protrusions in an underlying insulating layer, not due to a trench in the base layer as disclosed in applicants’ disclosure or due a trench in an insulating layer as disclosed in relevant art. After considering the differences between Peng and Nguyen, and the prior art combination as well as the disclosure, the Office has concluded that a modification of the prior art combination using Peng and Nguyen would be impermissible hindsight because of the difference due to the trench in the claims as opposed to the protrusions in Peng and Nguyen. For these reasons, the rejections were not made. With regard to claim 1: The claim has been found allowable because the prior art of record does not disclose “the semiconductor pattern at least partially overlaps only a part of the trench in plan view”, in combination with the remaining limitations of the claim. With regard to claims 2-16: The claims have been found allowable due to their dependency from claim 1 above. With regard to claim 17: The claim has been found allowable because the prior art of record does not disclose “the semiconductor pattern at least partially overlaps only a part of [the first region] in plan view”, in combination with the remaining limitations of the claim. With regard to claims 18-20: The claims have been found allowable due to their dependency from claim 17 above. With regard to claim 21: The claim has been found allowable because the prior art of record does not disclose “at least a first portion of the semiconductor pattern overlapping only a part of the trench in a plan view”, in combination with the remaining limitations of the claim. With regard to claims 22-27: The claims have been found allowable due to their dependency from claim 21 above. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to VICTORIA KATHLEEN HALL whose telephone number is (571)270-7567. The examiner can normally be reached Monday-Friday, 8 a.m.-5 p.m. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Fernando Toledo can be reached at 571-272-1867. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /Victoria K. Hall/Primary Examiner, Art Unit 2897
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Prosecution Timeline

Show 3 earlier events
Oct 08, 2025
Examiner Interview Summary
Nov 14, 2025
Response Filed
Jan 30, 2026
Final Rejection mailed — §112
Mar 04, 2026
Applicant Interview (Telephonic)
Mar 04, 2026
Examiner Interview Summary
Mar 30, 2026
Request for Continued Examination
Apr 06, 2026
Response after Non-Final Action
May 05, 2026
Non-Final Rejection mailed — §112 (current)

Precedent Cases

Applications granted by this same examiner with similar technology

Patent 12684959
DISPLAY DEVICE AND METHOD OF MANUFACTURING THE SAME
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Patent 12666799
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Patent 12666847
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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

3-4
Expected OA Rounds
84%
Grant Probability
99%
With Interview (+18.9%)
2y 4m (~0m remaining)
Median Time to Grant
High
PTA Risk
Based on 827 resolved cases by this examiner. Grant probability derived from career allowance rate.

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