DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Continued Examination Under 37 CFR 1.114
A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on July 29, 2026 has been entered.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 1, 4, 8, 9, 10, 16, 17, 18 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Tung et al. (TW 202233021 A).
INDEPENDENT CLAIM 1:
Regarding claim 1, Tung et al. teach a processing apparatus (Fig. 1A) comprising:
an electrostatic chuck configured to hold a semiconductor wafer during a process performed on the semiconductor wafer (See Machine Translation - In some embodiments, the deposition system 100 performs physical vapor deposition (PVD). Physical vapor deposition is a technique used to form layers of material on semiconductor wafers, including sputtering. In sputter deposition, a plasma 101 is used to excite ions, usually an inert gas (e.g., argon ions (Ar + )) to facilitate a powerful impact on the target. Atoms of the target material are released by the impact of the excited ions and then condense on the exposed surface of the semiconductor wafer to form a thin layer or film of the target material. Some other PVD chambers can also be used for etching processes using excited ions, noble gases, or metal ions to create impacts on the layers to be etched on the semiconductor wafer.);
a first electrode configured to bias a first region of the electrostatic chuck with a first bias; a second electrode configured to bias a second region of the electrostatic chuck with a second bias different from the first bias, wherein the first bias and second bias are configured to produce different plasma conditions at a first zone of the semiconductor wafer overlying the first region and at a second zone of the semiconductor wafer overlying the second region during the plasma process. (See Figs 1A; Machine Translation – In some embodiments, the plasma density distribution in the deposition system 100 is not uniform. For example, a central region of the chamber 104 has a higher plasma density, while a peripheral region in the chamber 104 has a lower plasma density. Therefore, different plasma densities in chamber 104 may result in different deposition to sputtering ratios in different regions on wafer 108 during a deposition process in deposition system 100 .
For example, as shown in FIG. 1C, the wafer 108 can be divided into a first area 108a, a second area 108b, and a third area 108c. The first area 108a is a circular area. The second area 108b is an annular area surrounding the first area 108a. The third area 108c is an annular area surrounding the second area 108b. However, the division of different regions on the wafer 108 is not limited to the foregoing and is merely an example. In some embodiments, when the plasma density distribution in the deposition system 100 is not uniform, the first region 108a, the second region 108b, and the third region 108c of the wafer 108 may have different deposition-to-sputtering ratios. . For example, the deposition-to-sputtering ratio of the third region 108c may be smaller than that of the first region 108a and the second region 108b and/or the deposition-to-sputtering ratio of the second region 108b may be smaller than that of the first region 108a.
In this embodiment, the RF power source 122 includes a plurality of RF source generators. A plurality of RF source generators of the RF power source 122 (for example, the first RF source generator 122a shown in Figure 1A, the second RF source generator 122b, and the third RF source generator 122c can make, in the deposition system 100 In the case of non-uniform plasma density distribution, different regions on the wafer 108 (for example, the first region 108a, the second region 108b, and the third region 108c shown in FIG. 1C) can achieve substantially the same deposition Compared with sputtering. In some embodiments, a plurality of RF source generators of RF power source 122 can make, under the situation that the plasma density distribution in deposition system 100 is uneven, different regions on wafer 108 can reach Different deposition and sputtering ratios by design.
As shown in Figure 1A, the RF power source 122 includes a first RF source generator 122a, a second RF source generator 122b, a third RF source generator 122c, a first impedance matching circuit 124a, a second impedance matching circuit 124b and The third impedance matching circuit 124c. As shown in FIGS. 1A and 1B , an electrostatic chuck (or e-chuck) 110 includes a first chuck portion 110 a , a second chuck portion 110 b and a third chuck portion 110 c. The first chuck part 110a is a circular part. The second chuck portion 110b is an annular portion surrounding the first chuck portion 110a. The third chuck part 110c is an annular part surrounding the second chuck part 110b. However, in some implementations, the distinction of different parts on the electrostatic chuck 110 is not limited to the above, but is only an example. As shown in FIG. 1A, the chuck electrode 160 of the electrostatic chuck 110 includes a first chuck electrode portion 160a, a second chuck electrode portion 160b, and a third chuck electrode portion 160c. The first chuck electrode portion 160a is located in the first chuck location 110a. The second chuck electrode portion 160b is located in the second chuck location 110b. The third chuck electrode portion 160c is located in the third chuck location 110c. The first chuck electrode portion 160a, the second chuck electrode portion 160b, and the third chuck electrode portion 160c are electrically insulated from each other.
In FIG. 1A, the first RF source generator 122a can be coupled to the first chuck electrode portion 160a in the first chuck portion 110a of the electrostatic chuck 110 via the first impedance matching circuit 124a. The second RF source generator 122b can be coupled to the second chuck electrode portion 160b in the second chuck portion 110b of the electrostatic chuck 110 via the second impedance matching circuit 124b. The third RF source generator 122c may be coupled to the third chuck electrode portion 160c in the third chuck portion 110c of the electrostatic chuck 110 via the third impedance matching circuit 124c.
In some embodiments, at least two of the first RF source generator 122 a , the second RF source generator 122 b , and the third RF source generator 122 c of the RF power source 122 can generate different RF bias powers. Therefore, the first RF source generator 122a, the second RF source generator 122b, and the third RF source generator 122c that generate different RF bias powers will be in the first area 108a, the second area 108b, and the second area of the wafer 108. Different electric fields are generated on the surfaces of the three regions 108c. The aforementioned electric field can cause the plasma ions to be accelerated to and/or away from the surface of the wafer 108 at different velocities, whereby the plasma ions bombard different regions on the wafer 108 to sputter etch the surface of the wafer 108. The strength of different regions will also vary accordingly. In the case where the plasma density distribution in the deposition system 100 is not uniform, different electric fields are generated in the first region 108a, the second region 108b, and the third region 108c on the surface of the wafer 108. The first region 108a, the second region 108b, and the third region 108c achieve substantially the same deposition-to-sputtering ratio.)
DEPENDENT CLAIM 4:
Regarding claim 4, Tung et al. teach wherein a gap is defined between the first electrode and the second electrode, wherein the gap is annular, and wherein the gap electrically isolates the first electrode from the second electrode. (Fig. 1A, 1B; Machine Translation - The first chuck electrode portion 160a, the second chuck electrode portion 160b, and the third chuck electrode portion 160c are electrically insulated from each other.)
DEPENDENT CLAIM 8:
Regarding claim 8, Tung et al. teach wherein the plasma process is a plasma etching process or a plasma deposition process, and wherein the first bias and the second bias control process uniformity across the semiconductor wafer during the process different plasma conditions produce different etch rates or different deposition rates at the first zone and the second zone of the semiconductor wafer. (See Machine Translation, also machine Translation highlighted above)
DEPENDENT CLAIM 9:
Regarding claim 9, Tung et al. teach further comprising a third electrode configured to bias a third region of the electrostatic chuck with a third bias, wherein the third bias is configured to produce a plasma condition at a third zone of the semiconductor wafer overlying the third region that is different from the plasma conditions at the first zone and the second zone during the plasma process, wherein the first electrode is centrally located, the second electrode is annular and surrounds the first electrode, and the third electrode is annular and surrounds the second electrode. (See Machine Translation, also machine translation highlighted above)
INDEPENDENT CLAIM 10:
Regarding claim 10, Tung et al. teach a plasma processing apparatus comprising: a plasma chamber configured to receive a semiconductor wafer for a plasma process; a first electrode disposed in the plasma chamber and configured to bias a first zone of the semiconductor wafer with a first bias; and a second electrode disposed in the plasma chamber and configured to bias a second zone of the semiconductor wafer with a second bias different from the first bias, wherein the first bias and second bias have different phases are configured to control ion behavior at the first zone and the second zone differently during the plasma process. (See Machine Translation, also machine translation highlighted above)
INDEPENDENT CLAIM 16:
Regarding claim 16, Tung et al. teach a method for plasma processing comprising: supporting a workpiece with an electrostatic chuck; igniting a plasma over the workpiece; and directing a direction of ion flow by applying a first bias directly from a first electrode that defines a first region of the electrostatic chuck and applying a second bias directly from a second electrode that defines a second region of the electrostatic chuck applying a first bias directly from a first electrode that defines a first region of the electrostatic chuck and a second bias directly from a second electrode that defines a second region of the electrostatic chuck while the plasma is ignited, the first bias and the second bias being different such that ion flow is directed differently at the first region and the second region. (See Machine Translation, also machine translation highlighted above)
DEPEDENT CLAIM 17:
Regarding claim 17, Tung et al. teach further comprising creating different ion bombardment energies at the first region and the second region via the first bias and the second bias. (See Machine Translation, also machine translation highlighted above)
DEPENDENT CLAIM 18:
Regarding claim 18, Tung et al. teach the second electrode is an annular electrode surrounding the first electrode; and applying the second bias directly from the second electrode directs ion flow at the second region, the second region being an annular region surrounding the first region. (See Machine Translation, also machine translation highlighted above)
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claim(s) 2, 11 are rejected under 35 U.S.C. 103 as being unpatentable over
Tung et al. (TW 202233021 A) in view of Cho et al. (U.S. PGPUB. 2020/0286717 A1).
DEPENDENT CLAIM 2:
The difference not yet discussed is further comprising a first direct current power source directly coupled to the first electrode; and a second direct current power source directly coupled to the second electrode.
Regarding claim 2:
Tung et al. teach utilizing a first RF power source directly coupled to the first electrode; and a second RF power source directly coupled to the second electrode. (See Tung et al. discussed above)
Cho et al. teach utilizing as an alternative to an RF bias power source a DC bias power source. (Paragraph 0021)
The motivation for utilizing the features of Cho et al. is that it allows for attracting ions from the plasma to the substrate (i.e. wafer). (See Paragraph 0003)
Therefore, it would be obvious to one of ordinary skill in the art to replace the RF sources (i.e. first, second and third RF sources) of Tung et al. with DC sources as taught by Cho et al. because Cho et al. recognize these as equivalent mechanisms to create bias for attracting ions from the plasma to the substrate.
Claim(s) 3, 12, 19 are rejected under 35 U.S.C. 103 as being unpatentable over Tung et al. in view of Cho et al. as applied to claims 1, 2, 10, 11 above, and further in view of Ohshita et al. (U.S. PGPUB. 2022/0139672 A1).
DEPENDENT CLAIMS 3, 12:
The difference not yet discussed is further comprising: a direct current (DC) power source; and a resistor-inductor-capacitor (RLC) circuit coupled to the DC power source and configured to provide a first output with a first bias to the first electrode and a second output with a second bias to the second electrode.
Regarding claims 3, 12, Ohshita et al. teach a direct current (DC) power source; and a resistor- inductor-capacitor (RLC) circuit coupled to the DC power source. The DC power source is provided with a first output with a first bias to a first electrode. (See Fig. 3)
DEPENDENT CLAIM 19:
The difference not yet discussed is further comprising generating a direct current signal with a direct current power source; and converting the DC signal into a first output with the first bias and a second output with the second bias with a resistor-inductor-capacitor circuit.
Tung et al. in combination with Cho et al. teach generating a direct current signal with a direct current power source. (See Tung et al. and Cho et al. discussed above)
Ohshita et al. teach a direct current (DC) power source; and a resistor- inductor-capacitor (RLC) circuit coupled to the DC power source. The DC power source is provided with a first output with a first bias to a first electrode. (See Fig. 3)
The motivation for utilizing the features of Ohshita et al. is that it allows for pulsing of the bias. (See Abstract)
Therefore it would be obvious to utilize the teachings of Ohshita et al. because it allows for pulsing the bias.
Claim(s) 5 is rejected under 35 U.S.C. 103 as being unpatentable over
Tung et al. (TW 202233021 A) in view of Yamamoto (U.S. PGPUB. 2003/0165044 A1).
DEPENDENT CLAIM 5:
The difference not yet discussed is wherein a gap is defined between the first and second electrode, wherein the gap is linear and extends across the electrostatic chuck to divide the chuck into independently controllable bias zones.
Regarding claim 5, Yamamoto teaches wherein a gap is defined between the first and second electrode, wherein the gap is linear and extends across the electrostatic chuck to divide the chuck into independently controllable bias zones. (Fig. 9)
The motivation for utilizing the features of Yamamoto is that it allows for preventing substrate vibration because the charge is carried across the wafer surface. (See Abstract)
Therefore, it would have been obvious to one of ordinary skill in the art at the time the invention was made to have modified Tung et al. by utilizing the features of Yamamoto because it allows for preventing substrate vibration because the charge is carried across the wafer surface.
Claim(s) 6, 7, 15 are rejected under 35 U.S.C. 103 as being unpatentable over
Tung et al. (TW 202233021 A) in view of Selwyn et al. (U.S. Pat. 5,716,486).
DEPENDENT CLAIM 6:
The difference not yet discussed is comprising a controller configured to change the first bias and the second bias during the process.
Regarding claim 6, Selwyn et al. teach a microelectronic control device to control the bias. (Column 8 lines 27-37)
DEPENDENT CLAIM 7:
The difference not yet discussed is wherein the controller is configured to provide the first bias and second bias with a different voltage and/or power is not discussed.
Regarding claim 7, Selwyn et al. teach a controller is configured to provide the first bias and second bias with a different voltage and/or power (Column 8 lines 27-37)
DEPENDENT CLAIM 15:
The difference not yet discussed is further comprising a controller configured to change the first bias and the second bias during the plasma process, wherein the controller is configured to dynamically adjust at least one of voltage, phase, and duty cycle of the first and second biases in response to real-time process monitoring to maintain process uniformity across the semiconductor wafer.
Regarding claim 15, Selwyn et al. teach a controller configured to change the first bias and the second bias during the plasma process, wherein the controller is configured to dynamically adjust at least one of voltage, phase, and duty cycle of the first and second biases in response to real-time process monitoring to maintain process uniformity across the semiconductor wafer. (Column 8 lines 27-37)
The motivation for utilizing the features of Selwyn et al. is that it allows controlling uniformity. (Column 8 lines 27-37)
Therefore, it would have been obvious to one of ordinary skill in the art at the time the invention was made to have modified Tung et al. by utilizing the features of Selwyn et al. because it allows for controlling uniformity.
Claim(s) 13 is rejected under 35 U.S.C. 103 as being unpatentable over Tung et al. (TW 202233021 A) in view of Bi et al. (U.S. PGPUB. 2023/0369091A1).
The difference not yet discussed is wherein the first electrode and the second electrode are separated by an annular gap having a radial width of from about 1 mm to about 30 mm, wherein the annular gap is configured to enable independent control of ion bombardment energy in the first zone and the second zone.
Regarding claim 13:
Tung et al. teach wherein the first electrode and the second electrode are separated by an annular gap having a radial width. Tung et al. teach wherein the annular gap is configured to enable independent control of ion bombardment energy in the first zone and the second zone. (See Machine Translation, also machine translation highlighted above)
Bi et al. teach a gap of 2.2 mm to 7.5 mm. (Paragraph 0010)
The motivation for utilizing a gap of 2.2 mm to 7.5 mm is that it allows for supporting a substrate. (See Abstract)
Therefore, it would have been obvious to one of ordinary skill in the art at the time the invention was made to have utilized the features of Bi et al. because it allows for supporting the substrate.
Claim(s) 14 is rejected under 35 U.S.C. 103 as being unpatentable over
Tung et al. (TW 202233021 A) in view of Yamamoto (U.S. PGPUB. 2003/0165044 A1).
The difference not yet discussed is wherein the first electrode and the second electrode are separated by a linear gap, wherein the linear gap separates the first zone and the second zone and enables the ion behavior to be controlled differently at the first zone and the second zone.
Regarding claim 14, Yamamoto teaches wherein the first electrode and the second electrode are separated by a linear gap, wherein the linear gap separates the first zone and the second zone and enables the ion behavior to be controlled differently at the first zone and the second zone. (See Fig. 9)
The motivation for utilizing the features of Yamamoto is that it allows for preventing substrate vibration because the charge is carried across the wafer surface. (See Abstract)
Therefore, it would have been obvious to one of ordinary skill in the art at the time the invention was made to have modified Tung et al. by utilizing the features of Yamamoto because it allows for preventing substrate vibration because the charge is carried across the wafer surface.
Claim(s) 20 is rejected under 35 U.S.C. 103 as being unpatentable over Tung et al. (TW 202233021 A) in view of Selwyn et al. (U.S. Pat. 5,716,486) and Hayashi et al. (U.S. PGPUB. 2021/0384060 A1).
DEPENDENT CLAIM 20:
The difference not yet discussed is wherein the electrostatic chuck is a first electrostatic chuck including the first electrode defining the first region and the second electrode defining the second region in a first arrangement, and wherein the method further comprises: replacing the first electrostatic chuck with a second electrostatic chuck including a second arrangement of a first replacement electrode and a second replacement electrode, wherein the first replacement electrode defines a third region of the second electrostatic chuck and the second replacement electrode defines a fourth region of the second electrostatic chuck; supporting a second workpiece with the second electrostatic chuck; igniting a plasma over the second workpiece; and directing a direction of ion flow by applying a third bias from the first replacement electrode and applying a fourth bias from the second replacement electrode.
Regarding claim 20, Selwyn et al. teach electrostatic chuck is a first electrostatic chuck and includes a first electrode defining the first region and a second electrode defining the second region in a first arrangement. (See Selwyn et al. discussed above)
Hayashi et al. teach replacing the first electrostatic chuck with a second electrostatic chuck. The chuck would have a first replacement electrode and second replacement electrode which defines third and fourth regions. (Paragraph 0007)
Hayashi et al. teach supporting a second workpiece with the second electrostatic chuck; igniting a plasma over the second workpiece; and directing a direction of ion flow by applying a third and fourth bias to the first replacement electrode and the second replacement electrode of the electrostatic chuck (Paragraph 0039 - replace wafers and electrostatic chucks)
Selwyn et al. teach directing a direction of ion flow by applying a first bias to the first region of the electrostatic chuck and applying a second bias to the second region of the electrostatic chuck. (See Selwyn et al. discussed above)
The motivation for utilizing the features of Selwyn et al. is that it allows controlling uniformity. (Column 8 lines 27-37)
The motivation for utilizing the features of Hayashi et al. is that it allows for replacing spent electrostatic chucks. (Paragraph 0007)
Therefore, it would have been obvious to one of ordinary skill in the art at the time the invention was made to have utilized the features of Selwyn et al. and Hayashi et al. because it allows for controlling uniformity and for replacing spent electrostatic chucks.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to RODNEY GLENN MCDONALD whose telephone number is (571)272-1340. The examiner can normally be reached Hoteling: M-Th every Fri off.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, James Lin can be reached at 571-272-8902. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/RODNEY G MCDONALD/Primary Examiner, Art Unit 1794
RM
September 22, 2026
Prosecution Insights