DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claim 7 is rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claim 7 recites the limitation "a heat spreader mounted with the semiconductor device". The underlined portion renders the claim indefinite. Specifically, it is unclear what Applicant means by the underlined limitation. Whether the heat spreader is mounted to or on the semiconductor device, or that the heat spreader is mounted with the semiconductor device to another external component not specifically claimed. For examination, the Examiner will interpret the claim to mean the former.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-3, 5-9, and 11-12 are rejected under 35 U.S.C. 103 as being unpatentable over Leung et al. (“Leung” US 2016/0073493) and Lin et al. (“Lin” US 2004/0178494).
Regarding claim 1, Leung discloses a heat spreader (stiffener ring 120, Figures 4 and 5, which would aid in heat dissipation at least because of the metallic materials used, see para. [0032], as well as its physical contact with the circuit board 15 and thus thermal contact with the semiconductor chip 22) for use with a semiconductor device (15/22) comprising a substrate (15) and at least one semiconductor die (22) mounted on the substrate (see Figures 4 and 5), the heat spreader (120) comprising:
two foot supports (133/135/144, on either lateral side of the semiconductor device, see Figures 4 and 5) extending downward [from the main body] and opposite to each other (each of the foot supports are on opposite sides of the substrate 15, see Figures 4 and 5), each of the foot supports (133/135/144) defining a slot (146) at its inner surface (see Figure 5), wherein the slots (146) of the two foot supports (133/135/144) are aligned with each other (see Figure 4, as they are symmetrically placed on opposite sides of the circuit board), and the slots (146) extend to allow the substrate (15) of the semiconductor device (15/22) to slide into the slots (146, see para. 0033] which discloses a sliding mechanism), thereby mounting the heat spreader (120) onto the semiconductor device (15/22);
wherein the heat spreader (120) is mounted on the semiconductor device (15/22, see Figures 4 and 5).
Leung does not disclose the claimed main body.
Lin discloses in Figure 4, however, a main body (150/151) defining a space for receiving the at least one semiconductor die (11, see Figure 4). And by incorporating this feature into the teachings of Leung, the combined teachings would teach that the slots of Leung would prevent the substrate of Leung from moving closer to or away from the main body incorporated by Lin, as well as the foot supports of Leung extending downward from the main body incorporated by Lin.
It would have been obvious to one having ordinary skill in the art to incorporate the teachings of Lin into the teachings of Leung above, i.e. incorporating a heat sink or cover (the claimed main body) on the semiconductor die, for the purpose of providing further heat dissipation to the semiconductor device (see Lin, para. [0001], [0027]). Additionally, Leung contemplates the incorporation of a heat spreader or lid on the semiconductor die (see para. [0005], [0030] of Leung).
Regarding claim 2, Lin discloses wherein the main body (150/151) comprises:
a top cover (150) in thermal contact with the semiconductor die (11, through thermal interface material 18); and
two side walls (151) extending downward from the top cover (150, see Figure 4);
wherein the top cover (150) and the two side walls (151) define the space for receiving the semiconductor die (11, see Figure 4).
Regarding claim 3, Lin discloses wherein the top cover (150) is in thermal contact with the semiconductor die (11) through a thermally conductive layer (18, para. [0027]).
Regarding claim 5, Leung discloses wherein the two foot supports (133/135/144) each comprises:
a step (133) extending outward from the main body (incorporated by Lin, which Lin also discloses, see step portion 152 in Figure 4 of Lin);
a side wall (135) extending downward from the step (133, see Figure 5); and
a bottom protrusion (144) extending inward from the side wall (135, see Figure 5);
wherein the step (133), the side wall (135) and the bottom protrusion (144) define the slot (146, see Figure 5).
Regarding claim 6, Leung further discloses an adhesive layer (70) formed in each of the two slots (146) for securing the semiconductor device (15/22) to the heat spreader (120, see Figure 5, para. [0031]).
Regarding claim 7, Leung discloses a semiconductor assembly (Figures 4 and 5), comprising:
a semiconductor device (15/22) comprising a substrate (15) and at least one semiconductor die (220) mounted on the substrate (15, see Figure 4); and
a heat spreader (120, Figures 4 and 5, which would aid in heat dissipation at least because of the metallic materials used, see para. [0032], as well as its physical contact with the circuit board 15 and thus thermal contact with the semiconductor chip 22) mounted with the semiconductor device (15/22, see the heat spreader 20 mounted on the substrate 15 of the semiconductor device), comprising:
two foot supports (133/135/144, on either lateral side of the semiconductor device, see Figures 4 and 5) extending downward [from the main body] and opposite to each other (each of the foot supports are on opposite sides of the substrate 15, see Figures 4 and 5), each of the foot supports (133/135/144) defining a slot (146) at its inner surface (see Figure 5), wherein the slots (146) of the two foot supports (133/135/144) are aligned with each other (see Figure 4, as they are symmetrically placed on opposite sides of the circuit board), and the slots (146) extend to allow the substrate (15) of the semiconductor device (15/22) to slide into the slots (146, see para. 0033] which discloses a sliding mechanism), thereby mounting the heat spreader (120) onto the semiconductor device (15/22).
Leung does not disclose the claimed main body.
Lin discloses in Figure 4, however, a main body (150/151) defining a space for receiving the at least one semiconductor die (11, see Figure 4). And by incorporating this feature into the teachings of Leung, the combined teachings would teach that the slots of Leung would prevent the substrate of Leung from moving closer to or away from the main body incorporated by Lin, as well as the foot supports of Leung extending downward from the main body incorporated by Lin.
It would have been obvious to one having ordinary skill in the art to incorporate the teachings of Lin into the teachings of Leung above, i.e. incorporating a heat sink or cover (the claimed main body) on the semiconductor die, for the purpose of providing further heat dissipation to the semiconductor device (see Lin, para. [0001], [0027]). Additionally, Leung contemplates the incorporation of a heat spreader or lid on the semiconductor die (see para. [0005], [0030] of Leung).
Regarding claim 8, Lin discloses wherein the main body (150/151) comprises:
a top cover (150) in thermal contact with the semiconductor die (11, through thermal interface material 18); and
two side walls (151) extending downward from the top cover (150, see Figure 4);
wherein the top cover (150) and the two side walls (151) define the space for receiving the semiconductor die (11, see Figure 4).
Regarding claim 9, Lin discloses wherein the top cover (150) is in thermal contact with the semiconductor die (11) through a thermally conductive layer (18, para. [0027]).
Regarding claim 11, Leung discloses wherein the two foot supports (133/135/144) each comprises:
a step (133) extending outward from the main body (incorporated by Lin, which Lin also discloses, see step portion 152 in Figure 4 of Lin);
a side wall (135) extending downward from the step (133, see Figure 5); and
a bottom protrusion (144) extending inward from the side wall (135, see Figure 5);
wherein the step (133), the side wall (135) and the bottom protrusion (144) define the slot (146, see Figure 5).
Regarding claim 12, Leung further discloses an adhesive layer (70) formed in each of the two slots (146) for securing the semiconductor device (15/22) to the heat spreader (120, see Figure 5, para. [0031]).
Claims 4 and 10 are rejected under 35 U.S.C. 103 as being unpatentable over Leung and Lin as applied to claims 3 and 9 above, and further in view of Yang et al. (“Yang” US 2022/0328378).
Regarding claim 4, Lin does not disclose that the main body comprises a plurality of holes disposed at the top cover, wherein the thermally conductive layer is applied between the top cover and the semiconductor die through the plurality of holes.
Yang discloses a main body (130) comprising a plurality of holes (131a1/131a2) disposed at the top cover (131, see Figures 1A and 1B), wherein the thermally conductive layer (140) is applied between the top cover (131) and the semiconductor die (120) through the plurality of holes (131a1/131a2, see para. [0021]-[0022]).
It would have been obvious to one having ordinary skill in the art to incorporate the teachings of Yang into the teachings of Leung and Lin to include the plurality of holes and the application of the thermally conductive material through the holes as taught by Yang for the purpose of disposing the thermally conductive material through the first hole such that the air can be discharged through the other hole, avoiding air gaps which improves thermal dissipation performance (Yang, para. [0021]).
Regarding claim 10, Lin does not disclose that the main body comprises a plurality of holes disposed at the top cover, wherein the thermally conductive layer is applied between the top cover and the semiconductor die through the plurality of holes.
Yang discloses a main body (130) comprising a plurality of holes (131a1/131a2) disposed at the top cover (131, see Figures 1A and 1B), wherein the thermally conductive layer (140) is applied between the top cover (131) and the semiconductor die (120) through the plurality of holes (131a1/131a2, see para. [0021]-[0022]).
It would have been obvious to one having ordinary skill in the art to incorporate the teachings of Yang into the teachings of Leung and Lin to include the plurality of holes and the application of the thermally conductive material through the holes as taught by Yang for the purpose of disposing the thermally conductive material through the first hole such that the air can be discharged through the other hole, avoiding air gaps which improves thermal dissipation performance (Yang, para. [0021]).
Response to Arguments
Applicant’s amendments to claims 1 and 6 overcome the 112(b) rejection of record, thus the 112(b) rejections of claims 1 and 6 has been withdrawn. However, Applicant has not addressed the 112(b) rejection of claim 7, thus the 112(b) rejection of claim 7 is maintained, see above.
Applicant’s arguments have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Genevieve G Bullard-Connor whose telephone number is (571)270-0609. The examiner can normally be reached Mon-Fri, 9am-5pm.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Dale Page can be reached at 5712707877. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/Genevieve G Bullard-Connor/Examiner, Art Unit 2899
/DALE E PAGE/Supervisory Patent Examiner, Art Unit 2899