DETAILED ACTION
Election/Restrictions
Applicant’s election without traverse of Group I and Embodiment of Figs. 13A-13B (Claims 1-17 and 21-23) in the reply filed on 02/16/2026 is acknowledged.
Information Disclosure Statement
The information disclosure statement (IDS) submitted on 06/14/2023, 12/26/2024, 02/25/2025 and 10/23/2025. The submission is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1-2 and 4 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Yu (US 2022/0328445).
As for claim 1, Yu discloses in Fig. 1A-1B and the related text a device comprising:
a first integrated circuit (IC) die 110;
a first dielectric material 310 around first sidewalls of the first IC die (Fig. 1B);
a second IC die 210A over and electrically coupled to the first IC die (Fig. 1B); and
a second dielectric material 320 over the first dielectric material and around second sidewalls of the second IC die (Fig. 1B), wherein in a top view, the second sidewalls of the second IC die 110 are disposed within, and are spaced apart from, the first sidewalls of the first IC die 210A (Fig. 1A).
As for claim 2, Yu discloses the device of claim 1, wherein a closest lateral distance between the first sidewalls of the first IC die 110 and the second sidewalls of the second IC die 210A is larger than one third of a thickness of the second IC die (Fig. 1A).
As for claim 4, Yu discloses the device of claim 1, further comprising: external connectors 500 at a front-side of the first IC die distal from the second IC die 210A; and through-substrate vias (TSVs) 170 extending through a first substrate of the first IC die 110 (Fig. 1), wherein the TSVs protrudes (lower portion of 130) protrude above a back-side of the first substrate distal from the external connectors (Fig. 1B), wherein the second IC die 210A is electrically coupled to the TSVs (FIG. 1B).
Claims 13 and 15-16 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Yu (US 2022/0328445).
As for claim 13, Yu et al. disclose in Figs. 1-26 and the related text a device comprising:
a first die 110’;
a first liner layer 148 extending along first sidewalls of the first die;
a first dielectric material 150 on the first liner layer and around the first die (Fig. 14);
a second die 220 over and electrically coupled to the first die (Fig. 14);
a second liner layer 248 extending along second sidewalls of the second die 220 and along a first surface of the first dielectric material 150 facing the second die (Fig. 14); and
a second dielectric material 250 on the second liner layer and around the second die (Fig. 14), wherein there is lateral offset between each of the first sidewalls of the first die and a respective closest second sidewall of the second die 220 (Fig. 1).
As for claim 15, Yu et al. disclose the device of claim 13, further comprising: a dielectric film 134/234 between, and contacting, the first die and the second die (Fig. 14); through-substrate-vias (TSVs) 126/226 coupled between a first interconnect structure 142 of the first die and a second interconnect structure 242 of the second die, wherein the TSVs 126/226 extend through a first substrate of the first die 110’, or through a second substrate of the second die 220; and conductive pads 142 in the dielectric film, wherein the TSVs extend into the dielectric film, and are coupled to the conductive pads (Fig. 14).
As for claim 16, Yu et al. disclose the device of claim 13, wherein the second liner layer 248 is softer than the first liner layer 148 ([0025] and [0037]).
Claim Rejections - 35 USC § 103
The factual inquiries set forth in Graham v. John Deere Co., 383 U.S. 1, 148 USPQ 459 (1966), that are applied for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claim 3 is rejected under 35 U.S.C. 103 as being unpatentable over Yu.
As for claim 3, Yu discloses the device of claim 1, except a closest lateral distance between the first sidewalls of the first IC die and the second sidewalls of the second IC die is larger than o pm and smaller than about 80pm.
It would have been obvious to one having ordinary skill in the art at the time the invention was made to provide a closest lateral distance between the first sidewalls of the first IC die and the second sidewalls of the second IC die is larger than o pm and smaller than about 80pm, in order to optimize the performance of the device. Futhermore, it has been held that discovering the optimum or workable ranges involves only routine skill in the art. In re Aller, 105 USPQ 233; In re Boesch, 617 F.2d 272, 205 USPQ 215 (CCPA 1980); In re Huang, 100 F.3d 135, 40 USPQ2d 1685, 1688 (Fed. Cir. 1996).
Claims 5-8 are rejected under 35 U.S.C. 103 as being unpatentable over Yu in view of Yu et al. (US 2020/0118908).
As for claim 5-6, Yu discloses the device of claim 4, further comprising: a bonding film 400 between the first IC die 110 and the second IC die 210A; and conductive pads 150/250 in the bonding film, wherein the second IC die 210A is bonded to the conductive pads 150/250,
Yu does not disclose TSVs extends extend into the bonding film and are coupled to respective ones of the conductive pads, wherein die connectors of a second IC die are bonded to the conductive pads through metal-to-metal bonding, wherein an exterior dielectric layer of the second IC die is bonded to the bonding film through dielectric-to-dielectric bonding.
Yu et al. disclose in Fig. 5/7 and the related text TSVs 81/30-2 of a die L4/M2 extends extend into the bonding film 78/26B and are coupled to respective ones of the conductive pads 76/24B, wherein die connectors 30-3/24A of a second IC die M3/L1 are bonded to the conductive pads 76/24B through metal-to-metal bonding (Fig. 5/7, [0018]), wherein an exterior dielectric layer 38B/38A of the second IC die M3/L1 is bonded to the bonding film 26B through dielectric-to- dielectric bonding (Fig. 5/7, [0018]).
Yu et al. are analogous art because they both are directed packaging devices and one of ordinary skill in the art would have had a reasonable expectation of success to modify Yu because they are from the same field of endeavor.
It would have been obvious to one of ordinary skill in the art at the time the invention was made to modify Yu to include the limitations as taught by Yu et al., in order to improve interconnections.
As for claim 7, Yu discloses device of claim 5, a dummy die 220 laterally adjacent to the second IC die 210A, wherein the dummy die 220 is over and attached to the bonding film 400, wherein in the top view, third sidewalls of the dummy die 220 are disposed within, and are spaced apart from, the first sidewalls of the first IC die 110 (Fig. 1A).
As for claim 8, Yu discloses the device of claim 7, further comprising a dummy via 32/76 (that forms above 32) that extends through the second dielectric material 38B, through the bonding film 78, and (electrically/thermally) contacts the first dielectric material 79 (Fig. 5 or 30).
Claims 9-11 are rejected under 35 U.S.C. 103 as being unpatentable over Yu in view of Chen et al. (US 9,859,245).
As for claim 9-10, Yu discloses the device of claim 1, except a first liner layer between the first IC die and the first dielectric material, wherein the first liner layer contacts and extends along the first sidewalls of the first IC die; and a second liner layer between the second IC die and the second dielectric material, wherein the second liner layer contacts and extends along the second sidewalls of the second IC die, wherein the second liner layer has a different composition than the first liner layer.
Chen et al. teach in Fig. 1A-1J and the related text a first liner layer 180 between the first IC die 170 and the first dielectric material (lower layer 240), wherein the first liner layer 180 contacts and extends along the first sidewalls of the first IC die 170; and a second liner layer 146 between the second IC die 130 and the second dielectric material (upper portion of 240), wherein the second liner layer 140 contacts and extends along the second sidewalls of the second IC die 130, wherein the second liner layer has a different composition than the first liner layer (col. 3 lines 12-15 and col. 4 lines 25-29)
Yu and Chen et al. are analogous art because they both are directed packaging devices and one of ordinary skill in the art would have had a reasonable expectation of success to modify Yu because they are from the same field of endeavor.
It would have been obvious to one of ordinary skill in the art at the time the invention was made to modify Yu to include the limitations as taught by Chen et al. in order to improve chip protection.
As for claim 11, Yu discloses the device of claim 9, wherein a second Young's modulus of the second liner layer 140 (as silicon oxide, col. 3 lines 12-15) is smaller than a first Young's modulus of the first liner layer 180 (as silicon nitride, col. 4 lines 25-29).
Claim 14 is rejected under 35 U.S.C. 103 as being unpatentable over Yu et al. in view of Yu (US 2022/0328445).
As for claim 14, Yu et al. disclose the device of claim 13, except in a top view, the second die is disposed within a perimeter defined by the first sidewalls of the first die, and a closest distance between the first sidewalls and the second sidewalls is larger than one third of a thickness of the second die.
Yu teaches in Fig. 1A-1B and the related text a second die 210A is disposed within a perimeter defined by the first sidewalls of the first die 110, and a closest distance between the first sidewalls and the second sidewalls is larger than one third of a thickness of the second die 210A (Fig. 1A).
Yu and Yu et al. are analogous art because they both are directed packaging devices and one of ordinary skill in the art would have had a reasonable expectation of success to modify Yu et al. because they are from the same field of endeavor.
It would have been obvious to one of ordinary skill in the art at the time the invention was made to modify Yu et al. to include the limitations as taught by Yu in order to improve performance of the packaging device.
Allowable Subject Matter
Claims 12 and 17 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is an examiner’s statement of reasons for the indication of allowable subject matter: the first liner layer is a single-layer dielectric material, and the second liner layer has a multi-layered structure and comprises a plurality of sublayers, wherein each of the sublayers is a different dielectric material, as recited in claim 12; and wherein the first liner layer has a homogeneous composition, wherein the second liner layer has a plurality of sublayers, and each of the sublayers is a different dielectric material, as recited in claim 17.
Claims 21-23 are allowed.
The following is an examiner’s statement of reasons for the indication of allowable subject matter: a first portion of the second liner layer is interposed between the second dielectric material and a second sidewall of the second die, wherein a second portion of the second liner layer is interposed between the second dielectric material and a third sidewall of the dummy die, wherein a third portion of the second liner layer extends along a surface of the second dielectric material facing the first die, wherein sidewalls of the dummy via are free of the second liner layer.
The cited art, whether taken singularly or in combination, especially when all limitations are considered within the claimed specific combination, fails to teach or render obvious “a first portion of the second liner layer is interposed between the second dielectric material and a second sidewall of the second die, wherein a second portion of the second liner layer is interposed between the second dielectric material and a third sidewall of the dummy die, wherein a third portion of the second liner layer extends along a surface of the second dielectric material facing the first die, wherein sidewalls of the dummy via are free of the second liner layer”.
Claims 22-23 depend among allowable claim 21.
Any comments considered necessary by applicant must be submitted no later than the payment of the issue fee and, to avoid processing delays, should preferably accompany the issue fee. Such submissions should be clearly labeled “Comments on Statement of Reasons for Allowance.”
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to TRANG Q TRAN whose telephone number is (571)270-3259. The examiner can normally be reached on Monday-Thursday (9am-4pm).
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Lynne Gurley can be reached on 5712721670. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/TRANG Q TRAN/Primary Examiner, Art Unit 2811