Attorney Docket Number: 20223727 / 24061.4732US01
Filing Date: 6/15/2023
Inventors: Chou et al.
Examiner: Thomas McCoy
DETAILED ACTION
This Office action responds to the RCE amendments filed 5/12/2026.
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . In the event the determination of the status of the application as
subject to AIA 35 U.S.C. 102 and 103 is incorrect, any correction of the statutory basis (i.e., changing
from AIA to pre-AIA ) for a rejection will not be considered a new ground of rejection if the prior art
relied upon, and the rationale supporting the rejection, would be the same under either status.
Continued Examination Under 37 CFR 1.114
A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR
1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 5/12/2026 has been entered.
Amendment Status
The RCE submission filed on 5/12/2026, responding to the Office action mailed 3/12/2026,
has been entered. Applicant amended claims 1, 3, 13, 15, 18, and 20. Applicant cancelled claims 8 and 16, and added claims 22-23. The present Office action is made with all the suggested amendments being fully considered. Accordingly, pending in this Office action are claims 1-7, 9-15, and 17-18, and 20-23.
Drawings
The drawings are objected to under 37 CFR 1.83(a). The drawings must show every feature of the invention specified in the claims. Therefore, performing the high-pressure anneal without oxygen vacancy formation at an interface of the insulator layer must be shown or the feature(s) canceled from the claim(s). No new matter should be entered.
Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. The figure or figure number of an amended drawing should not be labeled as “amended.” If a drawing figure is to be canceled, the appropriate figure must be removed from the replacement sheet, and where necessary, the remaining figures must be renumbered and appropriate changes made to the brief description of the several views of the drawings for consistency. Additional replacement sheets may be necessary to show the renumbering of the remaining figures. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance.
Claim Rejections - 35 USC § 112
The following is a quotation of the first paragraph of 35 U.S.C. 112(a):
(a) IN GENERAL.—The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention.
The following is a quotation of the first paragraph of pre-AIA 35 U.S.C. 112:
The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor of carrying out his invention.
Claim 18 is rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, as failing to comply with the written description requirement. The claim(s) contains subject matter which was not described in the specification in such a way as to reasonably convey to one skilled in the relevant art that the inventor or a joint inventor, or for applications subject to pre-AIA 35 U.S.C. 112, the inventor(s), at the time the application was filed, had possession of the claimed invention.
Claim 18 had been amended to recite “…after forming the MIM capacitor, performing a high-pressure anneal (HPA) without oxygen vacancy formation at an interface of the insulator layer.” However, the disclosure as originally filed does not support the high-pressure anneal is performed without forming any oxygen vacancies at an interface of the insulator layer. Therefore, the claimed step of claim 18 high-pressure anneal is formed without oxygen vacancy formation at an interface of the insulator layer constitutes new matter. For the purposes of examination, the claim will be construed to recite “…after forming the MIM capacitor, performing a high-pressure anneal (HPA) on the insulator layer”, consistent with paragraph 43 of the specification.
The applicant may cancel the claim, amend the claim, or demonstrate explicit support for the claimed subject matter in the original disclosure (e.g., by citing specific excerpts from related sections of Specification or related features in Drawings, as filed). A broad statement alleging support for the claimed subject matter, or relying on unrelated disclosure for support, will be considered non-persuasive.
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 20 and 22 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claim 20 recites the limitation "…patterned second conductor plate layer…" in line 2. There is insufficient antecedent basis for this limitation in the claim. For the purposes of examination, "…patterned second conductor plate layer…" will be construed to recite "…patterned second conductor plate…".
Claim 22 recites the limitation "…the other of the first and second layers…" in line 4. There is insufficient antecedent basis for this limitation in the claim. For the purposes of examination, "…the other of the first and second layers…" will be construed to recite “…another of the first layer and second layers…”.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-3, 6, 9-12, and 22 are rejected under 35 U.S.C. 103 as being unpatentable over Yin (US 20210098564 A1) in view of De Rochement (US 20180358295 A1) further in view of Jo (US 20240213349 A1).
Regarding claim 1, Yin (see, e.g., fig. 16) shows most aspects of the instant invention including a device (e.g., semiconductor device 200) comprising:
A substrate (e.g., substrate 202) including one or more semiconductor devices (see, e.g., paragraph 18 “…the substrate 202 includes one or more active and/or passive semiconductor devices…”);
A first passivation layer (e.g., first passivation layer 252) disposed over the one or more semiconductor devices (see, e.g., paragraph 18 “…the substrate 202 includes one or more active and/or passive semiconductor devices…”);
A metal-insulator-metal (MIM) capacitor structure (e.g., MIM structure 260, composed of bottom conductor plate layer 262 + insulator layer 264 + middle conductor plate layer 266, etc.) includes a first conductor plate layer (e.g., bottom conductor plate layer 262), a first insulator layer (e.g., insulator layer 264) on the first conductor plate layer (e.g., bottom conductor plate layer 262), a second conductor plate layer (e.g., middle conductor plate layer 266) on the first insulator layer (e.g., insulator layer 264), a second insulator layer (e.g., insulator layer 268) on the second conductor plate layer (e.g., middle conductor plate layer 266), and a third conductor plate layer (e.g., top conductor plate layer 269) on the second insulator layer (e.g., insulator layer 268), a third insulator layer (e.g., first dielectric portion 271) on the third conductor plate layer (e.g., top conductor plate layer 269), wherein at least one of the first (e.g., insulator layer 264), second (e.g., insulator layer 268), and third insulator layer (e.g., first dielectric portion 271) include a tri-layer metal oxide sandwich structure (see, e.g., paragraph 31 “…the insulator layer 264 (or the insulator layer 268)… may include a tri-layer structure including, from bottom to top, a first zirconium oxide (ZrO.sub.2) layer, an aluminum oxide (Al.sub.2O.sub.3) layer, and a second zirconium oxide (ZrO.sub.2) layer…”, so note the combination of layers 264 + 268 + 271 includes a metal oxide sandwich structure).
Yin (see, e.g., fig. 16), however, fails to show a fourth conductor plate layer on the third insulator layer, while it also fails to show a bi-layer metal oxide structure, wherein at least one layer of the tri-layer metal oxide sandwich structure has a same composition as at least one layer of the bi-layer metal oxide structure, wherein remaining layers of the tri-layer metal oxide sandwich structure are different in composition as compared to a remaining layer of the bi-layer metal oxide structure, wherein the at least one layer of the tri-layer metal oxide sandwich structure is more than ten times thicker than the remaining layers of the tri-layer metal oxide sandwich structure, and wherein the at least one layer of the bi-layer metal oxide structure is more than ten times thicker than the remaining layer of the bi-layer metal oxide structure.
De Rochemont (see, e.g., fig. 4B), in a similar device to Yin, teaches a fourth conductor plate layer (e.g., primary conductor layer 316A) on a third insulator layer (e.g., high energy density capacitive dielectric layer 320A).
Accordingly, it would have been obvious to one of ordinary skill in the art at the time of filing the invention to include the fourth conductor plate layer of De Rochemont, on the metal-insulator-metal stack and third insulator layer of Yin, in order to achieve the expected result of improving capacitance density within the device.
Additionally, it would have been obvious to one of ordinary skill in the art before the
effective filing date of the invention to duplicate at insulator layer conductor plate layer configuration of the stack of Yin onto the top of the stack, to achieve the expected
result of increasing the capacitance structure’s area and thus improving the capacitance density within the device, since it has been held that a mere duplication of working parts of a device involves only routine skill in the art. In re Harza 124 USPQ 378 (CCPA 1960). See also MPEP 2144.04.
Yin in view of De Rochemont, however, fails to teach a bi-layer metal oxide structure, wherein at least one layer of the tri-layer metal oxide sandwich structure has a same composition as at least one layer of the bi-layer metal oxide structure, wherein remaining layers of the tri-layer metal oxide sandwich structure are different in composition as compared to a remaining layer of the bi-layer metal oxide structure, wherein the at least one layer of the tri-layer metal oxide sandwich structure is more than ten times thicker than the remaining layers of the tri-layer metal oxide sandwich structure, and wherein the at least one layer of the bi-layer metal oxide structure is more than ten times thicker than the remaining layer of the bi-layer metal oxide structure.
Jo (see, e.g., fig. 1), in a similar device to Yin in view of De Rochemont, teaches a bi-layer metal oxide structure (e.g., second oxide layer 35 comprising hafnium oxide layer 35a + oxide layer 35b + paragraph 76 “…the oxide layer 35b including the second component…the second component may be…Al…”), and wherein at least one layer of the bi-layer metal oxide structure (e.g., second oxide layer 35 comprising hafnium oxide layer 35a + oxide layer 35b + paragraph 76) is ten times thicker (see, e.g., paragraph 76 “For example, a thickness ratio of the second oxide layer 35 to the first oxide layer 31 may be 2:1 to 10:1”) than a remaining layer of the bi-layer metal oxide structure (e.g., second oxide layer 35 comprising hafnium oxide layer 35a + oxide layer 35b + paragraph 76).
Accordingly, it would have been obvious to one of ordinary skill in the art at the time of filing the invention to include the bi-layer metal oxide and thickness ratio of Jo within the stacked setup of Yin in view of De Rochemont, in order to achieve the expected result of providing the varied dielectric profile within the capacitor structure, as taught by Jo.
With regards to the particular ratio claimed, i.e., more than ten times greater, it is noted that
the specification fails to provide teachings about the criticality of the claimed range, and the
courts have held that differences in thicknesses (or ranges thereof) will not support the patentability of subject matter encompassed by the prior art unless there is evidence indicating such lengths are critical. “Where the general conditions of a claim are disclosed in the prior art, it is not inventive to discover the workable ranges by routine experimentation”. In re Aller, 220 F.2d 454, 456, 105 USPQ 233, 235 (CCPA 1955).
Note that while the specification does discuss the general advantages of the middle insulator layers to be ’…10-18 times greater than the thickness of either the bottom insulator layer….or the top insulator layer…’, it does not explicitly disclose the critical advantage with the exact ratio claimed. The evidence relied upon should establish that the differences in results are in fact unexpected and unobvious and of both statistical and practical significance. Ex parte Gelles, 22 USPQ2d 1318, 1319 (Bd. Pat. App. & Inter. 1992). To establish unexpected results over a claimed range, applicants should compare a sufficient number of tests both inside and outside the claimed range to show the criticality of the claimed range. In re Hill, 284 F.2d 955, 128 USPQ 197 (CCPA 1960).
Since the applicant has not established the criticality (see next paragraph below) of the claimed length ranges, and since Jo teaches a thickness ratio of substantially close to “more than ten times greater”, i.e., ten times greater, it would have been obvious to one of ordinary skill in the art at the time of filing the invention to slightly modify this thickness ratio between the oxide layers of Yin in view De Rochemont further in view of Jo, to expand the HZO layer’s thickness/properties and manipulate the capacitance profile as desired.
CRITICALITY: The specification contains no disclosure of either the critical nature of the claimed distance ranges or any unexpected results arising therefrom. Where patentability is said to be based upon particular chosen dimensions or upon another variable recited in a claim, the
applicant must show that the chosen dimensions are critical. In re Woodruff, 919 F.2d 1575,
1578, 16 USPQ2d 1934, 1936 (Fed. Cir. 1990).
Regarding claim 2, Yin (see, e.g., fig. 16) shows a second passivation layer (e.g., second passivation layer 270) disposed over the MIM capacitor structure (e.g., MIM structure 260 composed of bottom conductor plate layer 262 + insulator layer 264 + middle conductor plate layer 266, etc.).
Regarding claim 3, Yin (see, e.g., fig. 16) shows the tri-layer metal oxide sandwich structure (see, e.g., paragraph 31 “…the insulator layer 264… may include a tri-layer structure including, from bottom to top, a first zirconium oxide (ZrO.sub.2) layer, an aluminum oxide (Al.sub.2O.sub.3) layer, and a second zirconium oxide (ZrO.sub.2) layer…”) includes a bottom insulator layer (e.g., first zirconium oxide layer of paragraph 31), a middle insulator layer (e.g., aluminum oxide layer of insulator layer, see paragraph 31) over the bottom insulator layer (e.g., first zirconium oxide layer of insulator layer, see paragraph 31), and a top insulator layer (e.g., second zirconium oxide layer of insulator layer, see paragraph 31) over the middle insulator layer (e.g., aluminum oxide layer of insulator layer, see paragraph 31).
Regarding claim 6, Yin (see, e.g., fig. 16) shows the bottom insulator layer (e.g., first zirconium oxide layer of insulator layer, see paragraph 31) and the top insulator layer (e.g., second zirconium oxide layer of insulator layer, see paragraph 31) include a zirconium oxide (ZrO2) layer (see, e.g., paragraph 31).
Regarding claim 7, Jo (see, e.g., fig. 1) teaches an insulator layer (e.g., second oxide layer 35) includes a HZO layer (see, e.g., paragraph 59 “…the second oxide layer (e.g., the HZO layer)…”) that includes interleaving HfO2 and ZrO2 layers (see, e.g., paragraph 59 “ the second oxide layer may be formed of a solid solution layer formed using a solid solution deposition method in which HfO2 and ZrO2 are alternately deposited in one cycle or multiple cycles, and thus, the ferroelectric layer may have a ZrO2/HZO thin film structure”).
Accordingly, it would have been obvious to one of ordinary skill in the art at the time of filing the invention to include the HZO layer including the interleaving HfO2 and ZrO2 layers of Jo within the middle insulator of Yin in view of De Rochemont further in view of Jo, in order to achieve the expected result of providing the varied dielectric profile within the capacitor structure, as taught by Jo.
Regarding claim 9, Yin (see, e.g., fig. 16) shows a multi-layer interconnect (MLI) structure (see, e.g., paragraph 19 “…the substrate 202 may also include an interconnect structure such as a multi-layer interconnect (MLI) structure…”) at least partially disposed within the substrate (e.g., substrate 202), wherein the first passivation layer (e.g., first passivation layer 252) is disposed over the MLI structure (e.g., MLI structure portion within substrate 202, see paragraph 19).
Regarding claim 10, Yin (see, e.g., fig. 16) shows a contact feature (e.g., contact feature 287) disposed over the second passivation layer (e.g., second passivation layer 270), wherein the contact feature (e.g., contact feature 287) is electrically coupled (see, e.g., paragraph 26 “…lower contact features…254…represent a top metal layer of the MLI structure, previously discussed” + see contact point between contact feature 287 and lower contact feature 254) to the MLI structure (e.g., MLI structure portion extending to the lower contact features, see paragraph 19) .
Regarding claim 11, Yin (see, e.g., fig. 16) shows an upper portion of the contact feature (e.g., contact feature 287) includes a redistribution layer (RDL) (see, e.g., paragraph 46 “…an upper portion of the upper contact features …287… are part of a redistribution layer…”).
Regarding claim 12, Yin (see, e.g., fig. 16) shows a third passivation layer (e.g., third passivation layer 290) disposed over the second passivation layer (e.g., second passivation layer 270), wherein the contact feature (e.g., MLI structure portion within substrate 202, see paragraph 19) is disposed within the third passivation layer (e.g., third passivation layer 290).
Regarding claim 22, Jo (see, e.g., fig. 1) teaches the bi-layer metal oxide structure (e.g., second oxide layer 35 comprising hafnium oxide layer 35a + oxide layer 35b + paragraph 76) includes a first layer (e.g., hafnium oxide layer 35a) and a second layer (e.g., second oxide layer 35, note the layer continually alternates, see paragraph 76) over the first layer (e.g., hafnium oxide layer 35a, see fig. 1 and note the current configuration shows 35a lies under the alternating layers of the greater oxide layer 35 within the current embodiment), wherein one of the first and second layers is composed of a stack of interleaving HfO2 and ZrO2 layers (see, e.g., paragraph 76), and wherein another of the first layer and second layers is composed of hafnium oxide (HfO2) (see, e.g., paragraph 76 “hafnium oxide layer 35a”).
Accordingly, it would have been obvious to one of ordinary skill in the art at the time of filing the invention to include the interleaving HfO2 and ZrO2 layers and other HfO2 layer of Jo within the bi-layer configuration of Yin in view of De Rochemont further in view of Jo, in order to achieve the expected result of providing the varied dielectric profile within the capacitor structure, as taught by Jo. In addition, HfO2 and ZrO2 are known and diversified for their usage in insulating materials to include within the device, as taught by Jo.
Claims 4-5 are rejected under 35 U.S.C. 103 as being unpatentable over Yin in view of De Rochemont further in view of Jo and Basceri (US 20030213987 A1).
Regarding claim 4, Yin in view of De Rochemont further in view of Jo fails to teach the middle insulator layer is composed of a stack of two types of interleaving insulator layers having different material composition, and wherein one type of insulator layer of the stack of two types of interleaving insulator layers has a same material composition as the bottom insulator layer and the top insulator layer.
Basceri (see, e.g., fig. 16), in a similar device to Yin in view of De Rochemont further in view of Jo, teaches an insulator layer (e.g., Al.sub.2O.sub.3 composite stack layer) is composed of a stack of two types of interleaving insulator layers having a different material composition, and wherein one type of insulator layer of the stack of two types of interleaving insulator layers has a same material composition as the bottom insulator layer and the top insulator layer (see, e.g., paragraph 65 “ The Al.sub.2O.sub.3 composite stack layer 80 may be also formed as a plurality of interleaved layers of Al.sub.2O.sub.3 and a combination of dielectric metal oxides, for example, a combination of any of zirconium oxide (ZrO.sub.2), hafnium oxide (HfO)…”).
Accordingly, it would have been obvious to one of ordinary skill in the art at the time of filing the invention to include the interleaving insulator layers of Basceri within the middle insulator layer of Yin (note that the middle insulator of Yin is also Al.sub.2O.sub.3) in view of De Rochemont, in order to create a more effective multi-functional insulating structure. In addition, these interleaving materials were well-known in the art at the time of filing the invention to be included within an Al2O3, as taught by Basceri. Note that ZrO2 is one of the disclosed types of interleaving insulator layers, and hence shares a same material composition with the bottom insulator layer and top insulator layer of Yin.
Regarding claim 5, Jo (see, e.g., fig. 1) teaches a layer of the stack of interleaving insulating layers (see, e.g., paragraph 76) is composed of zirconium oxide (ZrO2).
However, it would have been obvious to one of ordinary skill in the art at the time of filing the invention to include the zirconium oxide of Jo within the bottom layer of the stack of interleaving insulating layers of Yin in view of De Rochemont further in view of Jo and Basceri, as zirconium oxide was a well-known material to include within an interleaving insulating layer stack at the time of filing the invention, as taught by Jo. Note the bottom insulator layer and the top insulator layer of Yin include a zirconium oxide, hence the material is the same.
Claims 13-15, and 17 are rejected under 35 U.S.C. 103 as being unpatentable over Yin in view of Kuo (US 20150048483 A1) further in view of Basceri and Jo.
Regarding claim 13, Yin (see, e.g., fig. 16) shows most aspects of the instant invention including a device (e.g., semiconductor device 200) comprising:
A first passivation layer (e.g., first passivation layer 252) over a substrate (e.g., substrate 202) including an active semiconductor device (see, e.g., paragraph 18 “…the substrate 202 includes one or more active and/or passive semiconductor devices…”)
A metal-insulator-metal (MIM) structure (e.g., MIM structure 260, composed of bottom conductor plate layer 262 + insulator layer 264 + middle conductor plate layer 266 + insulator layer 268 + top conductor plate layer 269) formed over the first passivation layer (e.g., first passivation layer 252), wherein the MIM structure (e.g., MIM structure 260, composed of bottom conductor plate layer 262 + insulator layer 264 + middle conductor plate layer 266 + insulator layer 268 + top conductor plate layer 269) comprises:
A plurality of conducive plate layers (e.g., bottom conductor plate layer 262 + middle conductor plate layer 266 + top conductor plate 269); and
An insulator layer (e.g., insulator layer 264) interposing adjacent conductor plate layers of the plurality of conductor plate layers (e.g., bottom conductor plate layer 262 + middle conductor plate layer 266 + top conductor plate 269);
Wherein the insulator layer (e.g., insulator layer 264) includes a multi-layer structure (see, e.g., paragraph 31 “…the insulator layer 264… may include a tri-layer structure including, from bottom to top, a first zirconium oxide (ZrO.sub.2) layer, an aluminum oxide (Al.sub.2O.sub.3) layer, and a second zirconium oxide (ZrO.sub.2) layer…”), and wherein the multilayer structure (see, e.g., paragraph 31 “…the insulator layer 264… may include a tri-layer structure including, from bottom to top, a first zirconium oxide (ZrO.sub.2) layer, an aluminum oxide (Al.sub.2O.sub.3) layer, and a second zirconium oxide (ZrO.sub.2) layer…”) includes a first zirconium oxide (ZrO2) layer (e.g., first zirconium oxide layer of paragraph 31), a second ZrO2 layer (e.g., second zirconium oxide layer of insulator layer, see paragraph 31), and a middle layer interposing the first (e.g., first zirconium oxide layer of paragraph 31) and second (e.g., second zirconium oxide layer of insulator layer, see paragraph 31) ZrO2 layers.
Yin (see, e.g., fig. 16), however, fails to show the middle layer includes a hafnium-zirconium oxide (HZO) layer, while it also fails to show wherein the HZO layer includes a stack of interleaving HfO2 and ZrO2 layers, and wherein adjacent layers of the stack of interleaving HfO2 and ZrO2 layers have different thicknesses, and wherein a first thickness of the HZO layer is more than ten times greater than a second thickness of either the first ZrO2 layer or the second ZrO2 layer.
Kuo (see, e.g., fig. 1), in a similar device to Yin, teaches a middle insulator (e.g., insulator layer 112) includes hafnium zirconium oxide (see, e.g., paragraph 23 “…insulator layer 112 includes…hafnium zirconium oxide”).
Accordingly, it would have been obvious to one of ordinary skill in the art at the time of filing the invention to include the hafnium-zirconium oxide of Kuo within the middle insulator layer, as hafnium-zirconium oxide was a well-known medium in the art at the time of filing the invention as a material to be used as an insulator layer within a capacitor structure, as taught by Kuo.
Yin in view of Kuo, however, fails to teach wherein the HZO layer includes a stack of interleaving HfO2 and ZrO2 layers, wherein adjacent layers of the stack of interleaving HfO2 and ZrO2 layers have different thicknesses and wherein a first thickness of the HZO layer is more than ten times greater than a second thickness of either the first ZrO2 layer or the second ZrO2 layer.
Basceri (see, e.g., fig. 16), in a similar device to Yin in view of Kuo, teaches an insulator layer (e.g., Al.sub.2O.sub.3 composite stack layer) includes a stack of interleaving insulating layers (see, e.g., paragraph 65 “The Al.sub.2O.sub.3 composite stack layer 80 may be also formed as a plurality of interleaved layers of Al.sub.2O.sub.3 and a combination of dielectric metal oxides, for example, a combination of any of zirconium oxide (ZrO.sub.2), hafnium oxide (HfO)…”).
Accordingly, it would have been obvious to one of ordinary skill in the art at the time of filing the invention to include the interleaving insulator layers of Basceri within the middle insulator layer of Yin (note that the middle insulator of Yin is also Al.sub.2O.sub.3) in view of Kuo, in order to create a more effective multi-functional insulating structure. In addition, these interleaving materials were well-known in the art at the time of filing the invention to be included within an Al2O3, as taught by Basceri. Note that ZrO2 is one of the disclosed types of interleaving insulator layers, and hence shares a same material composition with the bottom insulator layer and top insulator layer of Yin.
Yin in view of Kuo further in view of Basceri, however, fails to teach wherein adjacent layers of the stack of interleaving HfO2 and ZrO2 layers have different thicknesses, and wherein a first thickness of the HZO layer is more than ten times greater than a second thickness of either the first ZrO2 layer or the second ZrO2 layer.
Jo (see, e.g., fig. 1), in a similar device to Yin in view of Kuo further in view of Basceri, teaches a first thickness of an insulating HZO layer (e.g., second oxide layer 35 + paragraph 73 “…the second oxide layer 35 may be formed of…(HZO)…”) is at least ten times greater than a second thickness (see, e.g., paragraph 74 “…a thickness ratio of HZO to ZrO2 may be 2:1 to 10:1.”) of an insulating ZrO2 layer (e.g., first oxide layer 31 + paragraph 73 “…the first oxide layer 31 may be formed as a ZrO2 layer…”), wherein it also teaches adjacent layers comprising alternate thicknesses (see, e.g., paragraphs 72-74 and paragraphs 76-80).
Accordingly, it would have been obvious to one of ordinary skill in the art at the time of filing the invention to include the thickness ratio of Jo within the configuration of Yin in view of Kuo further in view of Basceri, in order to manipulate the capacitance within the capacitor structure of Yin to desirable magnitudes within the insulator layer of the capacitor, enhancing reliability of the device, as well as differing the thicknesses within the interleaving layers of the device, in order to achieve the expected result of diversifying the thickness profile within the HZO layer of the device. In addition, since Yin in view of Kuo further in view of Basceri already recognizes the interleaving layers within the insulator setup, the particular thicknesses are an optimization of the layer regarding the hafnium and zirconium desired within the device, and no new or non-obvious results arise from that particular thickness limitation, other than enabling a stacked and diversified material insulating configuration, which is already suggested by Yin in view of Kuo further in view of Basceri.
With regards to the particular ratio claimed, i.e., more than ten times greater, it is noted that
the specification fails to provide teachings about the criticality of the claimed range, and the
courts have held that differences in thicknesses (or ranges thereof) will not support the patentability of subject matter encompassed by the prior art unless there is evidence indicating such lengths are critical. “Where the general conditions of a claim are disclosed in the prior art, it is not inventive to discover the workable ranges by routine experimentation”. In re Aller, 220 F.2d 454, 456, 105 USPQ 233, 235 (CCPA 1955).
Note that while the specification does discuss the general advantages of the middle insulator layers to be ’…10-18 times greater than the thickness of either the bottom insulator layer….or the top insulator layer…’, it does not explicitly disclose the critical advantage with the exact ratio claimed. The evidence relied upon should establish that the differences in results are in fact unexpected and unobvious and of both statistical and practical significance. Ex parte Gelles, 22 USPQ2d 1318, 1319 (Bd. Pat. App. & Inter. 1992). To establish unexpected results over a claimed range, applicants should compare a sufficient number of tests both inside and outside the claimed range to show the criticality of the claimed range. In re Hill, 284 F.2d 955, 128 USPQ 197 (CCPA 1960).
Since the applicant has not established the criticality (see next paragraph below) of the claimed length ranges, and since Jo teaches a thickness ratio of substantially close to “more than ten times greater”, i.e., ten times greater, it would have been obvious to one of ordinary skill in the art at the time of filing the invention to slightly modify this thickness ratio between the HZO layer and ZrO2 layers of Yin in view of Kuo further in view of Basceri and Jo, to expand the HZO layer’s thickness/properties and manipulate the capacitance profile as desired.
CRITICALITY: The specification contains no disclosure of either the critical nature of the claimed distance ranges or any unexpected results arising therefrom. Where patentability is said to be based upon particular chosen dimensions or upon another variable recited in a claim, the
applicant must show that the chosen dimensions are critical. In re Woodruff, 919 F.2d 1575,
1578, 16 USPQ2d 1934, 1936 (Fed. Cir. 1990).
Regarding claim 14, Yin (see, e.g., fig. 16) shows a second passivation layer (e.g., second passivation layer 270) disposed over the MIM structure (e.g., MIM structure 260 composed of bottom conductor plate layer 262 + insulator layer 264 + middle conductor plate layer 266, et cetera).
Regarding claim 15, Basceri (see, e.g., fig. 16) teaches a stack of interleaving HfO2 and ZrO2 layers includes ZrO2 (see, e.g., paragraph 65 “The Al.sub.2O.sub.3 composite stack layer 80 may be also formed as a plurality of interleaved layers of Al.sub.2O.sub.3 and a combination of dielectric metal oxides, for example, a combination of any of zirconium oxide (ZrO.sub.2).
Accordingly, it would have been obvious to one of ordinary skill in the art at the time of filing the invention to arrange the ZrO2 layers disclosed within the insulating layer-stack of Basceri to the bottommost layer of said stack, as there are limited arrangements of the interleaved layers possible within the disclosure of Basceri, and this outcome would be obvious to try for one of ordinary skill in the art within the layer of Yin in view of Kuo further in view of Basceri and Jo.
Regarding claim 17, Yin (see, e.g., fig. 16) shows a number of conductor plate layers in the plurality of conductor plate layers is between about 2 and 10 (e.g., bottom conductor plate layer 262 + middle conductor plate layer 266 + top conductor plate 269; three distinct conductor plate layers).
Yin (see, e.g., fig. 16), however, fails to show the middle layer includes a hafnium-zirconium oxide (HZO) layer.
Kuo (see, e.g., fig. 1) teaches a middle insulator (e.g., insulator layer 112) includes hafnium zirconium oxide (see, e.g., paragraph 23 “…insulator layer 112 includes…hafnium zirconium oxide”).
Accordingly, it would have been obvious to one of ordinary skill in the art at the time of filing the invention to include the hafnium-zirconium oxide of Kuo within the middle insulator layer of Yin in view of Kuo further in view of Basceri and Jo, as hafnium-zirconium oxide was a well-known medium in the art at the time of filing the invention as a material to be used as an insulation layer within a capacitor structure, as taught by Kuo.
Claims 18, and 20 are rejected under 35 U.S.C. 103 as being unpatentable over Yin in view of Jo further in view of Lee (US 20120003808 A1) and Yukinobu (EP 1189262 A2).
Regarding claim 18, Yin (see, e.g., fig. 16) shows most aspects of the instant invention including a method comprising:
Depositing (see, e.g., paragraph 27) a first passivation layer (e.g., first passivation layer 252) over a substrate (e.g., substrate 202) including one or more semiconductor devices (see, e.g., paragraph 18 “…the substrate 202 includes one or more active and/or passive semiconductor devices…”)
Forming a metal-insulator-metal (MIM) capacitor (e.g., MIM structure 260) over the first passivation layer (e.g., first passivation layer 252), wherein forming the MIM capacitor (e.g., MIM structure 260, composed of bottom conductor plate layer 262 + insulator layer 264 + middle conductor plate layer 266 + insulator layer 268 + top conductor plate layer 269) includes:
Forming a patterned first conductor plate (e.g., bottom conductor plate 262 + paragraph 29 “…patterned bottom conductive layer 262…”) over the first passivation layer (e.g., first passivation layer 252);
Depositing (see, e.g., paragraph 29) an insulator layer (e.g., insulator layer 264) over the patterned first conductor plate (e.g., bottom conductor plate 262 + paragraph 29 “…patterned bottom conductive layer 262…”), wherein the insulator layer (e.g., insulator layer 264) includes:
a metal oxide sandwich structure (see, e.g., paragraph 31 “…the insulator layer 264… may include a tri-layer structure including, from bottom to top, a first zirconium oxide (ZrO.sub.2) layer, an aluminum oxide (Al.sub.2O.sub.3) layer, and a second zirconium oxide (ZrO.sub.2) layer…”) having a bottom layer (e.g., first zirconium oxide layer of paragraph 31) including a first zirconium oxide ZrO2 layer (see, e.g., paragraph 31), a middle layer (e.g., aluminum oxide layer of insulator layer, see paragraph 31) over the bottom layer (e.g., first zirconium oxide layer of insulator layer, see paragraph 31), and a top layer (e.g., second zirconium oxide layer of insulator layer, see paragraph 31) including a second ZrO2 layer (see, e.g., paragraph 31) over the middle layer (e.g., aluminum oxide layer of insulator layer, see paragraph 31);
Forming a patterned second conductor plate (e.g., top conductor plate 269 + paragraph 29 “…patterned top conductor plate layer 269…”) over the insulator layer (e.g., insulator layer 264)
Yin (see, e.g., fig. 16), however, fails to show the middle insulator layer includes a half-zirconium oxide layer that includes interleaving HfO2 and ZrO2 layers, wherein the interleaving HfO2 and ZrO2 layers each have a different thickness, wherein the HZO layer is more than ten times thicker than the first ZrO2 layer and the second ZrO2 layer, and wherein each of the bottom layer, the middle layer, and the top layer are conformally deposited over each other using ALD, while it also fails to show after forming the MIM capacitor, performing a high-pressure anneal (HPA) on the insulator layer.
Jo (see, e.g., fig. 1), in a similar device to Yin, teaches an insulator layer (e.g., second oxide layer 35) includes a HZO layer (see, e.g., paragraph 59 “…the second oxide layer (e.g., the HZO layer)…”) that includes interleaving HfO2 and ZrO2 layers (see, e.g., paragraph 59 “ the second oxide layer may be formed of a solid solution layer formed using a solid solution deposition method in which HfO2 and ZrO2 are alternately deposited in one cycle or multiple cycles, and thus, the ferroelectric layer may have a ZrO2/HZO thin film structure”), and a first thickness of an insulating HZO layer (e.g., second oxide layer 35 + paragraph 73 “…the second oxide layer 35 may be formed of…(HZO)…”) is at least ten times greater than a second thickness (see, e.g., paragraph 74 “…a thickness ratio of HZO to ZrO2 may be 2:1 to 10:1.”) of an insulating ZrO2 layer (e.g., first oxide layer 31 + paragraph 73 “…the first oxide layer 31 may be formed as a ZrO2 layer…”), wherein the interleaving HfO2 and ZrO2 layers each have a different thickness (see, e.g., paragraphs 72-74 and 76-80).
Accordingly, it would have been obvious to one of ordinary skill in the art at the time of filing the invention to include the HZO layer including the interleaving HfO2 and ZrO2 layers of Jo within the middle insulator of Yin, in order to achieve the expected result of providing the varied dielectric profile within the capacitor structure, as taught by Jo. In addition, it also would have been obvious to include the thickness ratio of Jo within the configuration of Yin, in order to manipulate the capacitance within the capacitor structure to desirable magnitudes within the insulator layer of the capacitor, enhancing reliability of the device.
With regards to the particular ratio claimed, i.e., more than ten times greater, it is noted that
the specification fails to provide teachings about the criticality of the claimed range, and the
courts have held that differences in thicknesses (or ranges thereof) will not support the patentability of subject matter encompassed by the prior art unless there is evidence indicating such lengths are critical. “Where the general conditions of a claim are disclosed in the prior art, it is not inventive to discover the workable ranges by routine experimentation”. In re Aller, 220 F.2d 454, 456, 105 USPQ 233, 235 (CCPA 1955).
Note that while the specification does discuss the general advantages of the middle insulator layers to be ’…10-18 times greater than the thickness of either the bottom insulator layer….or the top insulator layer…’, it does not explicitly disclose the critical advantage with the exact ratio claimed. The evidence relied upon should establish that the differences in results are in fact unexpected and unobvious and of both statistical and practical significance. Ex parte Gelles, 22 USPQ2d 1318, 1319 (Bd. Pat. App. & Inter. 1992). To establish unexpected results over a claimed range, applicants should compare a sufficient number of tests both inside and outside the claimed range to show the criticality of the claimed range. In re Hill, 284 F.2d 955, 128 USPQ 197 (CCPA 1960).
Since the applicant has not established the criticality (see next paragraph below) of the claimed length ranges, and since Jo teaches a thickness ratio of substantially close to “more than ten times greater”, i.e., ten times greater, it would have been obvious to one of ordinary skill in the art at the time of filing the invention to slightly modify this thickness ratio between the oxide layers of Yin in view of Jo, to expand the HZO layer’s thickness/properties and manipulating the capacitance profile as desired.
CRITICALITY: The specification contains no disclosure of either the critical nature of the claimed distance ranges or any unexpected results arising therefrom. Where patentability is said to be based upon particular chosen dimensions or upon another variable recited in a claim, the
applicant must show that the chosen dimensions are critical. In re Woodruff, 919 F.2d 1575,
1578, 16 USPQ2d 1934, 1936 (Fed. Cir. 1990).
Yin in view of Jo, however, fails to teach wherein each of the bottom layer, the middle layer, and the top layer are conformally deposited over each other using ALD, and after forming the MIM capacitor, performing a high-pressure anneal (HPA) on the insulator layer.
Lee (see, e.g., fig 4), in a similar device to Yin in view of Jo, teaches ZrO2 can be deposited with atomic layer deposition (see, e.g., paragraph 44 “…The dielectric film used for the storage devices can be formed with Atomic Layer Deposition (ALD) films such as Al2O3, HfO2 and ZrO2…”).
Accordingly, it would have been obvious to one of ordinary skill in the art at the time of filing the invention to include the atomic layer deposition (ALD) of Lee within the method of Yin in view of Jo, as atomic layer deposition was a well-known technique at the time of filing the invention as a technique of depositing zirconium oxide dielectric layers.
Yin in view of Jo further in view of Lee, however, fails to teach after forming the MIM capacitor, performing a high-pressure anneal (HPA) on the insulator layer.
Yukinobu (see, e.g., figs. 4-7), in a similar device to Yin in view of Jo further in view of Lee, teaches performing a high-pressure anneal (see, e.g., paragraph text “…in order to densify the SiON film 14 and the SiO.sub.2 film 15, these films are annealed at the temperature of 650 °C for 30 minutes at the atmospheric pressure”) on an insulator layer (e.g., SiON film 14 or SiO.sub.2 film 15).
Accordingly, it would have been obvious to one of ordinary skill in the art at the time of filing the invention to include the high pressure annealing of Yukinobu within the device of Yin in view of Jo further in view of Lee, in order to densify the insulation layers within the capacitor as desired, improving the density and uniformity within the device.
Regarding claim 20, Yin (see, e.g., fig. 16) shows forming the MIM capacitor (e.g., MIM structure 260) further includes: prior to forming the patterned second conductor plate layer (e.g., top conductor plate 269 + paragraph 29 “…patterned top conductor plate layer 269…”), forming one or more additional conductor plates (e.g., middle conductor plate 266) over the insulator layer (e.g., insulator layer 264), wherein the one or more additional conductor plates (e.g., middle conductor plate 266) include the insulator layer (e.g., insulator layer 264) interposing at least one adjacent conductor plate of the one or more additional conductor plates (e.g., middle conductor plate 266), and wherein a second insulator layer (e.g., insulator layer 268) is also deposited over a topmost conductor plate (e.g., middle conductor plate 266) of the one or more additional conductor plates (e.g., middle conductor plate 266), the second insulator layer (e.g., insulator layer 268) having a same structure and composition (see, e.g., paragraph 31) as the insulator layer (e.g., insulator layer 264).
Claim 21 is rejected under 35 U.S.C. 103 as being unpatentable over Yin in view of Jo further in view of Lee and Yang (US 11778809 B1).
Yang (see, e.g., claims 1 and 5), in a similar device to Yin in view of Jo further in view of Lee, teaches an HZO layer (e.g., HZO layer of claim 1) is conformally deposited (e.g., plasma atomic layer deposit of claim 1) to have a thickness in a range between 5-7 nm (see, e.g., claim 5 “…a thickness of the HZO layer is in a range between 4 nm and 6 nm”).
Accordingly, it would have been obvious to one of ordinary skill in the art at the time of filing the invention to include the 6 nm HZO layer range of Yang within the HZO layer of Yin in view of Jo further in view of Lee, in order to limit the cost of fabrication during the manufacturing of the device while still providing a distinct HZO profile within the capacitor configuration.
Claim 23 is rejected under 35 U.S.C. 103 as being unpatentable over Yin in view of Jo further in view of Lee, Yukinobu, and Kim (US 20150179786 A1).
Regarding claim 23, Yukinobu (see, e.g., figs. 4-7) teaches wherein the HPA is performed at a temperature of 650 °C for 30 minutes (see, e.g., paragraph text “Then, in order to densify the SiON film 14 and the SiO.sub.2 film 15, these films are annealed at the temperature of 650 °C for 30 minutes at the atmospheric pressure in the nitrogen atmosphere”) at 1 atm.
Accordingly, it would have been obvious to one of ordinary skill in the art at the time of filing the invention to include the annealing methodology of Yukinobu onto the annealing step of Yin in view of Jo further in view of Lee and Yukinobu, as the methodology of Yukinobu was a known process at the time of filing the invention to carry out the aforementioned step of annealing a dielectric/insulation layer, as taught by Yukinobu.
With regards to the particular temperature and pressure claimed, i.e., 350°C to 450°C and 5-100 atm respectively, it is noted that the specification fails to provide teachings about the criticality of the claimed range, and the courts have held that differences in thicknesses (or ranges thereof) will not support the patentability of subject matter encompassed by the prior art unless there is evidence indicating such lengths are critical. “Where the general conditions of a claim are disclosed in the prior art, it is not inventive to discover the workable ranges by routine experimentation”. In re Aller, 220 F.2d 454, 456, 105 USPQ 233, 235 (CCPA 1955). The evidence relied upon should establish that the differences in results are in fact unexpected and unobvious and of both statistical and practical significance. Ex parte Gelles, 22 USPQ2d 1318, 1319 (Bd. Pat. App. & Inter. 1992). To establish unexpected results over a claimed range, applicants should compare a sufficient number of tests both inside and outside the claimed range to show the criticality of the claimed range. In re Hill, 284 F.2d 955, 128 USPQ 197 (CCPA 1960).
Since the applicant has not established the criticality (see next paragraph below) of the claimed temperature and pressure ranges, and since Yukinobu teaches a temperature and pressure profile substantially close to “350°C to 450°C and 5-100 atm”, it would have been obvious to one of ordinary skill in the art at the time of filing the invention to modify the temperature and pressure metric of Yukinobu, to increase the densification factor even further within the insulator layer setup as desired through a higher pressure, while simultaneously reducing the required thermal budget necessary and further preserving the underlying layers by mildly reducing the temperature during the annealing process.
CRITICALITY: The specification contains no disclosure of either the critical nature of the claimed distance ranges or any unexpected results arising therefrom. Where patentability is said to be based upon particular chosen dimensions or upon another variable recited in a claim, the
applicant must show that the chosen dimensions are critical. In re Woodruff, 919 F.2d 1575,
1578, 16 USPQ2d 1934, 1936 (Fed. Cir. 1990).
Yin in view of Jo further in view of Lee and Yukinobu, however, fails to teach the annealing is performed using hydrogen gas (H2).
Kim (see, e.g., fig. 1), in a similar device to Yin in view of Jo further in view of Lee and Yukinobu, teaches annealing is performed using hydrogen gas (see, e.g., paragraph 16 “…annealing under various conditions including environments containing O.sub.2, N.sub.2, H.sub.2…”).
Accordingly, it would have been obvious to one of ordinary skill in the art at the time of filing the invention to include the hydrogen gas of Kim within the annealing step of Yin in view of Jo further in view of Lee and Yukinobu, as hydrogen gas was a well-known composition at the time of filing the invention to use within an annealing environment (note Kim also lists a hydrogen environment as an alternative to nitrogen, which is the gas disclosed within Yukinobu), as taught by Kim.
Conclusion
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/THOMAS WILSON MCCOY/ Examiner, Art Unit 2814 /WAEL M FAHMY/Supervisory Patent Examiner, Art Unit 2814