Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Continued Examination
The present application is being examined as a continuing application of 17099456 (now US Pat. # 11721762), which is a continuing application of 16231032 (now US Pat. # 10840378), which is a divisional application of 14517209 (now US Pat. # 10164108). Now pending in this application are claims 1-20.
Specification
The specification submitted 6/21/2023 has been accepted by the examiner.
Information Disclosure Statements
The information disclosure statements (IDS) submitted recently have been considered by the examiner.
Drawings
The drawings are objected to under 37 CFR 1.83(a). The drawings must show every feature of the invention specified in the claims. Therefore, the following must be shown or the feature(s) canceled from the claim(s). No new matter should be entered.
Claim 1: wherein a surface of the epitaxial structure is substantially flat and… wherein the horizontal line intersects a direction of the surface of the epitaxial structure at an angle of 90° to 175°.
Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. The figure or figure number of an amended drawing should not be labeled as “amended.” If a drawing figure is to be canceled, the appropriate figure must be removed from the replacement sheet, and where necessary, the remaining figures must be renumbered and appropriate changes made to the brief description of the several views of the drawings for consistency. Additional replacement sheets may be necessary to show the renumbering of the remaining figures. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance.
Claim Objections
Claim 1 is objected to because of the following informalities:
The language “a direction of the surface of the epitaxial structure” is assumed to be a typographical error because it recites something that is inconsistent with the drawings and other claims. The examiner believes that the language “a direction of a surface” is usually used to refer to two normal vectors of a given surface. In this case it seems that the applicant is intending to claim the direction parallel to a surface.
For the sake of compact prosecution, the examiner interprets this limitation as follows: “a direction parallel to [[of]] the surface of the epitaxial structure”
Claim 3 is objected to because of the following informalities:
The language “wherein the crystallographic orientation is [111]” is assumed to be a non-standard because it recites crystallographic information that is inconsistent with the disclosure as a whole. Usually in materials science, it is conventional to use Miller indices to describe crystallographic orientation, and those indices are denoted with parentheses, for example (111). This matches applicant disclosure at [0039].
For the sake of compact prosecution, the examiner interprets this limitation as follows: “wherein the crystallographic orientation is (111)
Claim 4 is objected to because of the following informalities:
Claim 4 contains what the examiner believes to be a typographical error. The applicant recites “wherein the direction of the surface of the epitaxial structure contacts the surface of the fin structure” and further believes that the recitation should be “wherein a line extending in the direction parallel to [[of]] the surface of the epitaxial structure contacts the surface of the fin structure”.
Appropriate correction is required.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
PNG
media_image1.png
633
400
media_image1.png
Greyscale
Claims 1-3, 5, 8-10, 12, 15-17, and 19 are rejected under 35 U.S.C. 102(a)(1)/(a)(2) as being anticipated by Mukherjee (US # 20170256408).
Regarding Claim 1, insofar as the claim scope can be ascertained in view of the 35 USC 112 rejections and/or claim objections above, Mukherjee (US # 20170256408) teaches a fin field effect transistor (FinFET) device structure (see annotated Fig. 3 and other corresponding disclosure), comprising:
a fin structure (222, 232) over a substrate (101, 102); and
an epitaxial structure (322) formed on a surface (top surface of 232) of the fin structure, wherein a surface (inclined surface 323 of feature 322, which corresponds to annotation of dashed line 2) of the epitaxial structure is substantially flat (shown) and wherein a horizontal line (see annotation of dashed line 1) passes through an interface point (corner of 232 at the top-left, where it has an interface with 322) of the surface of the fin structure and the epitaxial structure (line 1 is defined as being directly on the interface), and wherein the horizontal line (dashed line 1) intersects a direction parallel to [[of]] the surface of the epitaxial structure at an angle of 90° to 175° (the top-left side of the intersection of lines 1 and 2 meets that angular limitation, it appears to be an angle of approximately 180-55=125°).
Regarding Claim 2, Mukherjee teaches the FinFET device structure of claim 1, wherein the surface of the epitaxial structure continuously extends along a crystallographic orientation (Fig. 3 shows (1 1 1) surface; see also [0082]).
Regarding Claim 3, Mukherjee teaches the FinFET device structure of claim 2, wherein the crystallographic orientation is (111)
Regarding Claim 5, Mukherjee teaches the FinFET device structure of claim 1, wherein the FinFET device structure is an NMOS device ([0032] describes NMOS).
Regarding Claim 8, Mukherjee teaches a fin field effect transistor (FinFET) device structure, comprising:
a semiconductor substrate (101, 102);
a fin structure (222, 232) over the semiconductor substrate (shown); and
an epitaxial structure (322) overlying a first surface (top surface of 232) of the fin structure, wherein a second surface (inclined surface 323 of feature 322, which corresponds to annotation of dashed line 2) of the epitaxial structure is substantially flat (shown), wherein a first angle θ1 between a first line and the second surface is between 90° and 175° (the top-left side of the intersection of lines 1 and 2 meets that angular limitation, it appears to be an angle of approximately 180-55=125°), and wherein the first line extends between a first point where the first surface intersects a first sidewall of the fin structure to a second point where the first surface intersects a second sidewall of the fin structure (shown extending to all points across the first surface), the first sidewall opposite the second sidewall (opposite sidewalls of fin 232).
Claim 9 is rejected for essentially the same reasons as claim 2.
Claim 10 is rejected for essentially the same reasons as claim 3.
Claim 12 is rejected for essentially the same reasons as claim 5.
Regarding Claim 15, Mukherjee teaches a fin field effect transistor (FinFET) device structure comprising:
an epitaxial source/drain region (322) located over a semiconductor substrate (101, 102), the epitaxial source/drain region comprising a first surface (inclined surface 323 of feature 322, which corresponds to annotation of dashed line 2), the first surface being substantially flat and extending along a first direction (corresponds to the direction of dashed line 2); and
a semiconductor fin (222, 232) extending between the epitaxial source/drain region and the semiconductor substrate (shown), the semiconductor fin comprising a second surface (top surface of 232), wherein a line (corresponds to dashed line 1) extending in a second direction (corresponds to the direction of dashed line 1) through at least two points on the second surface is parallel with a major surface of the semiconductor substrate (shown), and wherein the first direction and the second direction intersect at a first angle θ1, the first angle θ1 being between about 90° and about 175° (the top-left side of the intersection of lines 1 and 2 meets that angular limitation, it appears to be an angle of approximately 180-55=125°).
Claim 16 is rejected for essentially the same reasons as claim 2.
Claim 17 is rejected for essentially the same reasons as claim 3.
Claim 19 is rejected for essentially the same reasons as claim 5.
Claims 1, 4, 8, 11, 15, and 18 are rejected under 35 U.S.C. 102(a)(1)/(a)(2) as being anticipated by Loubet (US # 20140353753).
PNG
media_image2.png
373
509
media_image2.png
Greyscale
Regarding Claim 1, insofar as the claim scope can be ascertained in view of the 35 USC 112 rejections and/or claim objections above, Loubet (US # 20140353753) teaches a fin field effect transistor (FinFET) device structure (see Fig. 9 and other corresponding disclosure), comprising:
a fin structure (160) over a substrate (100); and
an epitaxial structure (190) formed on a surface (top flat surface of 160 that is under the lowest portion of 190) of the fin structure, wherein a surface (inclined portion of 190 that interfaces with feature 165) of the epitaxial structure is substantially flat (shown) and wherein a horizontal line (imagine a line between gate stacks that is on the surface of 160) passes through an interface point of the surface of the fin structure and the epitaxial structure (a point of interface is on the far left side of the surface of the feature 160), and wherein the horizontal line intersects a direction parallel to [[of]] the surface of the epitaxial structure at an angle of 90° to 175° (see annotated drawing Fig. 9 showing the obtuse angle between the claimed lines/directions/surfaces).
Regarding Claim 4, insofar as the claim scope can be ascertained in view of the 35 USC 112 rejections and/or claim objections above, Loubet teaches the FinFET device structure of claim 1, wherein the direction parallel to [[of]] the surface of the epitaxial structure contacts the surface of the fin structure (line 2 passes through fin feature 160).
Regarding Claim 8, Loubet teaches a fin field effect transistor (FinFET) device structure, comprising:
a semiconductor substrate (100);
a fin structure (160) over the semiconductor substrate; and
an epitaxial structure (190) overlying a first surface (corresponds to dashed line 1 in the annotated drawing; top flat surface of 160 that is under the lowest portion of 190) of the fin structure, wherein a second surface (corresponds to dashed line 2 in the annotated drawing) of the epitaxial structure is substantially flat (shown), wherein a first angle θ1 between a first line and the second surface is between 90° and 175° (see annotated drawing Fig. 9 showing the obtuse angle between the claimed lines/directions/surfaces), and wherein the first line extends between a first point where the first surface intersects a first sidewall of the fin structure to a second point where the first surface intersects a second sidewall of the fin structure, the first sidewall opposite the second sidewall (dashed line 1 extends across to all points on the top surface of the fin, including the sidewall-corners of the fin).
Claim 11 is rejected for essentially the same reasons as claim 4.
Regarding Claim 15, Loubet teaches a fin field effect transistor (FinFET) device structure comprising:
an epitaxial source/drain region (190) located over a semiconductor substrate (100), the epitaxial source/drain region comprising a first surface (corresponds to dashed line 2 in the annotated drawing), the first surface being substantially flat and extending along a first direction (corresponds to direction of dashed line 2); and
a semiconductor fin (160) extending between the epitaxial source/drain region and the semiconductor substrate (shown), the semiconductor fin comprising a second surface (corresponds to dashed line 1 in the annotated drawing; top flat surface of 160 that is under the lowest portion of 190), wherein a line (corresponds to dashed line 1) extending in a second direction (corresponds to direction of dashed line 1) through at least two points on the second surface is parallel with a major surface of the semiconductor substrate (dashed line 1 extends across to all points on the top surface of the fin, including the sidewall-corners of the fin), and wherein the first direction and the second direction intersect at a first angle θ1, the first angle θ1 being between about 90° and about 175° (see annotated drawing Fig. 9 showing the obtuse angle between the claimed lines/directions/surfaces).
Claim 18 is rejected for essentially the same reasons as claim 4.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claims 6-7, 13-14, and 20 are rejected under 35 U.S.C. 103 as being unpatentable over Mukherjee (US # 20170256408) in view of Loubet (US # 20140353753).
Regarding Claim 6, although Mukherjee discloses much of the claimed invention, it does not explicitly teach the FinFET device structure of claim 5, wherein the epitaxial structure includes an epitaxially grown silicon.
Nonetheless the prior art at the time the application was filed renders such non-explicit feature differences obvious, as explained below.
For example, Loubet is in the same or analogous field, and it teaches FinFET device structure, wherein an epitaxial structure (190) on a fin (160) includes an epitaxially grown silicon ([0034-35]) for composing a NMOS FinFET.
A person having ordinary skill in the art would have recognized that modifying the epitaxial material of Mukherjee with the material suggested by Loubet would be obvious. Specifically, the modification suggested by Loubet would be to employ a FinFET device structure of claim 5, wherein the epitaxial structure includes an epitaxially grown silicon. It would have been obvious to one of ordinary skill in the art at the time the claimed invention was made to use silicon with phosphorous since it has been held by the courts that selection of a prior art material on the basis of its suitability for its intended purpose (e.g. materials for an NMOS FinFET) is within the level of ordinary skill. In re Leshing, 125 USPQ 416 (CCPA 1960) and Sinclair & Carroll Co. v. Interchemical Corp., 65 USPQ 297 (1945).
Regarding Claim 7, Loubet, as applied to claim 6, teaches the FinFET device structure of claim 5, wherein the epitaxial structure is doped with phosphorous to form a Si:P epitaxial structure ([0034-35]).
Claim 13 is rejected for essentially the same reasons as claim 6.
Claim 14 is rejected for essentially the same reasons as claim 7.
Claim 20 is rejected for essentially the same reasons as claim 7.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to CHRISTOPHER A JOHNSON whose telephone number is (571)272-9475. The examiner can normally be reached normally working Monday to Friday between 9 am and 6 pm Eastern Time.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Brent Fairbanks can be reached on (408) 918-7532. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/CHRISTOPHER A JOHNSON/ Primary Examiner, Art Unit 2899