Prosecution Insights
Last updated: May 29, 2026
Application No. 18/338,813

DISPLAY DEVICE

Non-Final OA §102§103
Filed
Jun 21, 2023
Priority
Jun 22, 2022 — RE 10-2022-0076441
Examiner
NGUYEN, DUY T V
Art Unit
2818
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Samsung Display Co., Ltd.
OA Round
1 (Non-Final)
79%
Grant Probability
Favorable
1-2
OA Rounds
0m
Est. Remaining
96%
With Interview

Examiner Intelligence

Grants 79% — above average
79%
Career Allowance Rate
834 granted / 1060 resolved
+10.7% vs TC avg
Strong +17% interview lift
Without
With
+16.8%
Interview Lift
resolved cases with interview
Typical timeline
2y 8m
Avg Prosecution
57 currently pending
Career history
1118
Total Applications
across all art units

Statute-Specific Performance

§101
1.5%
-38.5% vs TC avg
§103
78.9%
+38.9% vs TC avg
§102
4.1%
-35.9% vs TC avg
§112
6.4%
-33.6% vs TC avg
Black line = Tech Center average estimate • Based on career data from 1060 resolved cases

Office Action

§102 §103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Specification 1. The title of the invention is not descriptive. A new title is required that is clearly indicative of the invention to which the claims are directed. Appropriate correction is required. Claim Rejections - 35 USC § 102 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. 2. Claims 1, 3-11, 13, 16 and 20 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Kim et al. (US 2016/0351093). Re claim 1, Kim teaches, under BRI, Figs. 2 & 8, [0056, 0105, 0116, 0118], a display device comprising: -electrodes (e.g., in pixels RP along sides of DA & electrodes e.g., SE, DE, GE, E1, E2 shown in Fig. 8) spaced from each other in a display area (DA); -light emitting elements (OLEDs in center RPs) between the electrodes; -test electrodes (TVP1, TVP2) spaced from each other in a test area (NDA); and -a test transistor (TT1) electrically connected to the electrodes (in pixels) and the test electrodes (TVP1, TVP2). PNG media_image1.png 555 509 media_image1.png Greyscale Re claim 3, Kim teaches, Figs. 2 & 8, the electrodes (consider SE, DE, Fig. 8) and the test electrodes (TVP1, 2) extend in same direction (vertical direction). Re claim 4, Kim teaches, Fig. 2, [0061] a first transistor electrode of the test transistor (TT1) is in contact with the test electrodes (TVP1, 2), and a second transistor electrode of the test transistor (TT1) is in contact with the electrodes (in pixel RP). Re claim 5, Kim teaches, Fig. 2, [0054], a test line (between TVP & TT1 or crack sensing line CD1) connected to the test transistor (TT1). Re claim 6, Kim teaches, Fig. 2, [0053], signal lines (S1-Sn) connected to the electrodes (in pixels). Re claim 7, Kim teaches, Figs. 2 & 8, the test line (CD1) and the signal line (S1) are electrically separated from each other (via IL layers). Re claim 8, Kim teaches, Fig. 2, a test pad (TP1) connected to the test line (CD1 or line between TVP1 & TT1) (via NDA area). Re claim 9, Kim teaches, under BRI, Fig. 8, [0113], connection electrodes (TL1, 2) on the light emitting elements (OLED) to be in contact with the light emitting elements (OLED) (via EN layer). Re claim 10, Kim teaches, under BRI, Figs. 2 & 8, [0056, 0100, 0105, 0113, 0116, 0118], a display device comprising: -a first electrode and a second electrode (E1, E2 or SE, GE) spaced from each other in a display area (DA); -light emitting elements (EL of OLEDs or OLEDs in array, Fig. 2) between the first and second electrodes (E1, E2); and -a first test electrode and a second test electrode (CD1, CD2, TL1, TL2 of sensing lines/touch lines) spaced from each other in a test area (above OLED), wherein the first electrode (E1) at least partially overlaps the first test electrode (TL2), and wherein the second electrode (E2) at least partially overlaps the second test electrode (TL1). PNG media_image2.png 692 730 media_image2.png Greyscale Re claim 11, Kim teaches, Fig. 8, the first electrode (E1 or SE) and the first test electrode (TL1) comprise different conductive layers (at different levels). Re claim 13, Kim teaches, under BRI, Figs. 2 & 8, [0056, 0105, 0116, 0118], a display device comprising: -electrodes (e.g., in pixels RP along sides of DA & electrodes shown in Fig. 8) spaced from each other in a display area (DA); -light emitting elements (OLEDs in center RPs) between the electrodes; -test electrodes (TVP1, TVP2) spaced from each other in a test area (NDA); and -a conductive pattern (e.g., S/D of IT1, IT2 or conductive lines) between the electrodes (in pixels RP) and the test electrodes (TVP1, 2) (in vertical/horizontal direction). PNG media_image1.png 555 509 media_image1.png Greyscale Re claim 16, Kim teaches, Fig. 2, one end of the conductive pattern (e.g., conductive line) is in contact with the electrodes (in pixels RP), and another end of the conductive pattern is in contact with the test electrodes (TPV1). Re claim 20, Kim teaches, Fig. 2, the electrodes (in RP) and the test electrodes (TVP1, 2) are spaced apart from each other. 3. Claims 10-13, 15 and 17-20 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Sim et al. (US 2021/0332256). Re claim 10, Sim teaches, under BRI, Figs. 1 & 3, [0052, 0059, 0093], a display device comprising: -a first electrode and a second electrode (21, 22) spaced from each other in a display area (DPA); -light emitting elements (30) between the first and second electrodes (21, 22); and -a first test electrode and a second test electrode (CNE1, 2 as contact electrodes) spaced from each other in a test area (above 30), wherein the first electrode (21) at least partially overlaps the first test electrode (CNE1), and wherein the second electrode (22) at least partially overlaps the second test electrode (CNE2). Note: “test” = labeling or intended use. PNG media_image3.png 466 868 media_image3.png Greyscale Re claims 11 & 12, Sim teaches, Fig. 3, the first electrode (21) and the first test electrode (CNE1) comprises different conductive layers (at different levels), and wherein the first electrode (21) is in contact with the first test electrode (CNE1) through a contact hole (in PAS1). Re claim 13, Sim teaches, under BRI, Figs. 1 & 3, [0052, 0059, 0093], a display device comprising: -electrodes (21, 22) spaced from each other in a display area (DPA); -light emitting elements (30) between the electrodes (21, 22); and -test electrodes (CNE1, 2 as contact electrodes) spaced from each other in a test area (above 30); and -a conductive pattern (portion of CNE1 in PAS1) between the electrodes (21, 22) and the test electrodes (CNE1, 2) (in horizontal direction). Note: “test” = labeling or intended use. PNG media_image3.png 466 868 media_image3.png Greyscale Re claim 15, Sim teaches, Fig. 3, the conductive pattern (portion of CNE1 in PAS1) is on the electrodes (21, 21) and/or the test electrodes. Re claim 17, Sim teaches, Fig. 3, the electrodes (21, 22) include an open portion (exposed by PAS1) overlapping the conductive pattern (portion of CNE1, 2 in PAS1). Re claim 18, Sim teaches, Fig. 3, the test electrodes (CNE1, 2) include an open portion (V portion above OP) overlapping the conductive pattern (of CNE1, 2 in OP). Re claim 19, Sim teaches the conductive pattern comprises a material (e.g., Al) [0112] is different from that of the electrodes (21, 22, e.g., Cu) [0091] and/or the test electrodes. Re claim 20, Sim teaches, Fig. 3, the electrodes (21, 22) and the test electrodes (CNE1, 2) are spaced apart from each other (by PAS1). Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. 4. Claims 2, 14 and 15 are rejected under 35 U.S.C. 103 as being unpatentable over Kim in view of Sim et al. (US 2021/0332256). The teachings of Sim have been discussed above. Re claims 2 & 14, Kim does not explicitly teach the electrodes and the test electrodes comprise a same conductive layer. Sim teaches, Fig. 3, the electrodes (consider 21 in Q2-Q2’) and the test electrodes (consider 21 in Q1-Q1’) comprise a same conductive layer. As taught by Sim, one of ordinary skill in the art would utilize & modify the above teaching to obtain the electrodes and the test electrodes comprise a same conductive layer as claimed, because it aids in achieving cost effective & reducing process steps. Thus, it would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to employ the teaching as taught by Sim in combination with Kim due to above reason. Re claim 15, in combination cited above, Sim teaches, Fig. 3, the conductive pattern (portion of CNE1 in PAS1) is on the electrodes (21, 21) and/or the test electrodes. Conclusion 5. Any inquiry concerning this communication or earlier communications from the examiner should be directed to DUY T.V. NGUYEN whose telephone number is (571)270-7431. The examiner can normally be reached Monday-Friday, 7AM-4PM, alternative Friday off. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, EVA MONTALVO can be reached at (571) 270-3829. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /DUY T NGUYEN/ Primary Examiner, Art Unit 2818 5/7/26
Read full office action

Prosecution Timeline

Jun 21, 2023
Application Filed
May 11, 2026
Non-Final Rejection mailed — §102, §103 (current)

Precedent Cases

Applications granted by this same examiner with similar technology

Patent 12641850
LATTICE STACK FOR INTERNAL SPACER FABRICATION
4y 6m to grant Granted May 26, 2026
Patent 12635334
LIGHT EMITTING DISPLAY DEVICE HAVING BUMPY PATTERN ON RAMP
3y 6m to grant Granted May 19, 2026
Patent 12635144
METAL OXIDE FILM AND SEMICONDUCTOR DEVICE
3y 2m to grant Granted May 19, 2026
Patent 12635287
HIGH ABSORPTION PHOTOVOLTAIC MATERIAL AND METHODS OF MAKING THE SAME
3y 1m to grant Granted May 19, 2026
Patent 12635152
MANUFACTURING METHOD OF A SEMICONDUCTOR DEVICE HAVING HIGH-VOLTAGE ISOLATION CAPACITOR
3y 1m to grant Granted May 19, 2026
Study what changed to get past this examiner. Based on 5 most recent grants.

Strategy Recommendation AI-generated — please review before filing

Get a prosecution strategy drawn from examiner precedents, rejection analysis, and claim mapping.
Typically takes 5-10 seconds — AI-generated, attorney review required before filing

Prosecution Projections

1-2
Expected OA Rounds
79%
Grant Probability
96%
With Interview (+16.8%)
2y 8m (~0m remaining)
Median Time to Grant
Low
PTA Risk
Based on 1060 resolved cases by this examiner. Grant probability derived from career allowance rate.

Sign in with your work email

Enter your email to receive a magic link. No password needed.

Personal email addresses (Gmail, Yahoo, etc.) are not accepted.

Free tier: 3 strategy analyses per month