Prosecution Insights
Last updated: July 17, 2026
Application No. 18/339,549

SEMICONDUCTOR DEVICES WITH IMPROVED LEAKAGE CURRENT CONTROL

Non-Final OA §103
Filed
Jun 22, 2023
Examiner
ENAD, CHRISTINE A
Art Unit
2811
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Taiwan Semiconductor Manufacturing Company, Ltd.
OA Round
3 (Non-Final)
84%
Grant Probability
Favorable
3-4
OA Rounds
0m
Est. Remaining
94%
With Interview

Examiner Intelligence

Grants 84% — above average
84%
Career Allowance Rate
1121 granted / 1331 resolved
+16.2% vs TC avg
Moderate +10% lift
Without
With
+10.3%
Interview Lift
resolved cases with interview
Fast prosecutor
1y 11m
Avg Prosecution
34 currently pending
Career history
1395
Total Applications
across all art units

Statute-Specific Performance

§101
0.3%
-39.7% vs TC avg
§103
86.5%
+46.5% vs TC avg
§102
3.2%
-36.8% vs TC avg
§112
1.3%
-38.7% vs TC avg
Black line = Tech Center average estimate • Based on career data from 1331 resolved cases

Office Action

§103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Continued Examination Under 37 CFR 1.114 A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 3/25/2026 has been entered. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 16-18, 20 are rejected under 35 U.S.C. 103 as being unpatentable over Kim et al (US Publication No. 2015/0287829) in view of Chi et al (US Publication No. 2022/0093774) and Huang et al (US Publication No. 2021/0066294). Regarding claim 16, Kim discloses a method, comprising: forming a channel structure Fig 1B, FP1a on a substrate Fig 1A-1D, 100; forming a first isolation layer Fig 4B, 110 on the substrate and surrounding a first portion of the channel structure Fig 4B, wherein the first portion has a first width Fig 4B; trimming the channel structure above the first isolation layer Fig 5B; forming a second isolation layer on the first isolation layer, wherein the second isolation Fig 6A layer surrounds a second portion of the channel structure and the second portion has a second width less than the first width Fig 7A; and forming a gate structure on the second isolation layer and surrounding a third portion of the channel structure Fig 8A, wherein the third portion has a third width less than the second width Fig 8A. Kim discloses all the limitations but silent on the specific shape of the channel structure. Whereas Chi discloses wherein the channel structure has a sloped sidewall surface from a top end to a bottom end Fig 10 and a sloped second portion and a vertical third portion Fig 10. Kim and Chi are analogous art because they are directed to semiconductor devices having fin channel and one of ordinary skill in the art would have had a reasonable expectation of success to modify Kim because they are from the same field of endeavor. Therefore it would have been obvious to one having ordinary skill of the art before the effective filing date of the claimed invention to modify the shape of the channel structure and incorporate the teachings of Chi since such a modification would have involved a mere change in the shape of a component. A change in shape is generally recognized as being within the level of ordinary skill in the art. In reDailey, 357 F.2d 669, 149 USPQ 47 (CCPA 1966). Kim and Chi discloses all the limitations but silent on the directional etching. Whereas Huang discloses a method, comprising: forming a channel structure on a substrate Fig 1A, wherein the channel structure has a sloped sidewall surface from a top end to a bottom end Fig 1A; trimming, with a directional etching process ¶0020. Kim and Huang are analogous art because they are directed to semiconductor devices and one of ordinary skill in the art would have had a reasonable expectation of success to modify Kim because they are from the same field of endeavor. Therefore it would have been obvious to one having ordinary skill of the art before the effective filing date of the claimed invention to modify the etching process and incorporate the teachings of Huang as an alternative etching process known in the art to provide an improved manufacturing step. Regarding claim 17, Kim discloses wherein trimming the channel structure above the first isolation layer comprises forming the second portion of the channel structure with sloped sidewall surfaces Fig 5B ¶0086 and 0098 and forming the third portion of the channel structure with substantially vertical sidewall surfaces Fig 8A. Regarding claim 18, Kim discloses forming a source/drain structure on the second portion of the channel structure and above the second isolation layer Fig 1A-1D¶0090-0093. Regarding claim 20, Kim discloses wherein forming the gate structure comprises forming substantially vertical sidewall surfaces for the gate structure Fig 8A. Claim 19 is rejected under 35 U.S.C. 103 as being unpatentable over Kim et al (US Publication No. 2015/0287829) and Chi et al (US Publication No. 2022/0093774) and Huang et al (US Publication No. 2021/0066294) and in further view of More et al (US Publication No. 2021/0408229). Regarding claim 19, Kim discloses all the limitations except for the deposition method. Whereas More discloses wherein forming the isolation layer comprises depositing a dielectric material using a flowable chemical vapor deposition method ¶0036. Kim and More are analogous art because they are directed to semiconductor devices having fin channel and one of ordinary skill in the art would have had a reasonable expectation of success to modify Kim because they are from the same field of endeavor. Therefore it would have been obvious to one having ordinary skill of the art before the effective filing date of the claimed invention to modify the method of forming the isolation layer and incorporate the teachings of More as an alternative method known in the art in forming STI layer. Allowable Subject Matter Claims 1-15 are allowed over the prior art of record. The following is an examiner’s statement of reasons for allowance: After further search and consideration of Applicant’s response, it is determined that the prior art of record neither anticipates nor renders obvious the claimed subject matter of the instant application as a whole either taken alone or in combination, in particular, prior art of record does not teach or suggest the specific channel arrangement and orientation relative to the isolation layers, as recited in independent claims 1 and 8. Claims 2-7, 9-15 are also allowed as being directly or indirectly dependent of the allowed independent base claims. Any comments considered necessary by applicant must be submitted no later than the payment of the issue fee and, to avoid processing delays, should preferably accompany the issue fee. Such submissions should be clearly labeled “Comments on Statement of Reasons for Allowance.” Response to Arguments Applicant’s arguments with respect to claims 1-20 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to CHRISTINE A ENAD whose telephone number is (571)270-7891. The examiner can normally be reached Monday-Friday, 7:30 am -4:30 pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Lynne Gurley can be reached at 571 272 1670. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /CHRISTINE A ENAD/Primary Examiner, Art Unit 2811
Read full office action

Prosecution Timeline

Show 9 earlier events
Mar 12, 2026
Examiner Interview Summary
Mar 12, 2026
Applicant Interview (Telephonic)
Mar 25, 2026
Request for Continued Examination
Mar 31, 2026
Response after Non-Final Action
Apr 20, 2026
Non-Final Rejection mailed — §103
Jun 21, 2026
Interview Requested
Jul 07, 2026
Applicant Interview (Telephonic)
Jul 07, 2026
Examiner Interview Summary

Precedent Cases

Applications granted by this same examiner with similar technology

Patent 12681012
BIOSENSOR AND A BIOSENSING KIT
2y 10m to grant Granted Jul 14, 2026
Patent 12677462
INTEGRATING STANDARD-GATE TRANSISTORS AND EXTENDED-GATE TRANSISTORS ON THE SAME SUBSTRATE USING LOW-TEMPERATURE GATE DIELECTRIC TREATMENTS
4y 8m to grant Granted Jul 07, 2026
Patent 12666936
INTEGRATED CIRCUIT DEVICE INCLUDING GATE CONTACT
3y 6m to grant Granted Jun 23, 2026
Patent 12666641
SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME
2y 11m to grant Granted Jun 23, 2026
Patent 12666633
SIGNAL TRANSMISSION DEVICE
2y 6m to grant Granted Jun 23, 2026
Study what changed to get past this examiner. Based on 5 most recent grants.

Strategy Recommendation AI-generated — please review before filing

Get a prosecution strategy drawn from examiner precedents, rejection analysis, and claim mapping.
Typically takes 5-10 seconds — AI-generated, attorney review required before filing

Prosecution Projections

3-4
Expected OA Rounds
84%
Grant Probability
94%
With Interview (+10.3%)
1y 11m (~0m remaining)
Median Time to Grant
High
PTA Risk
Based on 1331 resolved cases by this examiner. Grant probability derived from career allowance rate.

Sign in with your work email

Enter your email to receive a magic link. No password needed.

Personal email addresses (Gmail, Yahoo, etc.) are not accepted.

Free tier: 3 strategy analyses per month