DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Election/Restrictions
Applicant’s election without traverse of Group I, claims 1-15, in the reply filed on 03/04/2026 is acknowledged.
Status of the Application
Claims 1-20 remain pending in this application. Claims 16-20 are withdrawn.
Priority
Receipt is acknowledged of certified copies of papers required by 37 CFR 1.55.
Specification
The title of the invention is not descriptive. A new title is required that is clearly indicative of the invention to which the claims are directed.
Claim Rejections - 35 USC § 112
Claim 6 is rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Regarding claim 6, it recites the limitation “in a range of about 120 degrees or more” in lines 1 and 2 of the claim, which does not adequately define the metes and bounds of the claim, and one of ordinary skill in the art would not be reasonably apprised of the scope of the invention. One of ordinary skill in the art would only conclude that certain exemplary embodiments qualify, but without a definite criterion by which to ascertain whether any non-disclosed embodiments so qualifies. For example, it is unclear if the claim is intended to limit the angle to a specific range, such as +/-10%, or some other range. This renders the scope of the claim indefinite. For the purpose of compact prosecution, the Examiner has interpreted “in a range of about 120 degrees or more” to mean “120 degrees or more”.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1-15 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Dimitropoulos et al (US 20200105969 A1, hereafter Dimitropoulos).
Regarding claim 1, Dimitropoulos discloses: A light emitting element (Dimitropoulos 2000, fig 1B, 10A, 20, ¶0106) comprising:
a first end surface (Dimitropoulos, top surface of 2010) and a second end surface (Dimitropoulos, bottom surface of 2025) opposite to each other (Dimitropoulos fig 20);
a first semiconductor layer (Dimitropoulos 2010, ¶0106) disposed at the first end surface (Dimitropoulos fig 20);
an active layer (Dimitropoulos 2015, ¶0106) disposed on the first semiconductor layer (Dimitropoulos fig 20);
a second semiconductor layer (Dimitropoulos 2020, ¶0106) disposed on the active layer (Dimitropoulos fig 20); and
an electrode layer (Dimitropoulos 2025, ¶0106, under a broadest reasonable interpretation (BRI) of “electrode”) disposed on the second semiconductor layer and disposed at the second end surface (Dimitropoulos fig 20, ¶0106), wherein
the first semiconductor layer (Dimitropoulos 2010) includes:
a first part (Dimitropoulos first part, annotated Dimitropoulos fig 20, provided below, patterned part of 2010, fig 20, ¶0042, 0048, 0053, 0075, 0117),
a second part (Dimitropoulos second part, annotated Dimitropoulos fig 20, sloped part of 2010, fig 20, ¶0042, 0048, 0053, 0075, 0117) disposed on the first part and adjacent to the active layer (annotated Dimitropoulos fig 20), and
a third part (Dimitropoulos first part, annotated Dimitropoulos fig 20, provided below, patterned part of 2010, fig 20, ¶0042, 0048, 0053, 0075, 0117) disposed between the first part and the second part (annotated Dimitropoulos fig 20),
a width of the first part and a width of the second part are different from each other (annotated Dimitropoulos fig 1B, 20, ¶0048, second part is greater than W and first part is less than W), and
the third part has different widths at different length positions (annotated Dimitropoulos fig 1B, 20, ¶0048, having sloped sidewalls).
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Annotated Dimitropoulos fig 20
Regarding claim 2, Dimitropoulos discloses: The light emitting element of claim 1, wherein each of the first part (Dimitropoulos first part, annotated Dimitropoulos fig 20 above) and the second part (Dimitropoulos second part, annotated Dimitropoulos fig 20) of the first semiconductor layer (Dimitropoulos 2010) has a cylindrical pillar shape (annotated Dimitropoulos fig 20, ¶0050, 0053, under a BRI of “cylindrical pillar”), and
the width of the second part is greater than the width of the first part (annotated Dimitropoulos fig 1B, 20, ¶0048, second part is greater than W and first part is less than W).
Regarding claim 3, Dimitropoulos discloses: The light emitting element of claim 2, wherein the width of the third part (Dimitropoulos third part, annotated Dimitropoulos fig 20) of the first semiconductor layer (Dimitropoulos 2010) increases as becoming closer to the second part (Dimitropoulos second part, annotated Dimitropoulos fig 20) from the first part (Dimitropoulos first part, annotated Dimitropoulos fig 20)(annotated Dimitropoulos fig 20, ¶0048).
Regarding claim 4, Dimitropoulos discloses: The light emitting element of claim 3, wherein the third part (Dimitropoulos third part, annotated Dimitropoulos fig 20) of the first semiconductor layer (Dimitropoulos 2010) has a truncated cone shape (annotated Dimitropoulos fig 20, ¶0048).
Regarding claim 5, Dimitropoulos discloses: The light emitting element of claim 3, wherein a side surface of the third part (Dimitropoulos third part, annotated Dimitropoulos fig 20) has a slope at an angle with respect to the first end surface (Dimitropoulos, top surface of 2010) of the light emitting element (Dimitropoulos 2000)(annotated Dimitropoulos fig 20).
Regarding claim 6, Dimitropoulos discloses: The light emitting element of claim 5, wherein the angle is in a range of about 120 degrees or more (as best understood to mean “120 degrees or more”)(Dimitropoulos ¶0044, 0048, “sloped sidewalls … 160 degrees”).
Regarding claim 7, Dimitropoulos discloses: The light emitting element of claim 2, wherein each of the active layer (Dimitropoulos 2015), the second semiconductor layer (Dimitropoulos 2020), and the electrode layer (Dimitropoulos 2025) has a cylindrical pillar shape (Dimitropoulos fig 1B, 13, 20, ¶0050, 0053, under a BRI of “cylindrical pillar”).
Regarding claim 8, Dimitropoulos discloses: The light emitting element of claim 7, wherein a width of the active layer (Dimitropoulos 2015), a width of the second semiconductor layer (Dimitropoulos 2020), a width of the electrode layer (Dimitropoulos 2025), and the width of the second part (Dimitropoulos second part, annotated Dimitropoulos fig 20) of the first semiconductor layer (Dimitropoulos 2010) are substantially same as each other (annotated Dimitropoulos fig 20, fig 1B, ¶0048, at least the exterior diameters of each layer has width 2s+W).
Regarding claim 9, Dimitropoulos discloses: The light emitting element of claim 1, further comprising: a reflective layer (Dimitropoulos 2030, ¶0056, 0070, 0117, “n-contacts … provide … optical reflection”) surrounding a side surface of the first semiconductor layer (Dimitropoulos 2010), a side surface of the active layer (Dimitropoulos 2015), a side surface of the second semiconductor layer (Dimitropoulos 2020), and a side surface of the electrode layer (Dimitropoulos 2025)(Dimitropoulos fig 20, ¶0070, “entirely surround each LED to provide for optical isolation and/or optical reflection”).
Regarding claim 10, Dimitropoulos discloses: The light emitting element of claim 9, wherein the reflective layer (Dimitropoulos 2030) includes a reflective metal material (Dimitropoulos ¶0056, “silver… aluminum or aluminum alloy”).
Regarding claim 11, Dimitropoulos discloses: The light emitting element of claim 1, further comprising: an insulative film (Dimitropoulos 2040/2055/2060, 1140, ¶0108, 0117) surrounding a side surface of the first semiconductor layer (Dimitropoulos 2010), a side surface of the active layer (Dimitropoulos 2015), a side surface of the second semiconductor layer (Dimitropoulos 2020), and a side surface of the electrode layer (Dimitropoulos 2025)(Dimitropoulos fig 11A, 20, ¶0108, 0177, “between the epitaxial layers and n-contact 2030, … a dielectric insulator 2040”).
Regarding claim 12, Dimitropoulos discloses: The light emitting element of claim 11, wherein the insulative film (Dimitropoulos 2040/2055/2060) exposes the first end surface (Dimitropoulos, top surface of 2010) of the light emitting element (Dimitropoulos 2000) as a lower surface of the first semiconductor layer (Dimitropoulos 2010), and exposes the second end surface (Dimitropoulos, bottom surface of 2025) of the light emitting element as an upper surface of the electrode layer (Dimitropoulos 2025)(Dimitropoulos 20, first and second end surfaces not covered vertically by 2040, therefore meeting a BRI of the insulative film exposes the ends).
Regarding claim 13, Dimitropoulos discloses: A display device (Dimitropoulos 585, 1900, 2000, ¶0041, 0080, 0103, fig 19A, 20) comprising:
a pixel (Dimitropoulos 585, 1900, 2000, fig 1B, 10A, 20, ¶0066, 0089, 0106) including:
a first electrode (Dimitropoulos 2030, ¶0056, 0075, 0078, 0177),
a second electrode (Dimitropoulos 585, ¶0073, 0094), and
a light emitting element (Dimitropoulos 2000, fig 1B, 10A, 20, ¶0106) including:
a first end surface (Dimitropoulos, top surface of 2010) electrically connected to the first electrode (Dimitropoulos, ¶0056, 0075, 0078, 0177), and
a second end surface (Dimitropoulos, bottom surface of 2025) electrically connected to the second electrode (Dimitropoulos, ¶0073, 0075, 0094), wherein
the light emitting element includes:
a first semiconductor layer (Dimitropoulos 2010, ¶0106) disposed at the first end surface (Dimitropoulos fig 20);
an active layer (Dimitropoulos 2015, ¶0106) disposed on the first semiconductor layer (Dimitropoulos fig 20);
a second semiconductor layer (Dimitropoulos 2020, ¶0106) disposed on the active layer (Dimitropoulos fig 20); and
an electrode layer (Dimitropoulos 2025, ¶0106, under a BRI of “electrode”) disposed on the second semiconductor layer and disposed at the second end surface (Dimitropoulos fig 20, ¶0106),
the first semiconductor layer (Dimitropoulos 2010) includes:
a first part (Dimitropoulos first part, annotated Dimitropoulos fig 20, provided above, patterned part of 2010, fig 20, ¶0042, 0048, 0053, 0075, 0117),
a second part (Dimitropoulos second part, annotated Dimitropoulos fig 20, sloped part of 2010, fig 20, ¶0042, 0048, 0053, 0075, 0117) disposed on the first part and adjacent to the active layer (annotated Dimitropoulos fig 20), and
a third part (Dimitropoulos first part, annotated Dimitropoulos fig 20, patterned part of 2010, fig 20, ¶0042, 0048, 0053, 0075, 0117) disposed between the first part and the second part (annotated Dimitropoulos fig 20),
a width of the first part and a width of the second part are different from each other (annotated Dimitropoulos fig 1B, 20, ¶0048, second part is greater than W and first part is less than W), and
the third part has different widths at different length positions (annotated Dimitropoulos fig 1B, 20, ¶0048, having sloped sidewalls).
Regarding claim 14, Dimitropoulos discloses: The light emitting element of claim 13, wherein each of the first part (Dimitropoulos first part, annotated Dimitropoulos fig 20 above) and the second part (Dimitropoulos second part, annotated Dimitropoulos fig 20) of the first semiconductor layer (Dimitropoulos 2010) has a cylindrical pillar shape (annotated Dimitropoulos fig 20, ¶0050, 0053, under a BRI of “cylindrical pillar”), and
the width of the second part is greater than the width of the first part (annotated Dimitropoulos fig 1B, 20, ¶0048, second part is greater than W and first part is less than W).
Regarding claim 15, Dimitropoulos discloses: The light emitting element of claim 14, wherein the width of the third part (Dimitropoulos third part, annotated Dimitropoulos fig 20) of the first semiconductor layer (Dimitropoulos 2010) increases as becoming closer to the second part (Dimitropoulos second part, annotated Dimitropoulos fig 20) from the first part (Dimitropoulos first part, annotated Dimitropoulos fig 20)(annotated Dimitropoulos fig 20, ¶0048).
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure:
Danesh et al (US 20190088820 A1) is cited as an example of an analogous device.
Choi et al (US 20160013365 A1) is cited as an example of an analogous device.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to NICHOLAS B. MICHAUD whose telephone number is (703)756-1796. The examiner can normally be reached Monday-Friday, 0800-1700 Eastern Time.
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/NICHOLAS B. MICHAUD/
EXAMINER
Art Unit 2818
/Mounir S Amer/Primary Examiner, Art Unit 2818