DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Election/Restrictions
Applicant's election with traverse of Group II- method claims 11-20 in the reply filed on 11/25/25 is acknowledged. The traversal is on the ground(s) that the claims (method and device) are not independent and distinct and goes further to traverse the election of species requirement which pertained to the device claims. Such arguments are not found persuasive- the method and device claims are separate statutory classes of invention. Although the Applicant compares the language of claims 1 and 11- all the claims are considered to show distinctness- not just the independent claims. The Examiner restriction requirement already pointed out the distinctive nature between the method and device claims. Thus method and device claims classified separately and have different patentable weight afforded to the claim language. An exhaustive search has been conducted to address the elected method claims and prior art is applied below- Applicant’s additional device claims would require a second burdensome search and are hereby withdrawn. However, Applicant should note the should future prosecution determine allowable subject matter- it possibly could allow for rejoinder.
The requirement is still deemed proper and is therefore made FINAL.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 11-14 is/are rejected under 35 U.S.C. 102a1 as being anticipated by Liu et al (US 2021/0375796).
11. (Original) A method, comprising:
forming a multi-layer structure (Fig.2 (110/140) and [[0016]) including a metal ring structure (Fig.2 (118) and [0023]);
forming a cavity (Fig.3 (180) and [0039]) within one or more dielectric layers (Fig.3 (124/122/120/114) and [0039]) within the metal ring structure (Fig.3 (118) and [0023]); and along an approximately central axis (Fig.3 (184- interpreted as the central axis of the cavity and the metal ring) of the metal ring structure (Fig.3 (118) and [0023]);
forming a protective layer (not shown in Figures- described in [0044- the Examiner interprets the barrier layer is a protective layer] within the cavity (Fig.3 (180) and [0039]); and
forming an interconnect structure (Fig.4 (150) and [0042]) over the protective layer [0044].
12. (Original) The method of claim 11, wherein forming the cavity (Fig.3 (180) and [0039]) comprises: exposing portions (sidewalls) of the one or more dielectric layers (Fig.3 (124/122/120/114) and [0039]) within the metal ring structure (Fig.3 (118) and [0023]) to form a dielectric sidewall structure (Fig.3 (124/122/120/114) and [0039]) along interior surfaces of the metal ring structure (Fig.3 (118) and [0023]).
13. (Original) The method of claim 12, wherein forming the protective layer (not shown in Figures- described in [0044- the Examiner interprets the barrier layer is a protective layer] within the cavity (Fig.3 (180) and [0039]) comprises: forming the protective layer (not shown in Figures- described in [0044- the Examiner interprets the barrier layer is a protective layer] on surfaces of the dielectric sidewall structure [0044].
14. (Original) The method of claim 11, wherein forming the multi-layer structure (Fig.2 (110/140) and [[0016]) comprises: forming a metal layer (Fig.1 (144) and [0032]) below the metal ring structure that connects directly with the metal ring structure (Fig.3 (118) and [0023/0046]).
Claim(s) 11-20 is/are rejected under 35 U.S.C. 102a1 as being anticipated by Tsai et al (US 2015/0348874).
11. (Original) A method, comprising:
forming a multi-layer structure (Fig.1A-1B (100/200) and [[0013]) including a metal ring structure (Fig.1B-1C (108a-f) and [0018]);
forming a cavity (Fig.1B-1C (110/118) and [0028/0039]) within one or more dielectric layers (Fig.1C (102/104/204/204/106/109) and [0040]) within the metal ring structure (Fig.1B-1C (108a-f) and [0018]) and along an approximately central axis of the metal ring structure (Fig.1B-1C (108a-f) and [0018]);
forming a protective layer (Fig.1B (114) and [0032]) within the cavity (Fig.1B-1C (110/118) and [0028/0039]); and
forming an interconnect structure (Fig.1D (128) and [0045]) over the protective layer (Fig.1B (114) and [0032]).
12. (Original) The method of claim 11, wherein forming the cavity (Fig.1B-1C (110/118) and [0028/0039]) comprises: exposing portions of the one or more dielectric layers (Fig.1C (102/104/204/204/106/109) and [0040]) within the metal ring structure (Fig.1B-1C (108a-f) and [0018]) to form a dielectric sidewall structure (Fig.1C (102/104/204/204/106/109) and [0040]) along interior surfaces of the metal ring structure (Fig.1B-1C (108a-f) and [0018]).
13. (Original) The method of claim 12, wherein forming the protective layer (Fig.1B (114) and [0032]) within the cavity (Fig.1B-1C (110/118) and [0028/0039]) comprises: forming the protective layer (Fig.1B (114) and [0032]) on surfaces of the dielectric sidewall structure (Fig.1B (109) and [0031]).
14. (Original) The method of claim 11, wherein forming the multi-layer structure (Fig.1B (100/200) and [[0013]) comprises: forming a metal layer (Fig.1A (208a) and [0024]) below the metal ring structure (Fig.1B-1C (108a-f) and [0018]) that connects directly with the metal ring structure Fig.1D (128) and [0045]).
15. (Original) The method of claim 14, wherein forming the cavity (Fig.1B-1C (110/118) and [0028/0039]) comprises forming a first cavity (Fig.1B (110) and [0028]) that passes through a semiconductor layer structure (Fig.1B (102) and [0028]) above the multi-layer structure (Fig.1B (100/200) and [[0013]) and further comprising: forming a second cavity (Fig.1C (118) and [0039]) through the protective layer (Fig.1B (114) and [0032]) to expose the metal layer(Fig.1A (208a) and [0024]).
16. (Original) The method of claim 15, wherein forming the interconnect structure (Fig.1D (128) and [0045]) over the protective layer (Fig.1B (114) and [0032]) comprises: forming a portion of the interconnect structure (Fig.1D (128) and [0045]) in the second cavity (Fig.1C (118) and [0039]) that joins the interconnect structure (Fig.1D (128) and [0045]) and the metal layer(Fig.1A (208a) and [0024]).
17. (Original) The method of claim 11, wherein forming the cavity (Fig.1B-1C (110/118) and [0028/0039]) comprises: forming a portion of the cavity (Fig.1C (118) and [0039]) in a semiconductor layer structure (Fig.1D (204) below the multi-layer structure (Fig.1B (100) and [[0013]).
18. (Original) The method of claim 17, wherein forming the protective layer (Fig.1B (114) and [0032]) within the cavity (Fig.1B (110) and [0028]) comprises: forming a portion of the protective layer (Fig.1B (114) and [0032]) on surfaces of the semiconductor layer structure (Fig.1B (102) and [0028]) exposed by the portion of the cavity (Fig.1B (110) and [0028]).
19. (Original) The method of claim 18, wherein forming the interconnect structure (Fig.1D (128) and [0045]) over the protective layer (Fig.1B (114) and [0032]) comprises: forming the interconnect structure (Fig.1D (128) and [0045]) to include a portion that penetrates into the semiconductor layer structure (Fig.1B (102) and [0028]).
20. (Original) The method of claim 11, further comprising: joining an interposer structure including the multi-layer structure with an array of interconnect structures as part of forming a semiconductor package [0016-power distribution and I/O are interposer, multilayer interconnects].
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Kao et al (US 2022/0277998), Shigetoshi (2015/0097258); and Farooq et al (US 2016/0079166) teach similar methods.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to LAURA M MENZ whose telephone number is (571)272-1697. The examiner can normally be reached Monday-Friday 7:00-3:30.
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/LAURA M MENZ/Primary Examiner, Art Unit 2813
2/4/26
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