Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
DETAILED ACTION
This action is responsive to the application No. 18/341,897 filed on October 29, 2025.
Information Disclosure Statement
Acknowledgement is made of Applicant’s Information Disclosure Statement (IDS) form PTO-1449. These IDS has been considered.
Election/Restrictions
Applicant’s election of claims 1-14, drawn to device, Group I, in the reply filed on 10/29/2025 is acknowledged. Because applicant did not distinctly and specifically point out the supposed errors in the restriction requirement, the election has been treated as an election without traverse (MPEP § 818.01(a)).
Claims 15-20 are cancelled from further consideration pursuant to 37 CFR 1.142(b) as being drawn to nonelected method claims, Group II, there being no allowable generic or linking claim.
In addition, new device claims 21-26 have been added for examination.
Specification
7. The title of the invention is not descriptive. A new title is required that is clearly indicative of the invention to which the claims are directed.
The following title is suggested: “Semiconductor Package Comprising Dummy Die Bonded to Different Bonding Layers”.
Claim Objections
8. Claim 21 is objected to because of the following informalities: In the following, the claims should be recited to avoid indefiniteness due to lack of antecedent basis, and/or perform proper alignment along with the prior claim languages/phrases:
21. (Currently Amended) A semiconductor package comprising:
a first semiconductor die;
a first bonding layer over the first semiconductor die; and
a first dummy die bonded to the first bonding layer, wherein the first dummy die is electrically isolated from the first semiconductor die, wherein the first dummy die comprises:
a substrate;
a material layer between the substrate and the first bonding layer, wherein the material layer comprises a first material with a first thermal conductivity and a first Young's modulus; and
a second bonding layer between the material layer and the first bonding layer, wherein the second bonding layer is bonded to the first bonding layer, wherein the second bonding layer comprises a second material with a second thermal conductivity and a second Young's modulus, wherein the first thermal conductivity is larger than the second thermal conductivity, and wherein the first Young's modulus is larger than the second Young's modulus.
Appropriate correction is needed.
Claim Rejections - 35 USC § 103
9. In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
10. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
11. This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
12. The factual inquiries set forth in Graham v. John Deere Co., 383 U.S. 1, 148 USPQ 459 (1966), that are applied for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
a. Determining the scope and contents of the prior art.
b. Ascertaining the differences between the prior art and the claims at issue.
c. Resolving the level of ordinary skill in the pertinent art.
d. Considering objective evidence present in the application indicating obviousness or non-obviousness.
13. Claim 1-14, 21-23 are rejected under 35 U.S.C. 103 as being unpatentable over Chen et al. (US 2020/0006324 A1) in view of in view of Chen et al. (US 2020/0161263 A1).
Regarding independent claim 1, Chen et al./324 teaches a semiconductor package comprising (Fig. 1):
a first semiconductor die (100, para [0013]: S1/104);
a first bonding layer (BDL1, para [0018]) on the first semiconductor die (100: S1/104) ;
a second semiconductor die (200, para [0019]) bonded to the first bonding layer (BDL1); and
a first dummy die (300, para [0027]) bonded to the first bonding layer (BDL1), the first dummy die (300) comprising:
a substrate (S3, para [0028]-[0029]);
a material layer (306 3rd insulating layer, para [0031]) on the substrate (S3), wherein the material layer (306) is between the substrate (S3) and the first bonding layer (BDL1), and
a second bonding layer (BDL3, para [0033]) on the material layer (306), wherein the second bonding layer (BDL3) is between the material layer (306) and the first bonding layer (BDL1).
Chen et al./324 is explicitly silent of disclosing wherein, the material layer comprises a first material with a first thermal conductivity; wherein the second bonding layer comprises a second material with a second thermal conductivity different from the first thermal conductivity.
Chen et al./263 discloses wherein (Fig. 24), the material layer (26) comprises a first material (made of silicon oxynitride, para [0014]) with a first thermal conductivity; wherein the second bonding layer (76) comprises a second material (made of silicon oxide, para [0030]) with a second thermal conductivity different (silicon oxynitride vs. silicon oxide, therefore, these materials possess different thermal conductivities) from the first thermal conductivity.
It would have been obvious to a person of ordinary skill in the art before the effective filing date of the invention to apply the teaching as taught by Chen et al./263, and substitute w/specific insulating materials in the bonding layers of Chen et al./324, in order to further improve bonding adhesion between the bonding layers. In addition, the selection of a known material based on its suitability for the intended use as a bonding layer. Sinclair & Carroll Co. v. Interchemical Corp., 325 U.S. 327, 65 USPQ 297 (1945). See also MPEP 2144.07.
Regarding claim 2, Chen et al./324 and Chen et al./263 teach all of the limitations of claim 1 from which this claim depends.
The combination of Chen et al./324 and Chen et al./263 teach, wherein the first thermal conductivity (silicon oxynitride, known thermal conductivity about 200W/mK or higher) is larger than the second thermal conductivity (silicon oxide, known thermal conductivity about 1.4 W/mK, depending on thickness and temperature).
Regarding claim 3, Chen et al./324 and Chen et al./263 teach all of the limitations of claim 2 from which this claim depends.
The combination of Chen et al./324 and Chen et al./263 teach, wherein the first material has a first Young's modulus (higher for silicon oxynitride) and the second material has a second Young's modulus (for silicon oxide), and wherein the first Young's modulus is larger than the second Young's modulus.
Regarding claim 4, Chen et al./324 and Chen et al./263 teach all of the limitations of claim 1 from which this claim depends.
The combination of Chen et al./324 and Chen et al./263 teaches wherein, the first dummy die (300, Fig. 1, Chen et al./324) further comprises an adhesion layer (309) on the substrate (S3), wherein the adhesion layer (309) is between the substrate (S3) and the first bonding layer (BDL1), and wherein the adhesion layer (309) comprises a third material different from the first material (306 made of silicon oxynitride by Chen et al./263).
Regarding claim 5, Chen et al./324 and Chen et al./263 teach all of the limitations of claim 1 from which this claim depends.
Chen et al./324 teaches wherein (Fig. 1), the first bonding layer (BDL1) is bonded to the second bonding layer (BDL3) by dielectric-to-dielectric bonding (para [0044]).
Regarding claim 6, Chen et al./324 and Chen et al./263 teach all of the limitations of claim 5 from which this claim depends.
Chen et al./324 teaches wherein (Fig. 1), further comprising dummy pads (BPb, para [0018]) in the first bonding layer (BDL1), wherein the dummy pads (BPb) comprise metal (copper, para [0018]), and wherein the dummy pads (BPb) are in contact with the second bonding layer (BDL3).
Regarding claim 7, Chen et al./324 and Chen et al./263 teach all of the limitations of claim 5 from which this claim depends.
Chen et al./324 teaches wherein (Fig. 1), further comprising dummy pads (BPb, para [0018]) in the second bonding layer (BDL3), wherein the dummy pads (BPb) comprise metal (copper, para [0018]), and wherein the dummy pads (BPb) are in contact with the first bonding layer (BDL1).
Regarding claim 8, Chen et al./324 and Chen et al./263 teach all of the limitations of claim 5 from which this claim depends.
Chen et al./324 teaches wherein (Fig. 1), further comprising:
first dummy pads (BPb, para [0018]) in the first bonding layer (BDL1); and
second dummy pads (BP3, para [0033]) in the second bonding layer (BDL3), and wherein each of the first dummy pads (BPb) is bonded to a corresponding one of the second dummy pads (BP3) by metal-to-metal bonding (para [0038]).
Regarding independent claim 9, Chen et al. teaches a semiconductor package comprising (Fig. 1):
a first semiconductor die (200, para [0019]);
a first encapsulant (DE, para [0039]) encircling the first semiconductor die (200) in a top-down view;
a bonding layer (BDL2/BDL3, para [0025]) on the first semiconductor die (200) and the first encapsulant (DE);
a first plurality of dummy pads (BP3) in the bonding layer (BDL2/BDL3);
a second semiconductor die (100, para [0013]) bonded to the bonding layer (BDL2/BDL3), the bonding layer being between the first semiconductor die (200) and the second semiconductor die (100);
a first dummy die (300, para [0027]) bonded to the bonding layer (BDL3), wherein the first dummy die (300) covers the first plurality of dummy pads (BP3), the first dummy die (300) comprising:
a substrate (S3, para [0028]), wherein a first side (bottom side) of the substrate (S3) faces the bonding layer (BDL3);
a first dielectric layer (306) on the first side of the substrate (S3); and
a second dielectric layer (309), wherein the second dielectric layer is bonded to the bonding layer (BDL3).
Chen et al./324 is explicitly silent of disclosing wherein, a second encapsulant encircling the second semiconductor die and the first dummy die in the top-down view.
Chen et al./263 discloses wherein (Fig. 31), a second encapsulant (78-1/2, para [0035]) encircling the second semiconductor die (60-1) and the first dummy die (60-2) in the top-down view.
It would have been obvious to a person of ordinary skill in the art before the effective filing date of the invention to apply the teaching as taught by Chen et al./263, and incorporating the encapsulant material around the semiconductor devices of Chen et al./324, in order to protect the active surfaces from moisture, shock, vibration and unwanted particles/discharges, therefore, enhanced performance, safety, reliability and durability.
Regarding claim 10, Chen et al./324 and Chen et al./263 teach all of the limitations of claim 9 from which this claim depends.
Chen et al./324 teaches wherein (Fig. 1), the second semiconductor die (100) is electrically coupled to the first semiconductor die (200), and wherein the first dummy die (300) is electrically isolated from the first semiconductor die (200).
Regarding claim 11, Chen et al./324 and Chen et al./263 teach all of the limitations of claim 9 from which this claim depends.
Chen et al./324 teaches wherein (Fig. 1), the first dummy die (300) further comprises a material layer (308) between the first dielectric layer (306) and the second dielectric layer (306), and wherein the material layer (308 made of metal, para [0031]) is more thermally conductive than the first dielectric layer (306) and the second dielectric layer (309).
Regarding claim 12, Chen et al./324 and Chen et al./263 teach all of the limitations of claim 9 from which this claim depends.
Chen et al./324 teaches wherein (Fig. 1), wherein the first plurality of dummy pads (BPb….) form an array pattern in the top-down view.
Regarding claim 13, Chen et al./324 and Chen et al./263 teach all of the limitations of claim 9 from which this claim depends.
Chen et al. teaches wherein (Fig. 1), wherein the first plurality of dummy pads (BPb….) form a staggered array pattern in the top-down view.
Regarding claim 14, Chen et al./324 and Chen et al./263 teach all of the limitations of claim 9 from which this claim depends.
Chen et al. teaches wherein (Fig. 1), the first dummy die (300) further comprises a second plurality of dummy pads (BV3) extending through the second dielectric layer (309), wherein the second plurality of dummy pads (BV3) are in contact with corresponding ones of the first plurality of dummy pads (BP3), and wherein the first dummy die (300) is bonded to the bonding layer (BDL3) and the first plurality of dummy pads by dielectric-to-dielectric bonding and metal-to-metal bonding (para [0037]), respectively.
Regarding independent claim 21, Chen et al./324 teaches a semiconductor package comprising (Fig. 1):
a first semiconductor die (100, para [0013]: S1/104);
a first bonding layer (BDL1, para [0018]) over the first semiconductor die (100: S1/104); and
a first dummy die (300, para [0027]) bonded to the first bonding layer (BDL1), wherein the first dummy die (300) is electrically isolated from the first semiconductor die (100: S1/104), wherein the first dummy die (300) comprises:
a substrate (S3, para [0028]-[0029]);
a material layer (306 3rd insulating layer, para [0031]) between the substrate (S3) and the first bonding layer (BDL1), and
a second bonding layer (BDL3, para [0033]) between the material layer (306) and the first bonding layer (BDL1), wherein the second bonding layer (BDL3) is bonded to the first bonding layer (BDL1).
Chen et al./324 is explicitly silent of disclosing wherein, wherein the material layer (306) comprises a first material with a first thermal conductivity and a first Young's modulus; and wherein the second bonding layer comprises a second material with a second thermal conductivity and a second Young's modulus, wherein the first thermal conductivity is larger than the first thermal conductivity, and wherein the first Young's modulus is larger than the second Young's modulus.
Chen et al./263 discloses wherein (Fig. 24), the material layer (26) comprises a first material (made of silicon oxynitride, para [0014]) with a first thermal conductivity (about 200W/mK or higher) and a first Young's modulus (548 GPa or higher); wherein the second bonding layer (76) comprises a second material (made of silicon oxide, para [0030]) with a second thermal conductivity (about 1.4W/mK) and a second Young's modulus (about 180 GPa), wherein the first thermal conductivity is larger than the first thermal conductivity, and wherein the first Young's modulus is larger than the second Young's modulus (silicon oxynitride vs. silicon oxide, therefore, these materials possess different thermal conductivities and young’s modulus).
It would have been obvious to a person of ordinary skill in the art before the effective filing date of the invention to apply the teaching as taught by Chen et al./263, and substitute w/specific insulating materials in the bonding layers of Chen et al./324, in order to further improve bonding adhesion between the bonding layers. In addition, the selection of a known material based on its suitability for the intended use as a bonding layer. Sinclair & Carroll Co. v. Interchemical Corp., 325 U.S. 327, 65 USPQ 297 (1945). See also MPEP 2144.07.
Regarding claim 22, Chen et al./324 and Chen et al./263 teach all of the limitations of claim 21 from which this claim depends.
Chen et al./324 teaches wherein (Fig. 1), further comprising a first plurality of dummy bonding pads (BPb….) in the first bonding layer (BDL1), wherein the first dummy die (300) covers the first plurality of dummy bonding pads (BPb….) in a top-down view.
Regarding claim 23, Chen et al./324 and Chen et al./263 teach all of the limitations of claim 22 from which this claim depends.
Chen et al./324 teaches wherein (Fig. 1), the first dummy die (300) further comprises a second plurality of dummy bonding pads (BP3….) in the second bonding layer (BDL3), and wherein the second plurality of dummy bonding pads (BP3) are bonded to the first plurality of dummy bonding pads (BPb).
14. Claims 24-25 are rejected under 35 U.S.C. 103 as being unpatentable over Chen et al. (US 2020/0006324 A1) in view of in view of Chen et al. (US 2020/0161263 A1) as applied to claim 21 above, and further in view of Langer et al. (US 2010/0044705 A1).
Regarding claim 24, Chen et al./324 and Chen et al./263 teach all of the limitations of claim 21 from which this claim depends.
Chen et al./324 and Chen et al./263 are explicitly silent of disclosing wherein, the first material is amorphous silicon.
Langer et al. discloses wherein (Fig. 3), the first material (16) is amorphous silicon (para [0058]).
It would have been obvious to a person of ordinary skill in the art before the effective filing date of the invention to apply the teaching as taught by Chen et al./263, and substitute the insulating material in the bonding layer of Chen et al./324, in order to further improve the bonding adhesion between the bonding layers.
Regarding claim 25, Chen et al./324 and Chen et al./263 teach all of the limitations of claim 21 from which this claim depends.
Chen et al./324 and Chen et al./263 are explicitly silent of disclosing wherein, the first material is silicon nitride or silicon carbide.
Langer et al. discloses wherein (Fig. 3), the first material (16) is silicon nitride (para [0058]) or silicon carbide.
It would have been obvious to a person of ordinary skill in the art before the effective filing date of the invention to apply the teaching as taught by Chen et al./263, and substitute the insulating material in the bonding layer of Chen et al./324, in order to further improve the bonding adhesion between the bonding layers.
Allowable Subject Matter
15. Claim 26 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Claim 26 recites ….the first dummy die further comprises an adhesion layer between the substrate and the material layer, wherein the adhesion layer comprises a third material with a third thermal conductivity and a third Young's modulus, wherein the first thermal conductivity is larger than the third thermal conductivity, and wherein the first Young's modulus is larger than the third Young's modulus.
The prior art, Chen et al. (US 2020/0006324 A1) or Chen et al. (US 2020/0161263 A1) does not disclose the adhesion layer comprises a third material with a third thermal conductivity and a third Young's modulus, wherein the first thermal conductivity is larger than the third thermal conductivity, and wherein the first Young's modulus is larger than the third Young's modulus. Therefore, none of the prior art of references quoted in PTO-892, discloses the limitation as stated above.
Examiner’s Note
16. Applicant is reminded that the Examiner is entitled to give the broadest reasonable interpretation to the language of the claims. Furthermore, the Examiner is not limited to Applicants' definition which is not specifically set forth in the claims. See MPEP 2111, 2123, 2125, 2141.02 VI, and 2182.
Examiner has cited particular paragraphs and/or columns/lines in the references applied to the claims above for the convenience of the applicant. Although the specified citations are representative of the teachings of the art and are applied to specific limitations within the individual claim, other passages and figures may apply as well. It is respectfully requested from the applicant in preparing responses, to fully consider the references in their entirety as potentially teaching all or part of the claimed invention, as well as the context of the passage as taught by the prior art or disclosed by the Examiner. See MPEP 2141.02 VI.
In the case of amending the claimed invention, Applicant is respectfully requested to indicate the portion(s) of the specification which dictate(s) the structure relied on for proper interpretation and also to verify and ascertain the metes and bounds of the claimed invention.
Conclusion
17. Any inquiry concerning this communication or earlier communications from the examiner should be directed to DIDARUL MAZUMDER whose telephone number is (571)272-8823. The examiner can normally be reached M-F 9-5.
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18. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, William Partridge can be reached at 571-270-1402. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/DIDARUL A MAZUMDER/Primary Examiner, Art Unit 2812