DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Information Disclosure Statement
The information disclosure statement (IDS) submitted on 06/28/23,09/25/2024 have been considered by the examiner.
Specification
The lengthy specification has not been checked to the extent necessary to determine the presence of all possible minor errors. Applicant’s cooperation is requested in correcting any errors of which applicant may become aware in the specification.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim 1,2,3,5,6 are rejected under 35 U.S.C. 103 as being unpatentable over Yang (US 2019/0131277), and further in view of Liao (US 2018/0277500).
Regarding claim 1, Yang teaches a package structure in fig. 4, comprising:
a chip structure (100) bonded to a substrate (200) through dielectric-to-dielectric bonding and metal-to-metal bonding (see fig. 4; and par. 56);
interconnect dielectric layers (PM1/PM2/PM3/PM4) formed over the chip structure (200);
interconnect conductive structures (RL1/RL2/RL3/RL4) formed in the interconnect dielectric layers (PM1/ PM2/PM3/PM4).
Yang does not show a transmission line formed in the interconnect dielectric layers; and a magnetic structure formed in the interconnect dielectric layers and separated from the transmission line by the interconnect dielectric layers, wherein the magnetic structure is electrically isolated from the chip structure and the interconnect conductive structures.
Liao teaches the same field of an endeavor wherein interconnect dielectric layers (1304/1402/1602) formed over the chip structure (910); interconnect conductive structures (1502/2104) formed in the interconnect dielectric layers (1304/1402/1602); a transmission line (1512) formed in the interconnect dielectric layers (1304/1402/1602); and a magnetic structure (1904) formed in the interconnect dielectric layers (1304/1402/1602) and separated from the transmission line (1512) by the interconnect dielectric layers (1304/1402/1602), wherein the magnetic structure (1904) is electrically isolated from the chip structure (910) and the interconnect conductive structures (1502/2104).
Thus, it would have been obvious to one having ordinary skills in the art before the invention was made to include a transmission line formed in the interconnect dielectric layers; and a magnetic structure formed in the interconnect dielectric layers and separated from the transmission line by the interconnect dielectric layers, wherein the magnetic structure is electrically isolated from the chip structure and the interconnect conductive structures as taught by Liao in the teaching of Yang in order to increase a characteristic impedance (see par. 17).
Regarding claim 2, Yang and Liao teach all the limitations of the claimed invention for the same reasons as set forth above. Besides, Liao teaches the magnetic structure (1904) comprises: a first magnetic portion (1302) formed at a first side of the transmission line (refer to a lower surface side of 1512); and a second magnetic portion (1902) formed at a second side of the transmission line (refer to a upper surface side of 1512), wherein the first side is opposite the second side, wherein a distance between the first magnetic portion and the second magnetic portion in a first direction (refer to D1 in the notation below) is greater than a dimension of the transmission line in the first direction (refer to T1 in notation below).
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Regarding claim 3, Yang and Liao teach all the limitations of the claimed invention for the same reasons as set forth above. Besides, Fig. 26 of Liao teaches a distance between the first magnetic portion and a first sidewall of the transmission line at the first side (refer to D2) is different from a distance between the second magnetic portion and a second sidewall of the transmission line at the second side (refer to D3) (see notation below).
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Regarding claim 5, Yang and Liao teach all the limitations of the claimed invention for the same reasons as set forth above. Besides, Fig. 26 of Liao teaches the magnetic structure (1904) further comprises: a third magnetic portion (1804) formed at a third side of the transmission line (refer to a left side of 1512), wherein the third magnetic portion is in direct contact with both the first magnetic portion and the second magnetic portion (1302 and 1902).
Regarding claim 6, Yang and Liao teach all the limitations of the claimed invention for the same reasons as set forth above. Besides, Fig. 26 of Liao teaches the magnetic structure (1904) further comprises: a fourth magnetic portion (1806) formed at a fourth side of the transmission line (refer to a right side of 1512), wherein the fourth magnetic portion is in direct contact with both the first magnetic portion and the second magnetic portion (1302 and 1902).
Claim 9 is rejected under 35 U.S.C. 103 as being unpatentable over Chen (EP 3937231A2), and further in view of Liao (US 2018/0277500).
Regarding claim 9, Chen teaches a package structure in fig. 1H, comprising:
a chip structure (112) bonded to a substrate (4) through dielectric-to-dielectric bonding and metal-to-metal bonding (see fig. 1H);
a dielectric layer (56) formed over the substrate (4) and covering sidewall surfaces of the chip structure (112);
through dielectric vias (refer to dielectric vias at the conductive posts 65 before filling in the conductive material) formed through the dielectric layer (56); and
an interconnect structure (64) formed over the dielectric layer (56) and the chip structure (112).
Chen does not teach the interconnect structure comprises: a transmission line electrically connect to the chip structure; a magnetic structure spaced apart from the transmission line by a first space, wherein the magnetic structure is electrically isolated from the transmission line, the chip structure, and the through dielectric vias; and interconnect dielectric layers formed around the transmission line and the magnetic structure, wherein the first space between the magnetic structure and the transmission line is filled by the interconnect dielectric layers.
Liao teaches the same field of an endeavor wherein the interconnect structure in fig. 26 comprises: a transmission line (1512) electrically connect to the chip structure (100); and a magnetic structure (1904) is electrically isolated from the transmission line (1512) by a first space (refer to D1/D2 in notation below), wherein the magnetic structure (1904) is electrically isolated from the transmission line (1512), the chip structure (910) and the through dielectric vias (14); and interconnect dielectric layers (1304/1402/1602/2002/2102) formed around the transmission line (1512) and the magnetic structure (1904), wherein the first space (refer to D1/D2) between the magnetic structure (1904) and the transmission line (1512) is filled by the interconnect dielectric layers.
Thus, it would have been obvious to one having ordinary skills in the art before the invention was made to include the interconnect structure comprises: a transmission line electrically connect to the chip structure; a magnetic structure spaced apart from the transmission line by a first space, wherein the magnetic structure is electrically isolated from the transmission line, the chip structure, and the through dielectric vias; and interconnect dielectric layers formed around the transmission line and the magnetic structure, wherein the first space between the magnetic structure and the transmission line is filled by the interconnect dielectric layers as taught by Liao in the teaching of Chen in order to increase a characteristic impedance (see par. 17).
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Allowable Subject Matter
Claim 4 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims, since the prior art of record and considered pertinent to the applicant’s disclosure does not teach or suggest “the first magnetic portion and the second magnetic portion are made of different materials.”
Claim 7 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims, since the prior art of record and considered pertinent to the applicant’s disclosure does not teach or suggest “the third magnetic portion further comprises third magnetic units laterally spaced apart from each other.” Claim 8 includes all of the limitations of claim 7.
Claim 10 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims, since the prior art of record and considered pertinent to the applicant’s disclosure does not teach or suggest “first magnetic units spaced apart from each other in a first direction and connecting the first top magnetic portion and the first bottom magnetic portion in a second direction” in combination of all of the limitations of claim 10. Claims 11-14 include all of the limitations of claim 10.
Claim 15 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims, since the prior art of record and considered pertinent to the applicant’s disclosure does not teach or suggest “the magnetic structure… is in direct contact with the chip structure” in combination of all of the limitations of claim 15.
Claims 16-20 are allowed.
The following is an examiner’s statement of reasons for allowance:
Regarding claim 16, Chen teaches a method for forming a package structure in figs. 1A-1H, comprising:
forming a first bonding structure (46) over a substrate (4), wherein the first bonding structure comprises a first dielectric layer (44) and first conductive pads (46) formed in the first dielectric layer (44);
bonding a second bonding structure (146) of a chip structure (112) to the first bonding structure (46), wherein the second bonding structure (146) comprises a second dielectric layer (144) and second conductive pads (146) formed in the second dielectric layer (144), and the second conductive pads (146) are bonded to the first conductive pads (46) , and the second dielectric layer (144) is bonded to the first dielectric layer (44);
forming a third dielectric layer (56) over the first bonding structure (46) and around the chip structure (112);
forming through dielectric vias (refer to dielectric vias at the conductive post 65) through the third dielectric layer (56) and electrically connected to the first conductive pads (46);
forming an interconnect structure (64) over the third dielectric layer (56), comprising: forming a first interconnect dielectric layer (62); forming a second interconnect dielectric layer (63) over the first interconnect dielectric layer (62).
Chen fails to teach a transmission line is formed in the second interconnect dielectric layer; forming a third interconnect dielectric layer over the second interconnect dielectric layer; and forming a first magnetic portion through the first interconnect dielectric layer, the second interconnect dielectric layer, and the third interconnect dielectric layer, wherein the transmission line is electrically connected to the chip structure and is electrically isolated from the first magnetic portion.
Liao teaches the same field of an endeavor wherein a transmission line (1512) is formed in the second interconnect dielectric layer (1602); forming a third interconnect dielectric layer (2002) over the second interconnect dielectric layer (1602);
forming a first magnetic portion (1804) through the first interconnect dielectric layer (1402), the second interconnect dielectric layer (1602), wherein the transmission line (1512) is electrically connected to the chip structure (910) and is electrically isolated from the first magnetic portion (1804).
Liao does not teach the first magnetic portion is formed through a third interconnect dielectric layer.
Regarding claim 16, the prior art of record alone or in combination neither teaches nor makes obvious the invention of a method for forming a package structure, comprising: “forming a first magnetic portion through the first interconnect dielectric layer, the second interconnect dielectric layer, and the third interconnect dielectric layer” in combination of all of the limitations of claim 16. Claims 17-20 include all of the limitations of claim 16.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Niki Tram Nguyen whose telephone number is (571) 272-5526. The examiner can normally be reached on 6:00am-4:00pm.
If attempts to reach the examiner by telephone are unsuccessful, the examiner's supervisor, Steven Loke can be reached on (703)872-9306. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/NIKI H NGUYEN/ Primary Examiner, Art Unit 2818