Prosecution Insights
Last updated: April 19, 2026
Application No. 18/345,270

STACKED LED CHIPS

Non-Final OA §102§103
Filed
Jun 30, 2023
Examiner
AHMAD, KHAJA
Art Unit
2813
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Creeled Inc.
OA Round
1 (Non-Final)
81%
Grant Probability
Favorable
1-2
OA Rounds
2y 5m
To Grant
99%
With Interview

Examiner Intelligence

Grants 81% — above average
81%
Career Allow Rate
750 granted / 928 resolved
+12.8% vs TC avg
Strong +27% interview lift
Without
With
+26.9%
Interview Lift
resolved cases with interview
Typical timeline
2y 5m
Avg Prosecution
36 currently pending
Career history
964
Total Applications
across all art units

Statute-Specific Performance

§101
1.3%
-38.7% vs TC avg
§103
58.3%
+18.3% vs TC avg
§102
28.7%
-11.3% vs TC avg
§112
5.3%
-34.7% vs TC avg
Black line = Tech Center average estimate • Based on career data from 928 resolved cases

Office Action

§102 §103
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . DETAILED ACTION This office action is in response to the Applicant Election filled on 11/18/2025. Currently, claims 1-20 are pending in the application. Claims 4 and 8-20 have been withdrawn from consideration. Election/Restrictions Applicant's election without traverse of Species I (Figure 1), claims 1-3 and 5-7, in the reply filed on 11/18/2025 is acknowledged, there being no allowable generic or linking claim. Claim Rejections - 35 USC § 102 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale or otherwise available to the public before the effective filing date of the claimed invention. (a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention. Claims 1-3, 5 and 7 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Chen et al (US 20100109028 A1). Regarding claim 1, Figure 1 of Chen discloses a light-emitting diode (LED) device, comprising: a first LED chip (A, [0019]); and a second LED chip (B, [0019]) mounted to the first LED chip. Regarding claim 2, Figure 1 of Chen discloses that the LED device of claim 1, wherein: the first LED chip (A) defines a first surface (top surface of A in the Figure 1); the second LED chip (B) defines a second surface (bottom surface of B in the Figure 1); and the second surface of the second LED chip is mounted on the first surface of the first LED chip. Regarding claim 3, Figure 1 of Chen discloses that the LED device of claim 1, wherein: the first LED chip (A) defines a first cathode contact (107, [0021]) and a first anode contact (106); and the second LED chip (B) defines a second cathode contact (117, [0024]) and a second anode contact (118, [0024]). Regarding claim 5, Figure 1 of Chen discloses that the LED device of claim 1, wherein: the first LED chip (A), comprises: a first growth substrate (111, [0020]); and a first active LED region (109, [0020]) mounted on the first growth substrate; the second LED chip (B), comprises: a second growth substrate (113, [0022]); and a second active LED region (115) mounted on the second growth substrate; and the second growth substrate (113) is mounted on the first growth substrate (111). Regarding claim 7, Figure 1 of Chen discloses that the LED device of claim 5, wherein: the first LED chip (A) comprises a first anode connection (105, [0021]) and a first cathode connection (104, [0021]), wherein the first anode connection and the first cathode connection are arranged such that the first LED chip (A) has a flip-chip configuration ([0024]); and the second LED chip (B) comprises a second anode connection (120, [0024]) and a second cathode connection (119), wherein the second anode connection and the second cathode connection are arranged such that the second LED chip has a lateral configuration (lateral wiring configuration). Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim 6 is rejected under 35 U.S.C. 103 as being obvious over Chen et al (US 20100109028 A1) in view of Chin et al (US 20070018189 A1). Regarding claim 6, Figure 1 of Chen does not teach that the LED device of claim 5, further comprising a third LED chip, wherein: the third LED chip, comprises: a third growth substrate; and a third active LED region mounted on the first growth substrate; and the third growth substrate is mounted on the first growth substrate. However, Chin is a pertinent art which teaches a light emitting diode comprises: a bracing frame; and at least two chips stacked on the bracing frame in a chip-on-chip stacking manner. The light emitting diode for uniform color mixing is completed after each of said at least two chips is electrically connected. Figures 1-8 of Chin teach some examples of stacked light emitting diode wherein some of them are mounted one over another and some of them are mounted side by side on another light emitting diode (Figure 8). Thus, it would have been obvious to one of the ordinary skill in the art before the effective filing date of the claimed invention to modify the LED device of Chen (Figure 1) by stacking a third LED chip of same types ( for example B, Figure 1 of Chen) wherein the third LED chip, comprises: a third growth substrate; and a third active LED region mounted on the first growth substrate; and the third growth substrate is mounted on the first growth substrate according to the teaching of Chin in order to have a light emitting device with uniform color mixing without increasing the production cost, wherein this light emitting diode is provided for the consumer in accordance with the motive ([0004] of Chin). Examiner Notes A reference to specific paragraphs, columns, pages, or figures in a cited prior art reference is not limited to preferred embodiments or any specific examples. It is well settled that a prior art reference, in its entirety, must be considered for all that it expressly teaches and fairly suggests to one having ordinary skill in the art. Stated differently, a prior art disclosure reading on a limitation of Applicant's claim cannot be ignored on the ground that other embodiments disclosed were instead cited. Therefore, the Examiner's citation to a specific portion of a single prior art reference is not intended to exclusively dictate, but rather, to demonstrate an exemplary disclosure commensurate with the specific limitations being addressed. In re Heck, 699 F.2d 1331, 1332-33,216 USPQ 1038, 1039 (Fed. Cir. 1983) (quoting In re Lemelson, 397 F.2d 1006, 1009, 158 USPQ 275, 277 (CCPA 1968)). In re: Upsher-Smith Labs. v. Pamlab, LLC, 412 F.3d 1319, 1323, 75 USPQ2d 1213, 1215 (Fed. Cir. 2005); In re Fritch, 972 F.2d 1260, 1264, 23 USPQ2d 1780, 1782 (Fed. Cir. 1992); Merck& Co. v. BiocraftLabs., Inc., 874 F.2d 804, 807, 10 USPQ2d 1843, 1846 (Fed. Cir. 1989); In re Fracalossi, 681 F.2d 792,794 n.1, 215 USPQ 569, 570 n.1 (CCPA 1982); In re Lamberti, 545 F.2d 747, 750, 192 USPQ 278, 280 (CCPA 1976); In re Bozek, 416 F.2d 1385, 1390, 163 USPQ 545, 549 (CCPA 1969). Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to KHAJA AHMAD whose telephone number is (571)270-7991. The examiner can normally be reached on Monday-Friday, 8:00 AM - 5:00 PM (Eastern Time). If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, GAUTHIER STEVEN B, can be reached on (571)270-0373. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice . Information regarding the status of an application may be obtained from the Patent Application Information Retrieval (PAIR) system. Status information for published applications may be obtained from either Private PAIR or Public PAIR. Status information for unpublished applications is available through Private PAIR only. For more information about the PAIR system, see http://pair-direct.uspto.gov. Should you have questions on access to the Private PAIR system, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative or access to the automated information system, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /KHAJA AHMAD/Primary Examiner, Art Unit 2813
Read full office action

Prosecution Timeline

Jun 30, 2023
Application Filed
Dec 12, 2025
Non-Final Rejection — §102, §103 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
81%
Grant Probability
99%
With Interview (+26.9%)
2y 5m
Median Time to Grant
Low
PTA Risk
Based on 928 resolved cases by this examiner. Grant probability derived from career allow rate.

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