DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Election/Restrictions
Applicant's election with traverse of Species I in the reply filed on April 16th, 2026 is acknowledged. The traversal is on the ground(s) that the examination of the entire application would not be a serious burden on the examiner. This is not found persuasive. Where two or more species are claimed, a requirement for restriction to a single species may be proper if the species are mutually exclusive. Claims to different species are mutually exclusive if one claim recites limitations disclosed for a first species but not a second, while a second claim recites limitations disclosed only for the second species and not the first. This may also be expressed by saying that to require restriction between claims limited to species, the claims must not overlap in scope. As outlined in the restriction requirement, claims to different species recite limitations disclosed in one species but not another. For example, elected species I requires the first and second power terminals to extend from the first and second housing sides respectively while also requiring a common source. None of the other species meet these claimed requirements.
Additionally, there would be a serious burden for the examiner if forced to examine all of the species because each of the different species requires a different field of search to find each of the mutually exclusive claimed limitations, and the prior art applicable to one species would not likely be applicable to another species. In the instance that the species requirement was withdrawn and a finding that one of the inventions were held to be unpatentable then the other inventions would also be inherently held to be unpatentable. Therefore, the species requirement is proper since there are apparently several different inventive concepts in the disclosed power package. The requirement is still deemed proper and is therefore made FINAL.
Claims 37-40, 49, 50, and 62 are withdrawn from further consideration pursuant to 37 CFR 1.142(b) as being drawn to nonelected species II and III.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1-5, 13, 17-20, and 30 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by McPherson (US 2021/0313243 A1).
With respect to claim 1, McPherson teaches a power package 10 comprising:
a power substrate 14 (see Figs. 4-6 and paragraphs 71, 72);
a first power device 16 on the power substrate 14 (see Figs. 5, 6 and paragraphs 71, 75, 76);
a housing 12 having housing sides (A, B, C, D) comprising at least a first housing side (B) and a second housing side (A), the housing configured to house at least the power substrate 14 and the first power device 16 (see Figs. 3-6 and paragraphs 70-73, 78-80, );
a plurality of power terminals (18, 20, 22) extending from at least one of the housing sides (see Figs. 3-6 and paragraphs 70-74);
the plurality of power terminals comprising at least a first power terminal 20 and a second power terminal 18 (see Figs. 3-6 and paragraphs 70-74);
a plurality of signal terminals (24, 26, 28, 30) extending from at least one of the housing sides (see Figs. 3-6 and paragraphs 74, 76, 77); and
the plurality of signal terminals (24, 26, 28, 30) comprising at least a source kelvin signal terminal (K1, K2), a gate driver signal terminal (G1, G2), and at least one additional signal terminal (additional pins) (see Figs. 3-6 and paragraphs 67, 74).
With respect to claim 2, McPherson teaches the power package according to claim 1 wherein the first power terminal 20 extends from the first housing side (B) and the second power terminal 18 extends from the second housing side (A); and wherein at least one (24, 26) of the plurality of signal terminals (24, 26, 28, 30) extends from the first housing side (B) and at least one (28, 30) of the plurality of signal terminals (24, 26, 28, 30) extends from the second housing side (A) (see Figs. 3-6 and paragraphs 67, 70-74, 78-80).
With respect to claim 3, McPherson teaches the power package according to claim 1 wherein the first power terminal extends 20 from the first housing side (B) and the second power terminal 18 extends from the second housing side (A); and wherein at least two (24 and 26) of the plurality of signal terminals (24, 26, 28, 30) extend from the first housing side (B) and at least two (28 and 30) of the plurality of signal terminals (24, 26, 28, 30) extend from the second housing side (see Figs. 3-6 and paragraphs 67, 70-74, 78-80).
With respect to claim 4, McPherson teaches a configuration of a plurality of implementations of the power package of claim 1, wherein the plurality of implementations of the power package (10A-10C) are arranged in a bridge leg configuration topology (see Fig. 25 and paragraph 128).
With respect to claim 5, McPherson teaches a configuration of a plurality of implementations of the power package of claim 1, wherein the plurality of implementations of the power package (10A-10F) are arranged in a plurality of paralleled bridge leg configuration topologies (see Figs. 23, 24, and 26 and paragraph 129).
With respect to claim 13, McPherson teaches the power package according to claim 1 wherein at least one implementation of the at least one additional signal terminal (additional pins) is configured as a temperature sensing terminal (see Figs. 3-6 and paragraph 74; note temperature sensing).
With respect to claim 17, McPherson teaches the power package according to claim 1 wherein the plurality of signal terminals (24, 26, 28, 30) are symmetrically arranged on the housing sides (see Figs. 3-6 and paragraphs 67, 74, 76, 77, 113; symmetrical when line drawn from A to B in Fig. 5 for example).
With respect to claim 18, McPherson teaches the power package according to claim 1 wherein the plurality of signal terminals (24, 26, 28, 30) are asymmetrically arranged on the housing sides (see Figs. 17A, 17B, and paragraph 115).
With respect to claim 19, McPherson teaches the power package according to claim 1 wherein all of the plurality of signal terminals (24, 26, 28, 30) are symmetrically arranged on either the first housing side (B) or the second housing side (A) (see Figs. 3-6 and paragraphs 67, 74, 76, 77, 113; all terminals symmetric on side B and all symmetric on side A).
With respect to claim 20, McPherson teaches the power package according to claim 1 wherein all of the plurality of signal terminals (24, 26, 28, 30) are asymmetrically arranged on either the first housing side or the second housing side (see Figs. 17A, 17B, and paragraph 115; all terminals asymmetric on side B and all asymmetric on side A).
With respect to claim 30, McPherson teaches the power package according to claim 1 further comprising a support sleeve (of housing 12) configured to surround and mechanically support at least one of plurality of signal terminals (24, 26, 28, 30) (see Figs. 3-6 and 14A-15 and paragraphs 106-110; note part of housing 12 extending to surround 24, 26, 28, 30).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 6-8 are rejected under 35 U.S.C. 103 as being unpatentable over McPherson (US 2021/0313243 A1; hereinafter McPherson43) in view of McPherson et al. (US 2021/0313256 A1; hereinafter McPherson56).
With respect to claim 6, McPherson43 discloses the power package according to claim 1.
McPherson43 does not disclose wherein at least one implementation of the at least one additional signal terminal is configured as an overcurrent/desaturation signal terminal configured to provide overcurrent signals and/or desaturation signals.
McPherson56 discloses a power package in Figs. 27-32 wherein at least one implementation of an at least one additional signal terminal 118’ is configured as an overcurrent/desaturation signal terminal configured to provide overcurrent signals and/or desaturation signals (see Figs. 27-32 and paragraph 171, 173, 174).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention that at least one implementation of the at least one additional signal terminal of McPherson43 would be configured as an overcurrent/desaturation signal terminal configured to provide overcurrent signals and/or desaturation signals as taught by McPherson56 in order to provide overcurrent protection for the power package (see MPEP 2144 I).
With respect to claim 7, the combination of McPherson43 and McPherson56 discloses the power package according to claim 6 wherein the overcurrent/desaturation signal terminal is connected to a drain pad (of 116) on the power substrate 114 (see McPherson56: Figs. 1B and 27-32 and paragraphs 174).
With respect to claim 8, the combination of McPherson43 and McPherson56 discloses the power package according to claim 6 wherein the overcurrent/desaturation signal terminal is configured to allow a gate driver and/or measurement/instrumentation circuitry to monitor a voltage across a switch position (see McPherson56: Figs. 27-32 and paragraphs 171, 173, 174; note sense currents and overcurrent events by analyzing the voltage difference between 118’ and 130L).
Claims 9, 10, and 14 are rejected under 35 U.S.C. 103 as being unpatentable over McPherson (US 2021/0313243 A1).
With respect to claim 9, McPherson discloses the power package according to claim 1 wherein at least one implementation of the at least one additional signal terminal (additional pins) is configured as a current sensing signal terminal (see Figs. 3-6 and paragraph 74; note current sensing).
McPherson does not explicitly disclose wherein the current sensing signal terminal is connected to a current sensor. However, a current sensor is obviously present to allow the additional pins and pin assemblies to be used for current sensing (see paragraph 74 and MPEP 2144 I). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention that in the power package of McPherson the current sensing signal terminal would be connected to a current sensor because a current sensor is needed to allow the additional pins and pin assemblies to be used for current sensing (see paragraph 74 and MPEP 2144 I).
With respect to claim 10, McPherson discloses the power package according to claim 9 wherein the current sensing signal terminal comprises two current sensing terminals (see Figs. 3-6 and paragraph 74; note additional pins used for current sensing).
With respect to claim 14, McPherson discloses the power package according to claim 13.
McPherson does not explicitly disclose wherein the temperature sensing terminal comprises two temperature sensing terminals. However, a temperature sensor obviously has two terminals for proper sensor operation (see MPEP 2144 I) and the additional pins and pin assemblies of McPherson are used for temperature sensing (see McPherson: paragraph 74). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention that the temperature sensing terminal of McPherson would comprise two temperature sensing terminals because a temperature sensor obviously has two terminals for proper sensor operation (see MPEP 2144 I) and the additional pins and pin assemblies (i.e., plural terminals) are used for temperature sensing (see McPherson: paragraph 74).
Claims 11, 12, 15, 16, and 25 are rejected under 35 U.S.C. 103 as being unpatentable over McPherson (US 2021/0313243 A1) in view of Cole et al. (US 2022/0102260 A1; hereinafter Cole).
With respect to claim 11, McPherson discloses the power package according to claim 9.
McPherson does not explicitly disclose wherein the current sensor comprises an integrated current sensor implemented with at least one implementation of the first power device.
Cole discloses a power package in Figs. 10-21 wherein a current sensor comprises an integrated current sensor implemented with at least one implementation of a first power device (see Figs. 10-21 and paragraphs 56, 91, 103, 105).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention that the current sensor of McPherson would comprise an integrated current sensor implemented with at least one implementation of the first power device as taught by Cole because the integration of other application circuits within the same power package allows the module designer more design flexibility and higher density power module packaging (see MPEP 2144 I and Cole paragraphs 91, 103).
With respect to claim 12, McPherson discloses the power package according to claim 9.
McPherson does not explicitly disclose wherein the current sensor comprises an on-chip current sensor implemented in at least one implementation of the first power device.
Cole discloses a power package in Figs. 10-21 wherein a current sensor comprises an on-chip current sensor implemented in at least one implementation of a first power device (see Figs. 10-21 and paragraphs 56, 91, 103, 105).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention that the current sensor of McPherson would comprise an on-chip current sensor implemented in at least one implementation of the first power device as taught by Cole because the integration of other application circuits within the same power package allows the module designer more design flexibility and higher density power module packaging (see MPEP 2144 I and Cole paragraphs 91, 103).
With respect to claim 15, McPherson disclose the power package according to claim 13.
McPherson does not explicitly disclose wherein the temperature sensing terminal is connected to a temperature sensor comprising: an on-chip temperature sensor implemented with at least one implementation of the first power device, an isolated temperature sensor, a non-isolated temperature sensor, and/or a temperature sensing device integrated with the power substrate. However, a temperature sensor is obviously present to allow the additional pins and pin assemblies to be used for temperature sensing (see paragraph 74 and MPEP 2144 I).
Cole discloses a power package in Figs. 10-21 wherein a temperature sensing terminal is connected to a temperature sensor comprising: an on-chip temperature sensor implemented with at least one implementation of the first power device, an isolated temperature sensor, a non-isolated temperature sensor, and/or a temperature sensing device integrated with the power substrate (see Figs. 10-21 and paragraphs 56, 57, 77, 103, 105, 106).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention that the temperature sensing terminal connected to a temperature sensor of McPherson would comprise: an on-chip temperature sensor implemented with at least one implementation of the first power device, an isolated temperature sensor, a non-isolated temperature sensor, and/or a temperature sensing device integrated with the power substrate as taught by Cole because the integration of other application circuits within the same power package allows the module designer more design flexibility and higher density power module packaging (see MPEP 2144 I and Cole paragraphs 91, 103).
With respect to claim 16, McPherson discloses the power package according to claim 1.
McPherson does not explicitly disclose wherein at least one implementation of the at least one additional signal terminal is connected to a strain gauge.
Cole discloses a power package in Figs. 10-21 wherein at least one implementation of an at least one additional signal terminal is connected to a strain gauge (see Figs. 10-21 and paragraphs 77, 117, 161).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention that at least one implementation of the at least one additional signal terminal of McPherson would be connected to a strain gauge as taught by Cole because a stain gauge is a well-known diagnostic sensor incorporated into power packages for sensing vibration (see MPEP 2144 I and Cole paragraph 77).
With respect to claim 25, McPherson discloses the power package according to claim 1 wherein: the first power terminal 20 extends from the first housing side (B); the second power terminal 18 extends from the second housing side (A); a first implementation (24, 26) of the plurality of signal terminals extends from the first housing side (B); and a second implementation (28, 30) of the plurality of signal terminals extends from the second housing side (A) (see Figs. 3-6 and paragraphs 67, 70-74, 78-80).
McPherson does not explicitly disclose the power package further being configured with a common source topology.
Cole discloses a power package in Figs. 10-21 with the power package further being configured with a common source topology (see Figs. 10-21 and paragraphs 62, 209).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention that the power package of McPherson would be configured with a common source topology as taught by Cole because such a topology is well-known in the art and a design choice the selection of which would have flown naturally to one of ordinary skill in the art as necessitated by the specific requirements of a given application (see MPEP 2144 I also see Cole paragraphs 62, 209).
Claims 21, 22, and 24 are rejected under 35 U.S.C. 103 as being unpatentable over McPherson (US 2021/0313243 A1; hereinafter McPherson43) in view of McPherson et al. (US 2020/0395322 A1; hereinafter McPherson22).
With respect to claim 21, McPherson43 discloses the power package according to claim 1 wherein the first power terminal 20 extends from the first housing side (B) and the second power terminal 18 extends from the second housing side (A) (see Figs. 3-6 and paragraphs 67, 70-74, 78-80).
McPherson43 does not disclose wherein all of the plurality of signal terminals extend from the second housing side.
McPherson22 discloses a power package 36 in Figs. 2 and 3 wherein all of a plurality of signal terminals (44, 46) extend from a second housing side (bottom of 36 in Fig. 3) (see Figs. 2 and 3 and paragraphs 33-36).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention that all of the plurality of signal terminals of McPherson43 would extend from the second housing side as taught by McPherson22 as a matter of design choice since the applicant has not disclosed that this signal terminal configuration solves any problem or is for a particular reason. Designing the plurality of signal terminals to extend from the second housing side would have flown naturally to one of ordinary skill in the art as necessitated by the specific requirements of a given application (see MPEP 2144 I).
With respect to claim 22, McPherson43 discloses the power package according to claim 1.
McPherson43 does not explicitly disclose wherein all of the plurality of signal terminals are on either the first housing side or the second housing side; and wherein all of the plurality of signal terminals are on a side of one of plurality of power terminals.
McPherson22 discloses a power package 36 in Figs. 2 and 3 wherein all of a plurality of signal terminals (44, 46) are on either the first housing side (top in Fig. 3) or the second housing side (bottom in Fig. 3); and wherein all of the plurality of signal terminals (44, 46) are on a side of one (42) of a plurality of power terminals (40, 42) (see Figs. 2 and 3 and paragraphs 33-36).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention that all of the plurality of signal terminals of McPherson43 would be on either the first housing side or the second housing side; and wherein all of the plurality of signal terminals are on a side of one of plurality of power terminals as taught by McPherson22 as a matter of design choice since the applicant has not disclosed that this signal terminal configuration solves any problem or is for a particular reason. Designing the plurality of signal terminals to extend from one side of a power terminal on only one side of the housing would have flown naturally to one of ordinary skill in the art as necessitated by the specific requirements of a given application (see MPEP 2144 I).
With respect to claim 24, McPherson43 discloses a configuration of at least two implementations of the power package of claim 1 (see rejection of claim 1 above and Figs. 19A-20 and paragraphs 120-123).
McPherson43 does not explicitly disclose wherein all of the plurality of signal terminals of the at least two implementations of the power package are arranged to be clustered along adjacent corners of the at least two implementations of the power package.
McPherson22 discloses a power package 36 in Figs. 2 and 3 wherein all of a plurality of signal terminals (44, 46) of the power package are arranged to be clustered along a corner of the power package (see Figs. 2 and 3 and paragraphs 33-36).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention that all of the plurality of signal terminals of the at least two implementations of the power package of McPherson43 would be arranged to be clustered along adjacent corners of the at least two implementations of the power package based on the combined teachings of McPherson43 and McPherson22 as a matter of design choice since the applicant has not disclosed that this signal terminal configuration solves any problem or is for a particular reason. Designing the plurality of signal terminals to be clustered along adjacent corners of two implementations of power packages would have flown naturally to one of ordinary skill in the art as necessitated by the specific requirements of a given application (see MPEP 2144 I).
Claim 23 are rejected under 35 U.S.C. 103 as being unpatentable over McPherson (US 2021/0313243 A1) in view of Muto et al. (US 9,704,979 B2; hereinafter Muto).
With respect to claim 23, McPherson discloses the power package according to claim 1.
McPherson does not explicitly disclose wherein all of the plurality of signal terminals are on either the first housing side or the second housing side; and wherein all of the plurality of signal terminals are on both sides of one of the plurality of power terminals.
Muto discloses a power package in at least Fig. 20a wherein all of a plurality of signal terminals (SGT/LD1) are on either a first housing side S1 or a second housing side S2; and wherein all of the plurality of signal terminals are on both sides of one of a plurality of power terminals (see Fig. 20A, column 15, line 22-46, and column 31, line 5-31).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention that all of the plurality of signal terminals of McPherson would be on either the first housing side or the second housing side; and wherein all of the plurality of signal terminals are on both sides of one of the plurality of power terminals as taught by Muto as a matter of design choice since the applicant has not disclosed that this signal terminal configuration solves any problem or is for a particular reason. Designing the plurality of signal terminals to extend from both sides a power terminal on only one side of the housing would have flown naturally to one of ordinary skill in the art as necessitated by the specific requirements of a given application (see MPEP 2144 I).
Inquiry
Any inquiry concerning this communication or earlier communications from the examiner should be directed to JORDAN M KLEIN whose telephone number is (571)270-7544. The examiner can normally be reached 9:00 am - 5:00 pm.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Sue Purvis can be reached at 571-272-1236. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/J.M.K/Examiner, Art Unit 2893
/SUE A PURVIS/ Supervisory Patent Examiner, Art Unit 2893