DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Election/Restrictions
Applicant’s election without traverse of the species 10 in the reply filed on 03/24/2026 is acknowledged. Thereby claim 10 is withdrawn since it is not shown by Fig.10.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 1-3 is/are rejected under 35 U.S.C. 103 as being unpatentable over Chen (US Pub No. 20230131599).
With respect to claim 1, Chen discloses a gate structure (288,Fig.27) arranged along a first side of a substrate (204,276,280,Fig.27) within a plurality of pixel regions (1000, Fig.27) an etch block structure (262) arranged on the first side of the substrate (Fig.27) between neighboring ones of the plurality of gate structures (each pixel region has a gate structure,Fig.27, applicant’s specification particularly Figure 10 shows neighboring as not in direct contact) ; a contact etch stop layer (CESL) arranged on the etch block structure (lower portion of the 290 directly contacting top surface of 262) between the neighboring ones of the plurality of gate structures (Fig.27); and an isolation structure disposed between one or more sidewalls of the substrate (left or right, Fig.27) and extending from a second side of the substrate (bottom,Fig.27) to the first side of the substrate (Fig.27), wherein the etch block structure is vertically between the isolation structure and the CESL (Fig.27). However, Chen does not explicitly disclose a plurality of gate structures. On the other hand, it would have been obvious to one of ordinary skill in the art at the time of the filing of the invention to modify Chen such that the plurality of the gate structures are formed on the substrate in order for each pixel to be able to process the light.
With respect to claim 2, Chen discloses wherein the isolation structure contacts the etch block structure (Fig.27).
With respect to claim 3, Chen discloses wherein the etch block structure comprises outermost sidewalls (left or right) between the neighboring ones of the plurality of gate structures (Fig.27).
Allowable Subject Matter
Claim 8 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Claims 21-28 are allowed.
The following is the reason for allowance of the claim 21, pertinent arts do not alone or in combination disclose a plurality of gate structures arranged along a first side of a substrate within a plurality of pixel regions ; an etch block structure arranged on the first side of the substrate and having outermost sidewalls laterally between neighboring ones of the plurality of gate structures; a contact etch stop layer (CESL) arranged on the outermost sidewalls and a horizontally extending surface of the etch block structure between the neighboring ones of the plurality of gate structures; and an isolation structure disposed between one or more sidewalls of the substrate and extending from a second side of the substrate to the first side of the substrate, wherein the etch block structure is vertically between the isolation structure and the CESL.
The following is the reason for allowance of the claim 28, pertinent arts do not alone or combination disclose a plurality of gate structures arranged along a first side of a substrate within a plurality of pixel regions; an etch block structure arranged on the first side of the substrate between neighboring ones of the plurality of gate structures; one or more sidewall spacers arranged along opposing sides of the plurality of gate structures, wherein the one or more sidewall spacers are laterally between the etch block structure and the plurality of gate structures; a contact etch stop layer (CESL) arranged on the etch block structure between the neighboring ones of the plurality of gate structures; and an isolation structure disposed between one or more sidewalls of the substrate and extending from a second side of the substrate to the first side of the substrate, wherein the etch block structure vertically contacts the isolation structure and the CESL and wherein the etch block structure laterally extends past opposing sides of the isolation structure in a cross-sectional view.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to ALI N NARAGHI whose telephone number is (571)270-5720. The examiner can normally be reached 10am-6pm.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Marlon Fletcher can be reached at 571-272-2063. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/ALI NARAGHI/Primary Examiner, Art Unit 2817
Prosecution Insights