Prosecution Insights
Last updated: April 19, 2026
Application No. 18/348,219

DISPLAY PANEL AND ELECTRONIC DEVICE INCLUDING THE SAME

Final Rejection §102§103
Filed
Jul 06, 2023
Examiner
JONES, ERIC W
Art Unit
2892
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Samsung Display Co., Ltd.
OA Round
2 (Final)
61%
Grant Probability
Moderate
3-4
OA Rounds
3y 3m
To Grant
79%
With Interview

Examiner Intelligence

Grants 61% of resolved cases
61%
Career Allow Rate
418 granted / 685 resolved
-7.0% vs TC avg
Strong +18% interview lift
Without
With
+17.9%
Interview Lift
resolved cases with interview
Typical timeline
3y 3m
Avg Prosecution
33 currently pending
Career history
718
Total Applications
across all art units

Statute-Specific Performance

§101
0.1%
-39.9% vs TC avg
§103
60.8%
+20.8% vs TC avg
§102
25.8%
-14.2% vs TC avg
§112
10.3%
-29.7% vs TC avg
Black line = Tech Center average estimate • Based on career data from 685 resolved cases

Office Action

§102 §103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Priority Receipt is acknowledged of certified copies of papers required by 37 CFR 1.55. Specification The new title submitted 2/13/2026 is acknowledged and accepted by the Office. Response to Arguments/Response to Amendments Applicant’s arguments, see pages 10-13, filed 2/13/2026, with respect to the rejection(s) of claim(s) 1; and 15 under 35 U.S.C. 103(a), and the current amendments to claims 1; and 15 have been fully considered and are persuasive. Therefore, their rejections have been withdrawn. However, upon further consideration, a new ground(s) of rejection is made in view of Kim 422 (of record) for claim 1; and Kim 422 (of record) in view of Lou (of record) for claim 15. Claims Status Claims 1-23 are currently pending and being examined. Claim Rejections - 35 USC § 102 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claims 1, 10 and 11 are rejected under 35 U.S.C. 102(a)(1) as being anticiapated by KIM et al (US 2016/0020422 A1-of record, hereafter Kim 422). Re claim 1, Kim 422 discloses in FIG. 4 (with references to FIGS. 1-2) a display panel (400) comprising: a substrate (110; [0070] and [0092]) including a display area (DA; [0070] and [0092]), a non-display area (region outside DA; [0070] and [0092]) outside (surrounding) the display area (DA), and a pad area (PA; [0070] and [0092]) in the non-display area (region outside DA); a display portion (region within DA) arranged in the display area (DA) and including a subpixel (comprising 120/130; [0075]-[0076] and [0092]); and a pad portion (region of PA; [0070] and [0092]-[0093]) arranged in the pad area (PA) and including a pad (150; [0093]), wherein the pad (150) comprises: a first conductive layer (151; [0083] and [0092]) on the substrate (110); a first inorganic insulating layer (114; [0085] and [0092]) covering the first conductive layer (151) and including a first contact hole (unlabeled contact hole; [0085]) exposing at least a part (upper surface; [0085]) of the first conductive layer (151); a second conductive layer (153; [0094]) on the first inorganic insulating layer (114) and in contact with (touching) the first conductive layer (151) through the first contact hole (unlabeled contact hole); and a third conductive layer (155; [0094]) covering (overlaying) the second conductive layer (153), an edge (left/right ends) of the third conductive layer (155) is covered with (overlayed by) at least one transparent conductive material layer (transparent conductive oxide 480 as in 180; [0070]; [0087] and [0092]), and the at least one transparent conductive material layer (480) contacts (touches) the first inorganic insulating layer (114). Re claim 10, Kim 422 discloses the display panel of claim 1, wherein the at least one transparent conductive material layer (480) sequentially covers a top surface (upper plane) of the third conductive layer (155), a side surface corresponding (left/right vertical planes) to the edge (left/right ends) of the third conductive layer (155), and a top surface (upper plane) of the first inorganic insulating layer (114) under (below) the third conductive layer (155). Re claim 11, Kim 422 discloses the display panel of claim 10, wherein the at least one transparent conductive material layer (480) is in direct contact with (touching) the top surface (upper plane) of the third conductive layer (155), the side surface (left/right vertical planes) to the edge (left/right ends) of the third conductive layer (155), and the top surface (upper plane) of the first inorganic insulating layer (114) under (below) the third conductive layer (155). Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention. Claims 2-4, 12-14 are rejected under 35 U.S.C. 103 as being unpatentable over Kim 422 in view of KIM et al (US 2021/0028241 A1-of record, hereafter Kim). Re claim 2, Kim 422 fails to disclose the display panel of claim 1, further comprising: a second inorganic insulating layer covering the at least one transparent conductive material layer and including a second contact hole exposing at least a part of the third conductive layer; and a fourth conductive layer on the second inorganic insulating layer and in contact with the third conductive layer through the second contact hole. However, Kim discloses in FIG. 5 (with references to FIGS. 1-4) a display panel comprising: a second inorganic insulating layer (312; [0081] and [0132]) covering a third conductive layer (CP1c; [0075]) and including a second contact hole (unlabeled opening of 312 at CP1d) exposing at least a part (upper surface) of the third conductive layer (CP1c); and a fourth conductive layer (CP1d; [0075] and [0081]) on the second inorganic insulating layer (312) and in contact with (touching) the third conductive layer (CP1c) through the second contact hole (unlabeled opening of 312 at CP1d). Thus, it would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to modify the structure of Kim 422 by adding the second inorganic insulating layer including a second contact hole exposing at least a part of the third conductive layer; and the fourth conductive layer on the second inorganic insulating layer and in contact with the third conductive layer through the second contact hole, as disclosed by Kim, the second inorganic insulating layer covering the at least one transparent conductive material layer, to provide pads for driving circuits of the display panel (Kim; Abstract). Re claims 3-4, Kim 422 fails to disclose the display panel of claim 1, wherein the third conductive layer (155) has a triple-layer structure including a first layer, a third layer, and a second layer between the first layer and the third layer, which include a same material; and wherein the first layer and the third layer of the third conductive layer (155) include titanium, and the second layer of the third conductive layer includes aluminum. However, Kim discloses wherein the third conductive layer (CP1c) has (can have; [0078] and [0107]) a triple-layer structure ([0078] and [0107]) including a first layer (of triple layer; [0107]), a third layer (of triple layer; [0107]), and a second layer (of triple layer; [0107]) between the first layer (of triple layer) and the third layer (of triple layer), which include a same material (titanium; [0107]); and wherein the first layer (of triple layer) and the third layer (of triple layer) of the third conductive layer (CP1c) include titanium ([0107]), and the second layer of the third conductive layer includes aluminum ([0107]). Thus, it would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to modify the structure of Kim 422 by using the third conductive layer having a triple-layer structure including a first layer, a third layer, and a second layer between the first layer and the third layer, which include a same material; and wherein the first layer and the third layer of the third conductive layer include titanium, and the second layer of the third conductive layer includes aluminum as a substitutional equivalent (MPEP § 2144.06) for the third conductive layer of Kim 422, for providing conductive material(s) for a display panel pad. Re claim 12, Kim 422 discloses the display panel of claim 1, further comprising a display device (130; [0070] and [0092]) in the display area (DA), a thin film transistor (130; [0070] and [0092]) between the substrate (110) and the display device (130), wherein the thin film transistor (120) includes an active layer (122; [0073]), a gate electrode (121; [0073]) at least partially overlapping with (vertically above) the active layer (122), and an electrode layer (123/124; [0073]) arranged on (above) the gate electrode (121) and electrically connected with ([0073]) the active layer (122). But, fails to disclose a connection electrode electrically connecting the display device with the thin film transistor (120), the third conductive layer (155) includes a same material as the connection electrode, wherein the thin film transistor (120) includes a semiconductor layer, the gate electrode (121) at least partially overlapping with the semiconductor layer, and the electrode layer (123/124) electrically connected with the semiconductor layer. Kim discloses the display panel further comprising a display device (OLED 210; [0064]) in the display area (DA), a thin film transistor (comprising AP/GE/GP/SE/DE; [0052] and [0060]-[0063]) and between the substrate (110) and the display device (OLED 210), and a connection electrode (CE; [0063]-[0064]) electrically connecting ([0063]-[0064]) the display device (OLED 210) with the thin film transistor (comprising AP/GE/GP/SE/DE), wherein the thin film transistor includes a semiconductor layer (AP; [0052] and [0060]-[0063]), a gate electrode (comprising GE/GP; [0052] and [0060]-[0063]) at least partially overlapping with (covering) the semiconductor layer (AP), and an electrode layer (comprising SE/DE; [0052] and [0060]-[0063]) arranged on the gate electrode (GE/GP) and electrically connected ([0060]-[0063]) with the semiconductor layer (AP), and the third conductive layer (CP1c) includes a same material ([0063] and [0078]) as the connection electrode (CE). Thus, it would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to modify the structure of Kim 422 by adding the connection electrode of Kim to compensate for voltage drops to the display element (Kim; [0063]), using the semiconductor layer of Kim as the active layer of Kim since it is well-known (MPEP § 2144.03) to use semiconductor material(s) for display panel TFTs, and to form the third conductive layer to include a same material as the connection electrode, using fewer material types per device layer, such that the connection electrode is electrically connecting the display device with the thin film transistor (120), the gate electrode (121) at least partially overlapping with the semiconductor layer, and the electrode layer (123/124) electrically connected with the semiconductor layer. Re claim 13, Kim 422 discloses the display panel of claim 12. But, fails to disclose wherein the first conductive layer (151) includes a same material as the gate electrode (121), and the second conductive layer (153) includes a same material as the electrode layer (123/124). However, Kim discloses wherein the first conductive layer (CP1a) includes a same material ([0076]) as the gate electrode (GE), and the second conductive layer (CP1b) includes a same material ([0077]) as the electrode layer (SE/DE), as would be part of the pad and display device/TFT configurations discussed for claims 2 and 12. Re claim 14, Kim 422 discloses the display panel of claim 2. But, fails to disclose the display panel further comprising: a thin film encapsulation layer arranged on the display portion (DA) and including at least one organic encapsulation layer and at least one inorganic encapsulation layer; and a touch sensor layer on the thin film encapsulation layer, wherein the touch sensor layer comprises: a first touch insulating layer; a first touch electrode layer on the first touch insulating layer; a second touch insulating layer on the first touch electrode layer; and a second touch electrode layer on the second touch insulating layer, and the fourth conductive layer includes a same material as the second touch electrode layer. However, Kim discloses the display panel further comprising: a thin film encapsulation layer (220; [0066]) arranged on the display portion (region within DA) and including at least one organic encapsulation layer (224; [0066]) and at least one inorganic encapsulation layer (222/226; [0066]); and a touch sensor layer (touch-sensing part; [0067]) on the thin film encapsulation layer (220), wherein the touch sensor layer (touch-sensing part) comprises: a first touch insulating layer (310; [0068]); a first touch electrode layer (320; [0069]) on the first touch insulating layer (310); a second touch insulating layer (330; [0069]) on the first touch electrode layer (320); and a second touch electrode layer (343/344; [0072]) on the second touch insulating layer (330), and the fourth conductive layer (CP1d) includes a same material ([0079]) as the second touch electrode layer (343/344). Thus, it would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to modify the structure of Kim 422 by adding the encapsulation layer and the touch sensor layer of Kim, to provide advanced capabilities (Kim; Abstract) to the display panel of Kim 422. Claim 5 is rejected under 35 U.S.C. 103 as being unpatentable over Kim 422 in view of LOU et al (US 2022/0069023 A1-of record, hereafter Lou). Re claim 5, Kim 422 discloses the display panel of claim 1, wherein the display area (DA) includes a first display area (all of DA), the display panel (400) comprises: a plurality of first display devices (seen and unseen 130; [0070] and [0092]) in the first display area (all of DA). But, fails to disclose wherein the display area (DA) includes a second display area at least partially surrounded by the first display area (all of DA), a plurality of second display devices in the second display area; a plurality of second subpixel circuits respectively and electrically connected with the plurality of second display devices; and a plurality of connection wires respectively and electrically connecting the plurality of second display devices with the plurality of second subpixel circuits, and the plurality of second subpixel circuits are placed between the first display area (all of DA) and the second display area or in the non-display area (region outside DA). However, Lou discloses in FIGS. 1-2 display panel (100) comprising: a plurality of second display devices (each 110; [0052]) in a second display area (AA1; [0051]); and a plurality of connection wires (unlabeled lines of 140; [0061]) respectively connecting a plurality of second subpixel circuits (more than one 140; [0061]) to the plurality of second display devices (each 110), and the plurality of second subpixel circuits (each 140) are placed between a first display area (AA2; [0049]) and the second display area (AA1) or in the non-display area. Thus, it would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to modify the structure of Kim 422 by adding the second display area, the subpixels and the subpixel circuits of Lou, where a plurality of second display devices are in the second display area; and a plurality of connection wires are respectively connecting a plurality of second subpixel circuits to the plurality of second display devices, and the plurality of second subpixel circuits are placed between the first display area and the second display area, such that the number of the drive signal lines arranged in the second display area is reduced, so as to improve the light transmittance of the second display area (Lou; [0057] and [0063]). Claims 6-9 are rejected under 35 U.S.C. 103 as being unpatentable over Kim 422 and Lou as applied to claim 5 above, and further in view of CHO (US 2016/0197132 A1-of record, hereafter Cho). Re claim 6, Kim 422 and Lou discloses the display panel of claim 5. But, fail to disclose wherein the plurality of connection wires (Lou: of 140) include a first connection wire and a second connection wire on the first connection wire. However, Cho discloses in FIGS. 2-3 a display panel comprising: a plurality of connection wires (121; [0076]), wherein the plurality of connection wires (121) include a first connection wire (1st layer of multilayer; [0076]) and a second connection wire (2nd layer of multilayer; [0076]) on the first connection wire (1st layer of multilayer). Thus, it would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to modify the structure of Kim 422 and Lou by using the first and second connection wire configuration of Cho for the connection of Lou, wherein the plurality of connection wires would include a first connection wire and a second connection wire on the first connection wire to impart desired electrical, mechanical and optical characteristics for the display panel’s operation discussed for claim 6. Re claim 7, Kim 422 and Cho disclose the display panel of claim 6, wherein the at least one transparent conductive material layer (Kim 422: 480) includes a same material (transparent conductive oxide; [0087]) as the first connection wire (Cho: transparent conductive oxide 1st layer of multilayer; [0076]), as would be part of the plurality of connection wires for the display panel’s operation discussed for claim 6. Re claim 8, Kim 422 disclose the display panel of claim 6. But, fail to disclose wherein the at least one transparent conductive material layer (Kim 422: 480) includes a first transparent conductive material layer and a second transparent conductive material layer on the first transparent conductive material layer. However, Cho would render these limitations obvious by disclosing multilayer connection wires (121) which include a first transparent conductive material layer (ITO; [0076]) and a second transparent conductive material layer (IZO; [0076]) on the first transparent conductive material layer (ITO). Thus, it would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to modify the structure of Kim 422 by using the first and second connection wire configuration of Cho for the at least one transparent conductive material layer of Kim 422, wherein the at least one transparent conductive material layer includes a first transparent conductive material layer and a second transparent conductive material layer on the first transparent conductive material layer, which minimizes types and number of materials used to impart desired electrical, mechanical and optical characteristics for the display panel’s operation discussed for claim 6. Re claim 9, Kim 422 discloses the display panel of claim 8. But, fails to disclose wherein the first transparent conductive material layer includes a same material as the first connection wire, and the second transparent conductive material layer includes a same material as the second connection wire. However, Cho would render these limitations obvious by forming the at least one transparent conductive material layer as a multilayered stack as discussed for claims 6-7, and to use the first (ITO) and second (IZO) materials of Cho such that the first transparent conductive material layer includes a same material as the first connection wire, and the second transparent conductive material layer includes a same material as the second connection wire, as part of the minimizing of types and number of materials used to impart desired electrical, mechanical and optical characteristics for the display panel’s operation discussed for claims 6-8. Claims 15 and 17 are rejected under 35 U.S.C. 103 as being unpatentable over KIM et al (US 2016/0020422 A1-of record, hereafter Kim 422) and LOU et al (US 2022/0069023 A1-of record, hereafter Lou). Re claim 15, Kim 422 discloses in FIG. 4 (with references to FIGS. 1-2) a display panel (400), wherein the display panel (400) comprises: a substrate (110; [0070] and [0092]); a display portion (region within DA) arranged in a display area (DA; [0070] and [0092]) and including a subpixel (comprising 120/130; [0075]-[0076] and [0092]); and a pad portion (region of PA; [0070] and [0092]-[0093]) arranged in a pad area (PA; [0070] and [0092]) and including a pad (150; [0093]), the pad (150) comprises: a first conductive layer (151; [0083] and [0092]) on the substrate (110); a first inorganic insulating layer (114; [0085] and [0092]) covering the first conductive layer (151) and including a first contact hole (unlabeled contact hole; [0085]) exposing at least a part (upper surface; [0085]) of the first conductive layer (151); a second conductive layer (153; [0094]) on the first inorganic insulating layer (114) and in contact with (touching) the first conductive layer (151) through the first contact hole (unlabeled contact hole); and a third conductive layer (155; [0094]) covering (overlaying) the second conductive layer (153), an edge (left/right ends) of the third conductive layer (155) is covered with (overlayed by) at least one transparent conductive material layer (transparent conductive oxide 480 as in 180; [0070]; [0087] and [0092]), and the at least one transparent conductive material layer (480) contacts (touches) the first inorganic insulating layer (114). Kim 422 fails to disclose an electronic device comprising: the display panel (400) including the display area (DA) including a first display area and a second display area at least partially surrounded by the first display area, a non-display area outside the display area (DA), and the pad area in the non-display area; and a component under the display panel corresponding to the second display area. However, Lou discloses in FIGS. 9-10 an electronic device (e.g. cellphones and tablet computers; [0044]) comprising: a display panel (100) including a display area (AA2/TA/AA1; [0109]) including a second display area (AA1; [0109]) at least partially surrounded by a first display area (TA/AA2; [0109]); and a component (200; [0110]) under the display panel (100) corresponding to the second display area (AA1). Thus, it would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to modify the structure of Kim 422 by adding a second display area at least partially surrounded by the first display area; and a component under the display panel corresponding to the second display area, as disclosed by Lou, such that the display panel (400) including the display area (DA) including a first display area and a second display area at least partially surrounded by the first display area, a non-display area outside the display area (DA), and the pad area in the non-display area; and a component under the display panel corresponding to the second display area, forming electronic devices (Lou; [0044]) capable of capturing external image information, or acting as a light sensor (Lou; [0111]). Re claim 17, Kim 422 discloses the electronic device of 15, wherein the display panel (400) comprises: a plurality of first display devices (seen and unseen 130; [0070] and [0092]) in the first display area (all of DA). But, fails to disclose a plurality of second display devices in the second display area; and a plurality of connection wires respectively connecting a plurality of second subpixel circuits to the plurality of second display devices, and the plurality of second subpixel circuits are placed between the first display area (all of DA) and the second display area or in the non-display area. However, Lou discloses in FIGS. 1-2 display panel (100) of an electronic device comprising: a plurality of second display devices (each 110; [0052]) in a second display area (AA1; [0051]); and a plurality of connection wires (unlabeled lines of 140; [0061]) respectively connecting a plurality of second subpixel circuits (more than one 140; [0061]) to the plurality of second display devices (each 110), and the plurality of second subpixel circuits (each 140) are placed between a first display area (AA2; [0049]) and the second display area (AA1) or in the non-display area. Thus, it would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to modify the structure of Kim 422 by adding the second display area, the subpixels and the subpixel circuits of Lou, where a plurality of second display devices are in the second display area; and a plurality of connection wires are respectively connecting a plurality of second subpixel circuits to the plurality of second display devices, and the plurality of second subpixel circuits are placed between the first display area and the second display area, such that the number of the drive signal lines arranged in the second display area is reduced, so as to improve the light transmittance of the second display area (Lou; [0057] and [0063]). Claims 16 and 22-23 are rejected under 35 U.S.C. 103 as being unpatentable over Kim 422 and Lou as applied to claim 15 above, and further in view of KIM et al (US 2021/0028241 A1-of record, hereafter Kim). Re claim 16, Kim 422 and Lou disclose the electronic device of claim 15. But, fail to disclose the electronic device further comprising: a second inorganic insulating layer covering the at least one transparent conductive material layer and including a second contact hole exposing at least a part of the third conductive layer; and a fourth conductive layer on the second inorganic insulating layer and in contact with the third conductive layer through the second contact hole. However, Kim renders these limitations obvious (see claim 2). Re claim 22, Kim 422 and Lou disclose the electronic device of claim 15. But, fail to disclose wherein the display panel further comprises a display device in the display area, a thin film transistor between the substrate and the display device, and a connection electrode electrically connecting the display device with the thin film transistor, the thin film transistor includes a semiconductor layer, a gate electrode at least partially overlapping with the semiconductor layer, and an electrode layer arranged on the gate electrode and electrically connected with the semiconductor layer, and the third conductive layer includes a same material as the connection electrode. However, Kim renders these limitations obvious (see claim 12). Re claim 23, Kim 422 and Lou disclose the electronic device of claim 16. But, fails to disclose wherein the display panel further comprises: a thin film encapsulation layer arranged on the display portion and including at least one organic encapsulation layer and at least one inorganic encapsulation layer; and a touch sensor layer on the thin film encapsulation layer, the touch sensor layer comprises: a first touch insulating layer; a first touch electrode layer on the first touch insulating layer; a second touch insulating layer on the first touch electrode layer; and a second touch electrode layer on the second touch insulating layer, and the fourth conductive layer includes a same material as the second touch electrode layer. However, Kim renders these limitations obvious (see claim 14). Claims 18-21 are rejected under 35 U.S.C. 103 as being unpatentable over Kim 422 and Lou as applied to claim 17 above, and further in view of CHO (US 2016/0197132 A1-of record, hereafter Cho). Re claims 18-19, Kim 422 and Lou disclose the electronic device of claim 17. But, fail to disclose wherein the plurality of connection wires include a first connection wire and a second connection wire on the first connection wire; and wherein the at least one transparent conductive material layer includes a same material as the first connection wire. However, Cho renders these limitations obvious (see claims 6-7). Re claims 20-21, Kim 422 and Lou disclose the electronic device of claim 18. But, fail to disclose wherein the at least one transparent conductive material layer includes a first transparent conductive material layer and a second transparent conductive material layer on the first transparent conductive material layer; and wherein the first transparent conductive material layer includes a same material as the first connection wire, and the second transparent conductive material layer includes a same material as the second connection wire. However, Cho renders these limitations obvious (see claims 6-7 and 8-9). Conclusion Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to ERIC W JONES whose telephone number is (408)918-9765. The examiner can normally be reached M-F 7:00 AM - 6:00 PM PT. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, N. Drew Richards can be reached at (571) 272-1736. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /ERIC W JONES/Primary Examiner, Art Unit 2892
Read full office action

Prosecution Timeline

Jul 06, 2023
Application Filed
Nov 06, 2025
Non-Final Rejection — §102, §103
Feb 13, 2026
Response Filed
Feb 25, 2026
Final Rejection — §102, §103 (current)

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Prosecution Projections

3-4
Expected OA Rounds
61%
Grant Probability
79%
With Interview (+17.9%)
3y 3m
Median Time to Grant
Moderate
PTA Risk
Based on 685 resolved cases by this examiner. Grant probability derived from career allow rate.

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