Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
DETAILED ACTION
This action is responsive to the application No. 18/350,823 filed on July 12, 2023.
Priority
Receipt is acknowledged of papers submitted under 35 U.S.C. 119(a)-(d), which papers have been placed of record in the file.
Information Disclosure Statement
Acknowledgment is made of Applicant’s Information Disclosure Statement (IDS) form PTO-1449. These IDS has been considered.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claims 1-12 and 17 are rejected under 35 U.S.C. 103 as being unpatentable over US Pub # 2022/0399407 to Cha et al. (Cha) in view of US Pub # 2022/0367772 to Oh et al. (Oh).
Regarding independent claim 1, Cha discloses an electronic device (Fig. 10) comprising:
a display panel (Fig. 10: 10 and ¶0073) comprising a first area (DA2) comprising a transmission area (TA) and an element area (element area is located where OLED 2 is formed) and a second area (DA1) spaced apart (from the first area, the display panel (10) comprising:
a base layer (Fig. 10: 101);
a barrier layer (BML and ABML) disposed on the base layer, the barrier layer comprising:
a first lower light blocking layer (BML) disposed in the first area (DA2), and a second lower light blocking layer (ABML) disposed in the second area (DA1);
a circuit layer (PC1 and PC2) disposed on the barrier layer, the circuit layer comprising:
a first pixel circuit (PC2) disposed in the first area (DA2), and a second pixel circuit (PC1) disposed in the second area (DA1);
an element layer (OLED 1 and OLED 2) disposed on the circuit layer, the element layer comprising:
a first light emitting element (OLED 2) electrically connected (¶00135) to the first pixel circuit (PC2), and
a second light emitting element (OLED 1) electrically connected (¶00135) to the second pixel circuit (PC1); and
an encapsulation layer (320) disposed on the element layer (OLED 1 and OLED 2), wherein
the first pixel circuit (PC2) comprises a plurality of first-type transistors (T1 and T3),
the second pixel circuit (PC1) comprises a plurality of second-type transistors (T1 and T3),
the first lower light blocking layer (BML) entirely overlaps the plurality of first-type transistors (T1 and T3), and
the second lower light blocking layer (ABML) overlaps some second-type transistors (T1) of the plurality of second-type transistors (T1 and T3) and does not overlap other second-type transistors (T3; it is noted that the term “other” presently interpreted to be one or more) of the plurality of second-type transistors. It is noted that the term “some” and “other” as claimed are given their ordinary and customary meaning as would be understood by one of ordinary skill in the art. For example, Merriam-Webster defines the term “some” as “one” and the term “other” as “single”).
Cha fails to explicitly teach the first lower light blocking layer and the second lower light blocking layer disposed on a same layer.
Oh discloses the first lower light blocking layer (Fig. 7: BML in the main display region DP-A3) and the second lower light blocking layer (Fig. 8: BML in the second display region DP-A2) disposed on a same layer (layer 120br).
It would have been obvious to a person having ordinary skill in the art before the effective filing date of the invention to have provided the first lower light blocking layer and the second lower light blocking layer of Cha to be disposed on a same layer as taught by Oh so as to protect the first to third pixel circuits PC1, PC2, and PC3 and to block external light from reaching the first to third pixel circuits PC1, PC2, and PC3 and also to block a laser used for etching in a subsequent process from reaching the first to third pixel circuits PC1, PC2, and PC3 (¶0130).
Regarding claim 2, Cha discloses wherein the first lower light blocking layer (BML) is electrically insulated (by at least insulating layer 120) from the second lower light blocking layer (ABML).
Regarding claim 3, Cha discloses wherein a constant voltage (¶0144) having a certain voltage level is provided to the first lower light blocking layer (BML) (¶0144), and a power source voltage (¶0142 such as voltage line PL) provided to the second pixel circuit (PC1) is provided to the second lower light blocking layer (ABML) (¶ 0142).
Regarding claim 4, Cha discloses wherein the barrier layer (BML and BML) further comprises a plurality of sub-barrier layers (110, 120 UL2 and UL1) comprising an upper sub-barrier layer (131) closest to the circuit layer (PC1 and PC2).
Cha in view of Oh fails to explicitly disclose:
the upper sub-barrier layer of the plurality of sub-barrier layers has a thickness greater than a thickness of each other sub-barrier layer of the plurality of sub-barrier layers.
However, the thickness of the upper sub-barrier layer affects the performance of the display panel. It is known in the art to use thickness. It would have been obvious to one of ordinary skill in the art at the time of the invention to vary, through routine experimentation, the result effect variable of the thickness of the protruding members in order to optimize the functionality of the device (see MPEP §2144.05). Further, the specification contains no disclosure of either the critical nature of the claimed thickness or any unexpected results arising therefrom and it has been held that where patentability is said to be based upon a particular chosen dimension or upon another variable recited in a claim, the Applicant must show that the chosen dimension is critical. In re Woodruff, 919 F.2d 1575, 1578, 16 USPQ2d 1934, 1936 (Fed. Cir. 1990).
Regarding claim 5, Cha discloses wherein the first lower light blocking layer (BML) and the second lower light blocking layer (ABML) are disposed under the upper sub-barrier layer (131) (see Fig. 10).
Regarding claim 6, Cha discloses wherein the barrier layer (BML and ABML) further comprises:
a first sub-barrier layer (102) disposed on the base layer (101);
a second sub-barrier layer (103) disposed on the first sub-barrier layer (102);
a third sub-barrier layer (104) disposed on the second sub-barrier layer (103);
a fourth sub-barrier layer (110) disposed on the third sub-barrier layer (104);
a fifth sub-barrier layer (151) disposed on the fourth sub-barrier layer (110), and
the first lower light blocking layer (BML) and the second lower light blocking layer (ABML) are disposed between the fourth sub-barrier layer (110) and the fifth sub-barrier layer (151).
Regarding claim 7, Cha in view of Oh fails to explicitly disclose:
wherein the fifth sub-barrier layer has a thickness greater than a sum of a thickness of the first sub-barrier layer, a thickness of the second sub-barrier layer, a thickness of the third sub- barrier layer, and a thickness of the fourth sub-barrier layer.
However, the thickness of the fifthr sub-barrier layer affects the performance of the display panel. It is known in the art to use thickness. It would have been obvious to one of ordinary skill in the art at the time of the invention to vary, through routine experimentation, the result effect variable of the thickness of the protruding members in order to optimize the functionality of the device (see MPEP §2144.05). Further, the specification contains no disclosure of either the critical nature of the claimed thickness or any unexpected results arising therefrom and it has been held that where patentability is said to be based upon a particular chosen dimension or upon another variable recited in a claim, the Applicant must show that the chosen dimension is critical. In re Woodruff, 919 F.2d 1575, 1578, 16 USPQ2d 1934, 1936 (Fed. Cir. 1990).
Regarding claim 8, Cha discloses wherein each of the first lower light blocking layer (BML) and the second lower light blocking layer (ABML) comprises molybdenum (¶0149).
Regarding claim 9, Cha discloses wherein each of the first lower light blocking layer (BML) and the second lower light blocking layer (ABML) comprises: a first sub-lower light blocking layer comprising titanium; and a second sub-lower light blocking layer disposed on the first sub- lower light blocking layer and comprising molybdenum (¶0149).
To the extent the listing of potential materials in the cited paragraphs above may be construed as a range of materials overlapping with the claimed range of materials, the examiner further notes, each listing of materials constitutes a finite number of materials known in the art with predictable outcomes and are considered at least obvious to try (MPEP §2141.III.E) in order to optimize performance of the device of efficiently of the manufacture.
Regarding claim 10, Cha fails to explicitly disclose wherein the display panel further comprises an intermediate area defined between the first area and the second area, the circuit layer further comprises a third pixel circuit disposed in the intermediate area, the element layer further comprises a third light emitting element electrically connected to the third pixel circuit and a copy light emitting element electrically connected to the third pixel circuit, and the first lower light blocking layer and the second lower light blocking layer do not overlap the copy light emitting element.
Oh discloses wherein the display panel (Fig. 7: 100) further comprises an intermediate area (DP-A3) defined between the first area (TA and DP-A2) and the second area (DP-A1), the circuit layer (PC! And PC2) further comprises a third pixel circuit (PC3) disposed in the intermediate area (DP-A3), the element layer (130) further comprises a third light emitting element (LD3) electrically connected to the third pixel circuit (PC3) and a copy light emitting element (Fig. 5: another LD3) electrically connected to the third pixel circuit (PC3), and the first lower light blocking layer (BML of Fig. 8) and the second lower light blocking layer (BML in Fig. 7) do not overlap the copy light emitting element (¶0130).
It would have been obvious to a person having ordinary skill in the art before the effective filing date of the invention to have provided the display panel of Cha with the third pixel circuit, third light emitting element and a copy light emitting element as taught by Oh in order to connect the third pixel circuit to the third light-emitting element (¶0094).
Regarding claim 11, Cha discloses wherein the copy light emitting element (Fig. 5: another LD3 which is considered OLED3) comprises a pixel electrode (each light emitting element will necessarily include a pixel electrode) that is connected to a pixel electrode of the third light emitting element (LD3) and is integral with the pixel electrode of the third light emitting element (LD3) (see Figs. 5 and 7 and the corresponding text).
Regarding claim 12, Cha discloses wherein the copy light emitting element (Fig. 5: another LD3 which is considered OLED3) is disposed closer to the first light emitting element (LD2) than the third light emitting element (LD3) is. It is noted that Fig. 5 shows a plan view of a display panel that includes multiple pixel circuits (PC), multiple light emitting element (LD or OLED).
Regarding claim 17, Cha discloses wherein a buffer layer (Fig. 10: 132) disposed between the base layer (101) and the circuit layer (PC1 and PC2), wherein the buffer layer (101) does not overlap the transmission area (TA) (see Fig. 11).
Allowable Subject Matter
Claims 13-16 and 18 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter:
Claim 13 recites:
“wherein the circuit layer further comprises a plurality of conductive layers, a plurality of inorganic layers, and a plurality of organic layers, the plurality of organic layers comprises a common organic layer commonly disposed in the transmission area and the element area, and a first thickness of the common organic layer in the transmission area is smaller than a second thickness of the common organic layer in the element area”
Claim 18 recites:
“a first spacer disposed on the pixel definition layer and disposed in the second area and the intermediate area; a plurality of first protruded spacers disposed on the first spacer and disposed in the second area; a second spacer disposed on the pixel definition layer and disposed in the first area; and a second protruded spacer disposed on the second spacer, and the plurality of first protruded spacers does not overlap the intermediate area.”
Each of the above recitations, interpreted in combination with all other limitations of the claim and all limitations of any claims they depend from, is not taught or rendered obvious by the prior art of record and are indicated as allowable subject matter.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. US Pub # 2020/0273927 to Oh et al., US Pub # 2023/0071577 to Woo et al., US Pub # 2017/0148856 to Choi et al., US Pub # 2023/0030096 to Lee et al., US Pub # 2022/0181593 to Kim et al., US Pub # 2022/0052129 to Kim et al. and US Pub # 2021/0359047 to Yoon et al.
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/MOHSEN AHMADI/Primary Examiner, Art Unit 2896